KR870002667A - 적층식 mosfet들의 집적회로 및 그 제조방법 - Google Patents
적층식 mosfet들의 집적회로 및 그 제조방법 Download PDFInfo
- Publication number
- KR870002667A KR870002667A KR1019860007072A KR860007072A KR870002667A KR 870002667 A KR870002667 A KR 870002667A KR 1019860007072 A KR1019860007072 A KR 1019860007072A KR 860007072 A KR860007072 A KR 860007072A KR 870002667 A KR870002667 A KR 870002667A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- region
- forming
- regions
- channel
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 238000000034 method Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 14
- 229910052710 silicon Inorganic materials 0.000 claims 14
- 239000010703 silicon Substances 0.000 claims 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 12
- 229910052814 silicon oxide Inorganic materials 0.000 claims 12
- 239000011521 glass Substances 0.000 claims 7
- 239000004020 conductor Substances 0.000 claims 4
- 239000012535 impurity Substances 0.000 claims 3
- 239000000463 material Substances 0.000 claims 3
- 229920002120 photoresistant polymer Polymers 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 2
- 238000005530 etching Methods 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 238000002513 implantation Methods 0.000 claims 1
- 230000036244 malformation Effects 0.000 claims 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 1
- 229920005591 polysilicon Polymers 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors having potential barriers
- H01L29/94—Metal-insulator-semiconductors, e.g. MOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US76914685A | 1985-08-26 | 1985-08-26 | |
| US769,146 | 1985-08-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR870002667A true KR870002667A (ko) | 1987-04-06 |
Family
ID=25084598
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019860007072A KR870002667A (ko) | 1985-08-26 | 1986-08-26 | 적층식 mosfet들의 집적회로 및 그 제조방법 |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS6358861A (de) |
| KR (1) | KR870002667A (de) |
| DE (1) | DE3628233A1 (de) |
| SE (1) | SE8603491L (de) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69023765T2 (de) * | 1990-07-31 | 1996-06-20 | Ibm | Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten Feldeffekttransistoren mit Wolfram-Gitter und sich daraus ergebende Struktur. |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1191970A (en) * | 1982-11-09 | 1985-08-13 | Abdalla A. Naem | Stacked mos transistor |
-
1986
- 1986-08-19 SE SE8603491A patent/SE8603491L/ not_active Application Discontinuation
- 1986-08-20 DE DE19863628233 patent/DE3628233A1/de not_active Withdrawn
- 1986-08-26 KR KR1019860007072A patent/KR870002667A/ko not_active Application Discontinuation
- 1986-08-26 JP JP61201178A patent/JPS6358861A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6358861A (ja) | 1988-03-14 |
| DE3628233A1 (de) | 1987-02-26 |
| SE8603491D0 (sv) | 1986-08-19 |
| SE8603491L (sv) | 1987-02-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |