KR850005132A - 반도체 기질에의 붕소도우펀트 용착 및 확산공정 - Google Patents

반도체 기질에의 붕소도우펀트 용착 및 확산공정 Download PDF

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KR850005132A
KR850005132A KR1019840007864A KR840007864A KR850005132A KR 850005132 A KR850005132 A KR 850005132A KR 1019840007864 A KR1019840007864 A KR 1019840007864A KR 840007864 A KR840007864 A KR 840007864A KR 850005132 A KR850005132 A KR 850005132A
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diffusion
dopant
temperature
deposition
hydrogen atmosphere
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KR1019840007864A
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위고 저스티스 부루스 (외 1)
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로이 에이취. 맷신길
알라이드 코오포레이션
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Publication of KR850005132A publication Critical patent/KR850005132A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/02—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion materials in the solid state
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/92—Controlling diffusion profile by oxidation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

내용 없음

Description

반도체 기질에의 붕소도우펀트 용착 및 확산공정
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (8)

  1. 다음 단계등을 포함하는, P-형 반도체 기질에의 붕소 도우펀트 용착 및 확산을 위한 단일로 공정.
    (a) 약 4-200 ohms/square의 초기 저항을 얻을 때까지 기질에 도우펀트를 적용함.
    (b) 약 900℃의 온도를 유지하여 반도체와 도우펀트층사이에 전도성 계면층을 생성함.
    (c) 최소 900℃의 증기기권을 유지하면서 도와펀트원을 제거함.
    (d) 불활성 또는 산화기권하에서 도우핑을 위한 확산온도로가열 램핑을 행함.
    (e) 약 1050-1250℃의 증기 기권내에 약 5-20분간 기질을 적용시켜 과량의 실리콘 붕소화물을 산화시킴.
    (f) 결과의 형성층에 존재하는 붕소를 소망의 저항 및 깊이를 얻도록 불활성 또는 산화기권하에서 확산 시킴.
  2. 단계(c)가 소성수소 권하에서 행하여지는것인, 청구범위 제1항의 공정.
  3. 단계(e)가 소성 수소 기권하에서 행하여지는 것인, 청구범위 제1항의 공정.
  4. 단계(a)에서 도우펀트가 스핀-은공정에 의해 적용되는 것인, 청구범위 제1항의 공정.
  5. 단계(b)에서의 적용온도가 900-1150℃인것인, 청구범위 제1항의 공정.
  6. 단계(c)가 소성 수소기권하에서 행하여지는 것인, 청구범위 제1항의 공정.
  7. 단계(c)에서의 적용온도가 900-150℃인 것인, 청구범위 제1항의 공정.
  8. 단계(f)가 소성 수소기권하에서 행햐여지는 것인, 청구범위 제1항의 공정.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019840007864A 1983-02-12 1984-12-12 반도체 기질에의 붕소도우펀트 용착 및 확산공정 KR850005132A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US560473 1983-02-12
US06/560,473 US4514440A (en) 1983-12-12 1983-12-12 Spin-on dopant method

Publications (1)

Publication Number Publication Date
KR850005132A true KR850005132A (ko) 1985-08-21

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KR1019840007864A KR850005132A (ko) 1983-02-12 1984-12-12 반도체 기질에의 붕소도우펀트 용착 및 확산공정

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KR (1) KR850005132A (ko)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4588454A (en) * 1984-12-21 1986-05-13 Linear Technology Corporation Diffusion of dopant into a semiconductor wafer
NL8600022A (nl) * 1986-01-08 1987-08-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een doteringselement vanuit zijn oxide in een halfgeleiderlichaam wordt gediffundeerd.
US4729006A (en) * 1986-03-17 1988-03-01 International Business Machines Corporation Sidewall spacers for CMOS circuit stress relief/isolation and method for making
US4729962A (en) * 1986-03-24 1988-03-08 The United States Of America As Represented By The United States Department Of Energy Semiconductor junction formation by directed heat
EP0598438A1 (en) * 1992-11-17 1994-05-25 Koninklijke Philips Electronics N.V. Method for diffusing a dopant into a semiconductor
US7030039B2 (en) 1994-10-27 2006-04-18 Asml Holding N.V. Method of uniformly coating a substrate
US6977098B2 (en) * 1994-10-27 2005-12-20 Asml Holding N.V. Method of uniformly coating a substrate
US7018943B2 (en) 1994-10-27 2006-03-28 Asml Holding N.V. Method of uniformly coating a substrate
KR100370728B1 (ko) * 1994-10-27 2003-04-07 실리콘 밸리 그룹, 인크. 기판을균일하게코팅하는방법및장치
EP1787327A4 (en) * 2004-06-04 2010-09-08 Newsouth Innovations Pty Ltd INTERCONNECTION OF PHOTOPILES IN THIN LAYERS
DE102009030096A1 (de) 2009-06-22 2010-12-23 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur Herstellung einer EWT-Solarzelle
US9837575B2 (en) * 2013-02-06 2017-12-05 Panasonic Production Engineering Co., Ltd. Method of manufacturing solar battery cell

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US3997351A (en) * 1974-01-07 1976-12-14 Owens-Illinois, Inc. Glass-ceramic dopant host for vapor phase transport of B2 O3
DE2838928A1 (de) * 1978-09-07 1980-03-20 Ibm Deutschland Verfahren zum dotieren von siliciumkoerpern mit bor
US4233093A (en) * 1979-04-12 1980-11-11 Pel Chow Process for the manufacture of PNP transistors high power
US4348428A (en) * 1980-12-15 1982-09-07 Board Of Regents For Oklahoma Agriculture And Mechanical Colleges Acting For And On Behalf Of Oklahoma State University Of Agriculture And Applied Sciences Method of depositing doped amorphous semiconductor on a substrate

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