KR20230138552A - 실리콘 산질화막의 성막 방법 및 박막 트랜지스터의 제조 방법 - Google Patents

실리콘 산질화막의 성막 방법 및 박막 트랜지스터의 제조 방법 Download PDF

Info

Publication number
KR20230138552A
KR20230138552A KR1020237031266A KR20237031266A KR20230138552A KR 20230138552 A KR20230138552 A KR 20230138552A KR 1020237031266 A KR1020237031266 A KR 1020237031266A KR 20237031266 A KR20237031266 A KR 20237031266A KR 20230138552 A KR20230138552 A KR 20230138552A
Authority
KR
South Korea
Prior art keywords
gas
film
silicon oxynitride
flow rate
nitrogen gas
Prior art date
Application number
KR1020237031266A
Other languages
English (en)
Korean (ko)
Inventor
토시히코 사카이
야스노리 안도
Original Assignee
닛신덴키 가부시키 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 닛신덴키 가부시키 가이샤 filed Critical 닛신덴키 가부시키 가이샤
Publication of KR20230138552A publication Critical patent/KR20230138552A/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/42Silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02565Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66969Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Thin Film Transistor (AREA)
KR1020237031266A 2021-03-23 2022-02-25 실리콘 산질화막의 성막 방법 및 박막 트랜지스터의 제조 방법 KR20230138552A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPJP-P-2021-048568 2021-03-23
JP2021048568A JP2022147359A (ja) 2021-03-23 2021-03-23 シリコン酸窒化膜の成膜方法及び薄膜トランジスタの製造方法
PCT/JP2022/007958 WO2022202100A1 (ja) 2021-03-23 2022-02-25 シリコン酸窒化膜の成膜方法及び薄膜トランジスタの製造方法

Publications (1)

Publication Number Publication Date
KR20230138552A true KR20230138552A (ko) 2023-10-05

Family

ID=83395588

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020237031266A KR20230138552A (ko) 2021-03-23 2022-02-25 실리콘 산질화막의 성막 방법 및 박막 트랜지스터의 제조 방법

Country Status (4)

Country Link
JP (1) JP2022147359A (ja)
KR (1) KR20230138552A (ja)
CN (1) CN116982142A (ja)
WO (1) WO2022202100A1 (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018195610A (ja) 2017-05-12 2018-12-06 東京エレクトロン株式会社 成膜方法及び成膜装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5135709B2 (ja) * 2006-04-28 2013-02-06 凸版印刷株式会社 薄膜トランジスタ及びその製造方法
JP5647860B2 (ja) * 2010-10-28 2015-01-07 富士フイルム株式会社 薄膜トランジスタおよびその製造方法
JP6208469B2 (ja) * 2012-05-31 2017-10-04 株式会社半導体エネルギー研究所 半導体装置
KR20200019269A (ko) * 2012-06-29 2020-02-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR102141977B1 (ko) * 2012-07-20 2020-08-06 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제조 방법
JP6401483B2 (ja) * 2013-04-26 2018-10-10 株式会社半導体エネルギー研究所 半導体装置の作製方法
US10192995B2 (en) * 2015-04-28 2019-01-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018195610A (ja) 2017-05-12 2018-12-06 東京エレクトロン株式会社 成膜方法及び成膜装置

Also Published As

Publication number Publication date
JP2022147359A (ja) 2022-10-06
WO2022202100A1 (ja) 2022-09-29
CN116982142A (zh) 2023-10-31

Similar Documents

Publication Publication Date Title
JP6298118B2 (ja) ディスプレイ・デバイスのためのバリア材料
KR101927579B1 (ko) 전이금속 디칼코게나이드 박막 트랜지스터 및 그 제조방법
KR101758538B1 (ko) 박막 트랜지스터 및 표시 장치
US8927330B2 (en) Methods for manufacturing a metal-oxide thin film transistor
CN102084486A (zh) 薄膜晶体管及显示装置
WO2022004838A1 (ja) 薄膜トランジスタ
KR20120024435A (ko) 반도체 장치
Cho et al. Highly stable, high mobility Al: SnZnInO back-channel etch thin-film transistor fabricated using PAN-based wet etchant for source and drain patterning
Choi et al. Robust SiO2 gate dielectric thin films prepared through plasma-enhanced atomic layer deposition involving di-sopropylamino silane (DIPAS) and oxygen plasma: Application to amorphous oxide thin film transistors
Nam et al. Effect of a rapid thermal annealing process on the electrical properties of an aluminum‐doped indium zinc tin oxide thin film transistor
US8460966B2 (en) Thin film transistor and method for fabricating thin film transistor
US20140217400A1 (en) Semiconductor element structure and manufacturing method for the same
Tsuji et al. Low-resistive source/drain formation using nitrogen plasma treatment in self-aligned In-Ga-Zn-Sn-O thin-film transistors
JP2016225505A (ja) 薄膜トランジスタおよびその製造方法ならびにスパッタリングターゲット
WO2013051644A1 (ja) 絶縁膜およびその製造方法
KR20150136726A (ko) 산화물 반도체 박막 트랜지스터의 제조방법
KR20230138552A (ko) 실리콘 산질화막의 성막 방법 및 박막 트랜지스터의 제조 방법
Tu et al. Investigation of Polysilazane-Based $\hbox {SiO} _ {2} $ Gate Insulator for Oxide Semiconductor Thin-Film Transistors
WO2022130912A1 (ja) 薄膜トランジスタの製造方法
JP5112668B2 (ja) 半導体装置の製法
US10748759B2 (en) Methods for improved silicon nitride passivation films
KR101970548B1 (ko) 산화물 절연막, 산화물 반도체 박막트랜지스터 소자 및 그 제조방법
TWI747387B (zh) 薄膜電晶體的製造方法
TWI835033B (zh) 氧化物半導體的成膜方法及薄膜電晶體的製造方法
Ahn et al. Effects of Hydrogen Doping on a-GIZO Thin-Film Transistors With Hafnium Dioxide Gate Insulators Formed by Atomic Layer Deposition at Different Temperatures