KR20210100085A - 보호막 형성용 복합 시트, 및 반도체 칩의 제조 방법 - Google Patents

보호막 형성용 복합 시트, 및 반도체 칩의 제조 방법 Download PDF

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Publication number
KR20210100085A
KR20210100085A KR1020217013503A KR20217013503A KR20210100085A KR 20210100085 A KR20210100085 A KR 20210100085A KR 1020217013503 A KR1020217013503 A KR 1020217013503A KR 20217013503 A KR20217013503 A KR 20217013503A KR 20210100085 A KR20210100085 A KR 20210100085A
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KR
South Korea
Prior art keywords
protective film
forming
composite sheet
antistatic
layer
Prior art date
Application number
KR1020217013503A
Other languages
English (en)
Korean (ko)
Inventor
카즈마 노지마
Original Assignee
린텍 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 린텍 가부시키가이샤 filed Critical 린텍 가부시키가이샤
Publication of KR20210100085A publication Critical patent/KR20210100085A/ko

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/02Physical, chemical or physicochemical properties
    • B32B7/025Electric or magnetic properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Adhesive Tapes (AREA)
  • Laminated Bodies (AREA)
  • Physical Vapour Deposition (AREA)
KR1020217013503A 2018-12-05 2019-11-27 보호막 형성용 복합 시트, 및 반도체 칩의 제조 방법 KR20210100085A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPJP-P-2018-228528 2018-12-05
JP2018228528 2018-12-05
PCT/JP2019/046381 WO2020116282A1 (ja) 2018-12-05 2019-11-27 保護膜形成用複合シート、及び半導体チップの製造方法

Publications (1)

Publication Number Publication Date
KR20210100085A true KR20210100085A (ko) 2021-08-13

Family

ID=70975070

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020217013503A KR20210100085A (ko) 2018-12-05 2019-11-27 보호막 형성용 복합 시트, 및 반도체 칩의 제조 방법

Country Status (5)

Country Link
JP (1) JP7495355B2 (zh)
KR (1) KR20210100085A (zh)
CN (1) CN113016066A (zh)
TW (1) TWI822917B (zh)
WO (1) WO2020116282A1 (zh)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6322317B2 (ja) 2012-12-10 2018-05-09 日東電工株式会社 ダイシングテープ一体型接着シート、半導体装置の製造方法、及び、半導体装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10217379A (ja) * 1997-02-03 1998-08-18 Toyobo Co Ltd 導電性積層フィルム
JP2008280520A (ja) * 2007-04-11 2008-11-20 Furukawa Electric Co Ltd:The 半導体固定用粘着テープ
JP5865044B2 (ja) * 2011-12-07 2016-02-17 リンテック株式会社 保護膜形成層付ダイシングシートおよびチップの製造方法
JP2016096239A (ja) * 2014-11-14 2016-05-26 住友ベークライト株式会社 半導体用ウエハ加工用粘着テープ
JP6477284B2 (ja) * 2015-06-19 2019-03-06 住友ベークライト株式会社 半導体用ウエハ加工用粘着テープ
JP6506118B2 (ja) * 2015-06-25 2019-04-24 リンテック株式会社 保護膜形成用フィルム、保護膜形成用シート、ワーク又は加工物の製造方法、検査方法、良品と判断されたワーク、及び良品と判断された加工物
JP6697876B2 (ja) * 2015-12-28 2020-05-27 日東電工株式会社 透明導電性フィルム用保護フィルム及び積層体
KR20230079498A (ko) * 2016-04-28 2023-06-07 린텍 가부시키가이샤 보호막 형성용 필름 및 보호막 형성용 복합 시트

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6322317B2 (ja) 2012-12-10 2018-05-09 日東電工株式会社 ダイシングテープ一体型接着シート、半導体装置の製造方法、及び、半導体装置

Also Published As

Publication number Publication date
CN113016066A (zh) 2021-06-22
JP7495355B2 (ja) 2024-06-04
TW202039734A (zh) 2020-11-01
JPWO2020116282A1 (ja) 2021-10-21
WO2020116282A1 (ja) 2020-06-11
TWI822917B (zh) 2023-11-21

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