KR20190137348A - 전자파 차폐 구조물 및 이를 포함하는 반도체 패키지 - Google Patents
전자파 차폐 구조물 및 이를 포함하는 반도체 패키지 Download PDFInfo
- Publication number
- KR20190137348A KR20190137348A KR1020180063419A KR20180063419A KR20190137348A KR 20190137348 A KR20190137348 A KR 20190137348A KR 1020180063419 A KR1020180063419 A KR 1020180063419A KR 20180063419 A KR20180063419 A KR 20180063419A KR 20190137348 A KR20190137348 A KR 20190137348A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- semiconductor package
- electromagnetic shielding
- porous conductor
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/62—Protection against overvoltage, e.g. fuses, shunts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Manufacturing & Machinery (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
도 2는 전자기기의 일례를 개략적으로 나타낸 사시도다.
도 3a 및 도 3b는 팬-인 반도체 패키지의 패키징 전후를 개략적으로 나타낸 단면도다.
도 4는 팬-인 반도체 패키지의 패키징 과정을 개략적으로 나타낸 단면도다.
도 5는 팬-인 반도체 패키지가 인쇄회로기판 상에 실장되어 최종적으로 전자기기의 메인보드에 실장된 경우를 개략적으로 나타낸 단면도다.
도 6은 팬-인 반도체 패키지가 인쇄회로기판 내에 내장되어 최종적으로 전자기기의 메인보드에 실장된 경우를 개략적으로 나타낸 단면도다.
도 7은 팬-아웃 반도체 패키지의 개략적은 모습을 나타낸 단면도다.
도 8은 팬-아웃 반도체 패키지가 전자기기의 메인보드에 실장된 경우를 개략적으로 나타낸 단면도다.
도 9는 전자파 차폐 구조물의 일례를 개략적으로 나타낸 단면도다.
도 10은 도 9의 전자파 차폐 구조물을 위에서 바라 보았을 때의 개략적인 평면도다.
도 11a 및 도 11b는 도 9의 전자파 차폐 구조물의 제조 일례를 개략적으로 나타낸다.
도 12는 전자파 차폐 구조물의 다른 일례를 개략적으로 나타낸 단면도다.
도 13은 도 12의 전자파 차폐 구조물을 위에서 바라 보았을 때의 개략적인 평면도다.
도 14a 및 도 14b는 도 12의 전자파 차폐 구조물의 제조 일례를 개략적으로 나타낸다.
도 15는 반도체 패키지의 일례를 개략적으로 나타낸 단면도다.
도 16은 반도체 패키지의 다른 일례를 개략적으로 나타낸 단면도다.
도 17은 반도체 패키지의 다른 일례를 개략적으로 나타낸 단면도다.
도 18은 반도체 패키지의 다른 일례를 개략적으로 나타낸 단면도다.
Claims (16)
- 베이스층; 및
상기 베이스층 상에 배치된 전자파 차폐층; 을 포함하며,
상기 전자파 차폐층은 복수 층의 다공성 도체층을 포함하고,
상기 다공성 도체층은 각각 복수의 개구부를 가지며,
상기 다공성 도체층은 서로 상하로 엇갈려 적층된,
전자파 차폐 구조물.
- 제 1 항에 있어서,
상기 다공성 도체층 각각의 복수의 개구부의 적어도 일부가 서로 상하로 연결되어 상기 베이스층의 표면의 적어도 일부를 노출시키는,
전자파 차폐 구조물.
- 제 1 항에 있어서,
상기 다공성 도체층은 각각 전도성 메쉬 구조를 갖는,
전자파 차폐 구조물.
- 제 3 항에 있어서,
상기 다공성 도체층은 각각 자기정렬된 은나노입자를 포함하는,
전자파 차폐 구조물.
- 제 1 항에 있어서,
상기 전자파 차폐층은 상기 다공성 도체층 각각의 외면을 덮는 금속막을 더 포함하는,
전자파 차폐 구조물.
- 제 5 항에 있어서,
상기 금속막은 구리를 포함하는,
전자파 차폐 구조물.
- 재배선층을 갖는 연결부재;
상기 연결부재 상에 배치되며, 상기 재배선층과 전기적으로 연결된 접속패드가 배치된 활성면과 상기 활성면의 반대측인 비활성면을 갖는 반도체칩;
상기 연결부재 상에 배치되며, 상기 반도체칩을 캡슐화하는 봉합재; 및
상기 봉합재 상에 배치된 전자파 차폐층; 를 포함하며,
상기 전자파 차폐층은 복수 층의 다공성 도체층을 포함하고,
상기 다공성 도체층은 각각 복수의 개구부를 가지며,
상기 다공성 도체층은 서로 상하로 엇갈려 적층된,
반도체 패키지.
- 제 7 항에 있어서,
상기 다공성 도체층 각각의 복수의 개구부의 적어도 일부가 서로 상하로 연결되어 상기 봉합재의 표면의 적어도 일부를 노출시키는,
반도체 패키지.
- 제 7 항에 있어서,
상기 다공성 도체층은 각각 전도성 메쉬 구조를 갖는,
반도체 패키지.
- 제 9 항에 있어서,
상기 다공성 도체층은 각각 자기정렬된 은나노입자를 포함하는,
반도체 패키지.
- 제 7 항에 있어서,
상기 전자파 차폐층은 상기 다공성 도체층 각각의 외면을 덮는 금속막을 더 포함하는,
반도체 패키지.
- 제 11 항에 있어서,
상기 금속막은 구리를 포함하는,
반도체 패키지.
- 제 7 항에 있어서,
상기 전자파 차폐층은 상기 봉합재의 상면을 덮는,
반도체 패키지.
- 제 13 항에 있어서,
상기 전자파 차폐층은 상기 봉합재의 측면 및 상기 연결부재의 측면을 덮는,
반도체 패키지.
- 제 7 항에 있어서,
상기 연결부재 상에 배치되며, 관통홀을 갖는 코어부재; 를 더 포함하며,
상기 반도체칩은 상기 코어부재의 관통홀에 배치된,
반도체 패키지.
- 제 15 항에 있어서,
상기 코어부재는 상기 반도체칩의 접속패드와 전기적으로 연결된 한층 이상의 배선층을 포함하는,
반도체 패키지.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020180063419A KR102070563B1 (ko) | 2018-06-01 | 2018-06-01 | 전자파 차폐 구조물 및 이를 포함하는 반도체 패키지 |
TW107135642A TWI678789B (zh) | 2018-06-01 | 2018-10-09 | 電磁干擾屏蔽結構以及具有該結構的半導體封裝 |
US16/161,797 US20190371737A1 (en) | 2018-06-01 | 2018-10-16 | Electromagnetic interference shielding structure and semiconductor package including the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020180063419A KR102070563B1 (ko) | 2018-06-01 | 2018-06-01 | 전자파 차폐 구조물 및 이를 포함하는 반도체 패키지 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20190137348A true KR20190137348A (ko) | 2019-12-11 |
KR102070563B1 KR102070563B1 (ko) | 2020-01-29 |
Family
ID=68694325
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020180063419A Active KR102070563B1 (ko) | 2018-06-01 | 2018-06-01 | 전자파 차폐 구조물 및 이를 포함하는 반도체 패키지 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20190371737A1 (ko) |
KR (1) | KR102070563B1 (ko) |
TW (1) | TWI678789B (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112060254A (zh) * | 2020-09-18 | 2020-12-11 | 储小燕 | 一种增强材料装饰用刨花板制造加工工艺 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20200211980A1 (en) * | 2018-12-27 | 2020-07-02 | Powertech Technology Inc. | Fan-out package with warpage reduction and manufacturing method thereof |
CN111179755A (zh) * | 2020-01-03 | 2020-05-19 | 京东方科技集团股份有限公司 | 一种芯片封装结构、显示装置 |
TWI744869B (zh) * | 2020-04-20 | 2021-11-01 | 力成科技股份有限公司 | 封裝結構及其製造方法 |
CN113766096A (zh) * | 2020-06-05 | 2021-12-07 | 宁波舜宇光电信息有限公司 | 线路板、感光组件、摄像模组和感光组件的制备方法 |
CN112768416B (zh) * | 2021-02-01 | 2024-08-20 | 杭州晶通科技有限公司 | 一种高频多芯片模组的扇出型封装及其制备方法 |
US12317409B2 (en) | 2023-06-22 | 2025-05-27 | International Business Machines Corporation | Circuit board local electromagnetic shielding |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000029227A (ko) * | 1998-10-30 | 2000-05-25 | 고사이 아끼오 | 전자파 차단판 |
WO2010029819A1 (ja) * | 2008-09-10 | 2010-03-18 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
JP2012074607A (ja) * | 2010-09-29 | 2012-04-12 | Tdk Corp | 電子回路モジュール部品 |
KR20170121666A (ko) * | 2016-04-25 | 2017-11-02 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060024647A1 (en) * | 2004-07-30 | 2006-02-02 | France Telecom | Method and apparatus for communicating graphical information to a visually impaired person using haptic feedback |
US7390740B2 (en) * | 2004-09-02 | 2008-06-24 | Micron Technology, Inc. | Sloped vias in a substrate, spring-like contacts, and methods of making |
KR20150037943A (ko) * | 2012-08-22 | 2015-04-08 | 엠파이어 테크놀로지 디벨롭먼트 엘엘씨 | 클라우드 프로세스 관리 |
US20160303838A1 (en) * | 2013-12-09 | 2016-10-20 | 3M Innovative Properties Company | Transparent conductive multilayer assembly |
KR101963277B1 (ko) * | 2016-06-23 | 2019-03-29 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
KR101983185B1 (ko) * | 2016-08-19 | 2019-05-29 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
KR101942727B1 (ko) * | 2016-09-12 | 2019-01-28 | 삼성전기 주식회사 | 팬-아웃 반도체 패키지 |
-
2018
- 2018-06-01 KR KR1020180063419A patent/KR102070563B1/ko active Active
- 2018-10-09 TW TW107135642A patent/TWI678789B/zh active
- 2018-10-16 US US16/161,797 patent/US20190371737A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000029227A (ko) * | 1998-10-30 | 2000-05-25 | 고사이 아끼오 | 전자파 차단판 |
WO2010029819A1 (ja) * | 2008-09-10 | 2010-03-18 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
JP2012074607A (ja) * | 2010-09-29 | 2012-04-12 | Tdk Corp | 電子回路モジュール部品 |
KR20170121666A (ko) * | 2016-04-25 | 2017-11-02 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112060254A (zh) * | 2020-09-18 | 2020-12-11 | 储小燕 | 一种增强材料装饰用刨花板制造加工工艺 |
Also Published As
Publication number | Publication date |
---|---|
TW202005044A (zh) | 2020-01-16 |
KR102070563B1 (ko) | 2020-01-29 |
TWI678789B (zh) | 2019-12-01 |
US20190371737A1 (en) | 2019-12-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR102086364B1 (ko) | 반도체 패키지 | |
JP6738401B2 (ja) | ファン−アウト半導体パッケージ | |
KR101982044B1 (ko) | 팬-아웃 반도체 패키지 | |
KR102029100B1 (ko) | 팬-아웃 반도체 패키지 | |
KR101982049B1 (ko) | 팬-아웃 반도체 패키지 | |
KR102039711B1 (ko) | 팬-아웃 부품 패키지 | |
KR102070563B1 (ko) | 전자파 차폐 구조물 및 이를 포함하는 반도체 패키지 | |
KR101963282B1 (ko) | 팬-아웃 반도체 패키지 | |
KR102055593B1 (ko) | 팬-아웃 반도체 패키지 | |
KR102028713B1 (ko) | 반도체 패키지 | |
KR101942727B1 (ko) | 팬-아웃 반도체 패키지 | |
KR20200114084A (ko) | 반도체 패키지 | |
KR102015909B1 (ko) | 팬-아웃 반도체 패키지 | |
KR102061564B1 (ko) | 팬-아웃 반도체 패키지 | |
KR102029101B1 (ko) | 반도체 패키지 | |
KR102484395B1 (ko) | 반도체 패키지 | |
KR20200111003A (ko) | 반도체 패키지 | |
KR101982057B1 (ko) | 팬-아웃 반도체 패키지 | |
KR20190063013A (ko) | 팬-아웃 반도체 패키지 | |
KR102639441B1 (ko) | 반도체 패키지 및 이에 이용되는 전자파 차폐 구조물 | |
KR102495574B1 (ko) | 반도체 패키지 | |
KR101982058B1 (ko) | 팬-아웃 반도체 패키지 | |
KR102063469B1 (ko) | 팬-아웃 반도체 패키지 | |
KR20200114313A (ko) | 반도체 패키지 | |
KR101982054B1 (ko) | 팬-아웃 반도체 패키지 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 20180601 |
|
PA0201 | Request for examination | ||
N231 | Notification of change of applicant | ||
PN2301 | Change of applicant |
Patent event date: 20190603 Comment text: Notification of Change of Applicant Patent event code: PN23011R01D |
|
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20190701 Patent event code: PE09021S01D |
|
AMND | Amendment | ||
E601 | Decision to refuse application | ||
PE0601 | Decision on rejection of patent |
Patent event date: 20190919 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20190701 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |
|
X091 | Application refused [patent] | ||
AMND | Amendment | ||
PX0901 | Re-examination |
Patent event code: PX09011S01I Patent event date: 20190919 Comment text: Decision to Refuse Application Patent event code: PX09012R01I Patent event date: 20190830 Comment text: Amendment to Specification, etc. |
|
PX0701 | Decision of registration after re-examination |
Patent event date: 20191022 Comment text: Decision to Grant Registration Patent event code: PX07013S01D Patent event date: 20191015 Comment text: Amendment to Specification, etc. Patent event code: PX07012R01I Patent event date: 20190919 Comment text: Decision to Refuse Application Patent event code: PX07011S01I Patent event date: 20190830 Comment text: Amendment to Specification, etc. Patent event code: PX07012R01I |
|
X701 | Decision to grant (after re-examination) | ||
PG1501 | Laying open of application | ||
GRNT | Written decision to grant | ||
PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 20200121 Patent event code: PR07011E01D |
|
PR1002 | Payment of registration fee |
Payment date: 20200122 End annual number: 3 Start annual number: 1 |
|
PG1601 | Publication of registration | ||
PR1001 | Payment of annual fee |
Payment date: 20221221 Start annual number: 4 End annual number: 4 |
|
PR1001 | Payment of annual fee |
Payment date: 20231226 Start annual number: 5 End annual number: 5 |
|
PR1001 | Payment of annual fee |
Payment date: 20241226 Start annual number: 6 End annual number: 6 |