KR20180024558A - Semiconductor module - Google Patents

Abstract

According to an embodiment, a semiconductor module comprises: a first substrate including a base layer, an insulation layer on the base layer, first and second electrode pads electrically separated on the insulation layer, and a heat radiation pad electrically separated from the first and second electrode pads between the first and second electrode pads; a second substrate arranged on the first substrate wherein the second substrate includes a body of a ceramic material; and a semiconductor element including first and second electrodes electrically separated on the second substrate. The heat radiation pad has a thicker thickness than thicknesses of the first and second electrodes and is arranged between the second substrate and the base layer. The second substrate comprises: first and second metal layers among the body and the first and second electrodes of the semiconductor element; third and fourth metal layers among the body and the first and second electrode pads of the first substrate; and a fifth metal layer separated from the third and fourth metal layers and arranged between the body and the heat radiation pad. Therefore, the semiconductor module can increase heat conductivity.

Description

[0001] SEMICONDUCTOR MODULE [0002]

An embodiment relates to a semiconductor module.

Semiconductor devices including compounds such as GaN and AlGaN have a wide and easily adjustable band gap energy and can be used as various devices such as light emitting devices, light receiving devices and various diodes.

Particularly, light emitting devices such as light emitting diodes and laser diodes using III-V or II-VI compound semiconductor materials of semiconductors can be used for various applications such as red, Blue, and ultraviolet rays. By using fluorescent materials or combining colors, it is possible to realize a white light beam with high efficiency. Also, compared to conventional light sources such as fluorescent lamps and incandescent lamps, low power consumption, , Safety, and environmental friendliness.

The embodiment provides a semiconductor module having a novel heat dissipation structure.

The embodiment provides a semiconductor module in which semiconductor elements are arranged on different substrates.

Embodiments provide a semiconductor module that improves thermal conductivity in regions of substrates that overlap vertically with semiconductor devices.

The embodiment provides a semiconductor module in which a substrate made of a ceramic material and a substrate made of a metal material are stacked in a vertical direction with a semiconductor element.

The semiconductor module according to the embodiment includes a base layer, an insulating layer on the base layer, first and second electrode pads electrically isolated on the insulating layer, and first and second electrode pads between the first and second electrode pads. A first substrate including a heat radiation pad electrically separated from an electrode pad; A second substrate disposed on the first substrate and including a body of ceramic material; And a semiconductor device including first and second electrodes electrically separated on the second substrate, wherein the heat radiation pad has a thickness greater than the thickness of the first and second electrode pads, Wherein the second substrate comprises first and second metal layers between the body and the first and second electrodes of the semiconductor device, a third and fourth metal layers between the body and the first and second electrode pads of the first substrate, 4 metal layer, and a fifth metal layer separated from the third and fourth metal layers and disposed between the body and the heat radiating pad.

In the semiconductor module according to the embodiment, the base layer includes a metal having a thermal conductivity of 200 W / mk or more, and the heat-radiating pad may include a metal having the same thermal conductivity as the base layer. In the semiconductor module according to the embodiment, the upper surface of the heat dissipation pad may have a larger area than the upper surface area of the semiconductor device.

In the semiconductor module according to the embodiment, the heat radiating pad may have a thickness equal to a sum of the thickness of the insulating layer and the first and second electrode pads. In the semiconductor module according to the embodiment, the heat dissipation pad may include at least one of Cu, Al, and Au.

In the semiconductor module according to the embodiment, the insulating layer may include a first opening in which the heat radiation pad is disposed between the first and second electrode pads.

In the semiconductor module according to the embodiment, the second substrate may include a first via-electrode connecting the first and third metal layers in the body, and a second via-electrode connecting the second and fourth metal layers, , And the distance between the first and second via electrodes may be wider than the width of the semiconductor element.

In the semiconductor module according to the embodiment, the distance between the first and second via-electrodes may be wider than the width of the heat-radiating pad in the first axis direction.

In the semiconductor module according to the embodiment, the width of the first opening in the first axial direction may be smaller than the interval between the first and second via electrodes and larger than the width of the heat radiating pad in the first axial direction.

The upper surface of the heat dissipation pad may be arranged in the same horizontal plane as the upper surface of the first and second electrode pads facing the third and fourth metal layers of the second substrate.

In the semiconductor module according to the embodiment, the width of the semiconductor element in the first axial direction may be smaller than the width of the heat radiating pad in the first axial direction.

In the semiconductor module according to the embodiment, at least one of a reflection member and a fluorescent film on the semiconductor element may be included around the semiconductor element.

Embodiments can improve the thermal conductivity by disposing flip-shaped semiconductor elements on a different substrate.

The embodiment can improve the heat radiation efficiency of the semiconductor element by providing a heat radiation path in the different substrate.

Embodiments can improve the reliability of a semiconductor device and a light emitting module or a semiconductor module including the semiconductor device.

1 is a side sectional view showing a semiconductor module according to an embodiment.
Figure 2 is an exploded view of the semiconductor module of Figure 1;
3 is a view showing a heat dissipation path of the semiconductor module of FIG.
4 is a first modification of the semiconductor module of Fig.
5 is a second modification of the semiconductor module of Fig.
6 is a third modification of the semiconductor module of Fig.
7 is a view showing a first example of the semiconductor device of FIG.
8 is a view showing a second example of the semiconductor device of FIG.

The embodiments may be modified in other forms or various embodiments may be combined with each other, and the scope of the present invention is not limited to each embodiment described below. Although not described in the context of another embodiment, unless otherwise described or contradicted by the description in another embodiment, the description in relation to another embodiment may be understood. For example, if the features of configuration A are described in a particular embodiment, and the features of configuration B are described in another embodiment, even if the embodiment in which configuration A and configuration B are combined is not explicitly described, It is to be understood that they fall within the scope of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. In the description of the embodiment according to the present invention, in the case of being described as being formed "on or under" of each element, the upper (upper) or lower (lower) or under are all such that two elements are in direct contact with each other or one or more other elements are indirectly formed between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

The semiconductor device may include various electronic devices such as a light emitting device and a light receiving device. The light emitting device and the light receiving device may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer. The semiconductor device according to this embodiment may be a light emitting device. The light emitting device emits light by recombination of electrons and holes, and the wavelength of the light can be determined by an energy band gap inherent to the material. Thus, the wavelength of the emitted light may vary depending on the composition of the material.

Hereinafter, a module having a semiconductor device according to an embodiment will be described with reference to the accompanying drawings. Throughout the accompanying drawings, the same or corresponding components are referred to by the same reference numerals, and redundant description is omitted.

FIG. 1 is a cross-sectional side view showing a semiconductor module according to an embodiment, FIG. 2 is an exploded view of the semiconductor module of FIG. 1, and FIG. 3 is a view illustrating a heat dissipation path of the semiconductor module of FIG.

1 to 3, the semiconductor module 100 includes a plurality of substrates 210 and 310 stacked in a vertical direction, and a semiconductor device 110 on the plurality of substrates 210 and 310. 2, a length X2 of the second substrate 310 in the X-axis direction may be smaller than a length X1 of the first substrate 210 in the X-axis direction. The X-axis direction and the Y-axis direction may be orthogonal to each other, and the Z-axis direction may be perpendicular to the X-axis and Y-axis directions.

The plurality of substrates 210 and 310 may include a different substrate, and the different substrate may be a substrate having different materials of the main constituent materials of the substrates 210 and 310. The different substrate may be a substrate having a different thickness from that of the layers constituting each substrate. The plurality of substrates 210 and 310 include a first substrate 210 and a second substrate 310 on the first substrate 210.

The first substrate 210 may be a thermally conductive substrate made of a metal material or a non-metal material. The second substrate 310 may be a ceramic substrate. As another example, the first substrate 210 may include a material having a higher thermal conductivity and a lower thermal resistance than the resin material. The second substrate 310 may include a ceramic material having a higher thermal conductivity and a lower thermal resistance than the resin material.

The first substrate 210 includes a base layer 211, an insulating layer 213 on the base layer 211, a plurality of electrode pads 221 and 223 on the insulating layer 213, A heat dissipation pad 220 may be disposed between the plurality of electrode pads 221 and 223. The base layer 211 may include at least one of copper (Cu), aluminum (Al), silver (Ag), a ceramic material, graphite, silicon (Si), and silicon carbide (SiC). The base layer 211 may include a material having a thermal conductivity of 150 W / mk or more, for example, 200 W / mk or more. The base layer 211 may be, for example, a copper material having a thermal conductivity of 200 W / mk or more. The base layer 211 may have a higher thermal conductivity than the thermal conductivity of the body 312 of the second substrate 310. The base layer 211 may be a layer having the greatest thickness among the layers in the first substrate 210 and may have a thickness of 70% or more of the thickness of the first substrate 210, for example. The base layer 211 may include, for example, a range of 0.8 mm to 1.5 mm. If the thickness of the base layer 211 is less than the above range, the thermal conductivity may be lowered and reliability of the semiconductor device 110 may be deteriorated or the rigidity may be lowered. If the thickness is larger than the above range, Can be thicker.

The insulating layer 213 may be a single layer or a multilayer using a dielectric material. The insulating layer 213 may include at least one of an epoxy resin, a phenol resin, and an unsaturated polyester resin, including pre-impregnated materials. The insulating layer 213 includes an insulating material or an insulating resin formed of at least one of oxide, nitride, fluoride, and sulfide having at least one of Al, Cr, Si, Ti, Zn, and Zr. The insulating layer 213 may be formed of, for example, SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , or TiO ₂ . If the thickness of the insulating layer 213 is less than the above range, the withstand voltage characteristic may be lowered. If the thickness of the insulating layer 213 is larger than the above range, the heat dissipating property may be deteriorated .

The insulating layer 213 has a first opening 230. The first opening 230 has a first width W1 in the X axis direction and an area larger than the bottom area of the semiconductor device 110 Lt; / RTI > The first openings 230 may be arranged to overlap with the semiconductor device 110 in the vertical direction Z. The first opening 230 may expose the upper surface of the base layer 211.

The electrode pads 221 and 223 include first and second electrode pads 221 and 223 separated from each other on the insulating layer 213. The first and second electrode pads 221 and 223 may be formed of a metal such as titanium, copper, nickel, gold, chromium, tantalum, platinum, Tin (Sn), silver (Ag), and phosphorous (P), and may be formed as a single layer or a multilayer. If the thickness of the electrode pads 221 and 223 is less than the above range, the thermal conductivity may be deteriorated. If the electrode pads 221 and 223 are thicker than the above range, the thickness of the module Can be increased.

The heat dissipation pad 220 may be disposed in the first opening 230 of the insulating layer 213. The width D1 of the heat radiating pad 220 in the X axis direction may be smaller than the width W1 D1 of the first opening 230 in the X axis direction and may have a width of 80% . The heat dissipation pad 220 may be disposed between the plurality of electrode pads 221 and 223. The heat radiating pad 220 may be formed of a material different from that of the electrode pads 221 and 223. The heat radiating pad 220 may be formed of the same material as the base layer 211. The heat radiating pad 220 may be formed of a metal or a non-metallic material having the same thermal conductivity as the base layer 211. The heat dissipation pad 220 may include at least one of Cu, Al, and Au. The heat radiation pad 220 may include a material having a thermal conductivity of 150 W / mk or more, for example, 200 W / mk or more.

The heat radiating pad 220 may have a thickness equal to a sum of the thickness of the insulating layer 213 and the thickness of the electrode pads 221 and 223. The upper surface of the heat dissipation pad 220 may be disposed on the same horizontal surface as the upper surface of the electrode pads 221 and 223. The heat dissipation pad 220 may be disposed to overlap the second substrate 310 and the semiconductor device 110 in the Z-axis direction. The Z-axis direction may be the thickness direction of the first substrate 210. The upper surface of the heat radiation pad 220 may not be higher or lower than the upper surface of the electrode pads 221 and 223. The heat-radiating pad 220 may have a thickness of 60 μm or more, for example, in a range of 60 μm to 140 μm. If the heat radiation pad 220 is smaller than the above range, the thermal conductivity may be lowered. If the heat radiation pad 220 is larger than the above range, the electrical conductivity through the electrode pads 221 and 223 may be lowered. The width D1 of the heat dissipation pad 220 in the X axis direction is wider than the width D2 of the semiconductor element 110 in the X axis direction so that the thermal resistance of the heat conducted from the semiconductor element 110 increases Or heat conduction.

The protective layer 231 is disposed on the electrode pads 221 and 223. The protective layer 231 may be selectively connected to the insulating layer 213 in a region where the electrode pads 221 and 223 are removed. The protective layer 231 may include a solder resist material. The protection layer 231 includes a second opening 240 for exposing the electrode pads 221 and 223 and the first and second electrode pads 221 and 223 and the heat dissipation pad 220 ) Can be exposed. That is, the second opening 240 is disposed on the first opening 230 and the width W2 in the X-axis direction may be greater than the width W1 in the X-axis direction of the first opening 230 .

The second substrate 310 is disposed on the first substrate 210. The bottom surface of the second substrate 310 may be smaller than the top surface of the first substrate 210. The area of the upper surface of the second substrate 310 may be larger than the upper surface area of the semiconductor device 110 and smaller than the upper surface of the first substrate 210. The area may be a surface area on the X- . Since the second substrate 310 has an area smaller than the size of the first substrate 210, the heat transmitted through the semiconductor device 110 can be effectively transferred to the first substrate 210.

The second substrate 310 includes a thermally conductive body 312, first and second metal layers 314 and 316 on the body 312, third and fourth metal layers 322 and 324 below the body 312, A fifth metal layer 326 separated from the third and fourth metal layers 322 and 324 under the second metal layer 312 and a plurality of via electrodes 318 and 320 in the body 312.

The body 312 includes an insulating material such as a ceramic material. The ceramic material includes a low temperature co-fired ceramic (LTCC) or a high temperature co-fired ceramic (HTCC) which is co-fired. The material of the body 312 may include a metal compound such as aluminum nitride (AlN). The body 312 may include a metal nitride having a thermal conductivity of 150 W / mK or more, for example, 170 W / mk or more. The body 312 of the second substrate 310 according to the embodiment is formed of a ceramic material so that the heat conducted from the semiconductor element 110 can be conducted to the heat radiation pad 220 of the first substrate 210.

As another example, the body 312 may be formed of an oxide , a carbide , a nitride , a nitride , or the like formed by bonding a metal element such as silicon ( Si ) , aluminum (Al) , titanium (Ti) , zirconium ( Zr ) ≪ / RTI > The body 312, as another example, silicon carbide (SiC), alumina (Al ₂ O _3), zirconium oxide (ZrO _2), silicon nitride (Si ₃ N _4), at least one of nitrogen, boron (BN) material . ≪ / RTI >

The body 312 includes a plurality of via electrodes 318 and 320, for example, first and second via electrodes 318 and 320. The via electrodes 318 and 320 are disposed in the Z-axis direction on the body 312 and may be provided as a power supply path in the Z-axis direction. Each of the first and second via electrodes 318 and 320 may be disposed in one or more than one. The distance D3 between the first and second via electrodes 318 and 320 may be further spaced from the width D2 < D3 in the X-axis direction of the semiconductor device 110. [ Accordingly, the heat conducted from the semiconductor device 110 can be conducted in the vertical direction through the ceramic body 312 disposed in the area between the via electrodes 318 and 320. If D2 &gt; = D3, the area of the heat dissipation pad 220 may be reduced, and the heat dissipation effect may be deteriorated, making it difficult to secure the power supply path.

The distance D3 between the via-electrodes 318 and 320 in the X-axis direction and the width D1 may have a relationship of D3 > D1. In this case, the width of the fifth metal layer 326 in the X- The heat concentration problem in the region between the fifth metal layer 326 and the heat radiating pad 220 can be minimized by making it possible to correspond to the width D1 in the axial direction.

Also, the distance D3 between the via-electrodes 318 and 320 in the X-axis direction and the first width W1 of the first opening 230 may have a relationship of D3? W1, for example, a relationship of D3 > W1 have. In the case of the interval D3 = W1, there is a limitation on the increase in the area of the heat-radiating pad 220, so that the heat is dispersed through the ceramic body 312 so that the interval D3> W1, To the pad 220 / base layer 211. The width W1 of the first opening 230 in the first axial direction is smaller than the distance D3 between the first and second via electrodes 328 and 320 and the width of the heat radiating pad 220 in the first axial direction (D1). Also, the semiconductor module may have a relationship of D2 > D3 > W1 > D1 in the X axis direction, or D2 > D3 = W1 > D1.

 The first and second via electrodes 318 and 320 disposed in the body 312 may be disposed in a region not overlapping the semiconductor device 110 in the Z axis direction. The first and second via electrodes 318 and 320 may be formed of one selected from the group consisting of Ti, Pd, Cu, Ni, Au, Cr, Ta, ), Tin (Sn), phosphorus (P), or an alloy thereof, and may be formed as a single layer or a multilayer.

The first and second metal layers 314 and 316 are disposed on the upper surface of the body 312 and the first and second metal layers 314 and 316 are electrically connected to the first and second electrodes 127 and 129 of the semiconductor device 110. have. The first and second metal layers 314 and 316 may be formed of one selected from the group consisting of Ti, Pd, Cu, Ni, Au, Cr, Ta, , Tin (Sn), silver (Ag), and phosphorous (P), or an alloy thereof, and may be formed as a single layer or a multilayer.

A part of the first and second metal layers 314 and 316 may be disposed to overlap with the semiconductor device 110 in the Z-axis direction. The first and second metal layers 314 and 316 may be connected between the body 312 and the first and second electrodes 127 and 129 of the semiconductor device 110. The first metal layer 314 is bonded to the first electrode 127 of the semiconductor device 110 and the bonding member 151 and the second metal layer 316 is bonded to the second electrode of the semiconductor device 110 129 and the bonding member 152. [0052] The bonding members 151 and 152 may include a conductive material such as a solder paste material.

The lower portion of the second substrate 310 may be disposed in the second opening portion 240 of the first substrate 210. For example, the third to fifth metal layers 322, 324 and 326 of the second substrate 310 may be disposed in the second opening 240 of the first substrate 210.

The third metal layer 322 is located on the opposite side of the first metal layer 314 with respect to the body 312 and the fourth metal layer 324 is positioned on the second metal layer 316, respectively. The third metal layer 322 may be connected to the first metal layer 314 through a first via electrode 318. The fourth metal layer 324 may be connected to the second metal layer 316 through a second via electrode 320. The third and fourth metal layers 322 and 324 may be connected between the body 312 and the first and second electrode pads 221 and 223 of the first substrate 210. The third and fourth metal layers 322 and 324 may be disposed in a region that is not overlapped with the semiconductor device 110 in the Z-axis direction.

The fifth metal layer 326 may be disposed between the third and fourth metal layers 322 and 324 on the bottom surface of the body 312. The fifth metal layer 326 may be formed of the same material as the third and fourth metal layers 322 and 324. The fifth metal layer 326 may be separated from the third and fourth metal layers 322 and 324 and may be connected between the body 312 and the heat radiating pad 220. The fifth metal layer 326 may be electrically and physically separated from the third and fourth metal layers 322 and 324 in the Z-axis direction and overlapped with the semiconductor device 110. The third to fifth metal layers 322, 3332 and 326 may be formed of a material selected from the group consisting of Ti, Pd, Cu, Ni, Au, Cr, ), At least one of platinum (Pt), tin (Sn), silver (Ag) and phosphorus (P) or an alloy thereof.

The third metal layer 322 may be electrically connected to the first electrode pad 221 of the first substrate 210 by bonding with the bonding member 251. The fourth metal layer 324 may be electrically connected to the second electrode pad 223 of the second substrate 310 by a bonding member 252. The fifth metal layer 326 may be thermally connected to the heat dissipation pad 220 of the second substrate 310 with a bonding member 253. The bottom surface area of the fifth metal layer 326 is equal to or smaller than the top surface area of the heat radiation pad 220 to prevent heat from being concentrated in the heat radiation pad 220.

The second substrate 310 may be disposed on the first substrate 210 and the plurality of second substrates 310 may be disposed on the first substrate 210 in one column or two columns Or more.

The semiconductor device 110 has first and second electrodes 127 and 129 disposed thereunder. Since the first and second electrodes 127 and 129 are disposed on the first substrate 210 in a face-to-face manner, the semiconductor device 110 may be disposed on the first substrate 210 in a flip chip structure.

The semiconductor device 110 may emit at least one of blue, green, red, or white light. The semiconductor device 110 may selectively emit light in a range of visible light, ultraviolet light, or infrared light. The semiconductor device 110 may include at least one of an ultraviolet (UV) LED, a red LED, a blue LED, a green LED, a yellow green LED, an infrared ray or a white LED.

The first electrode 127 and the second electrode 129 of the semiconductor device 110 may be disposed separately from each other. The first electrode 127 and the second electrode 129 may be formed of a metal such as gold (Au), nickel (Ni), chromium (Cr), tantalum (Ta), platinum (Pt), tin ), Phosphorus (P), titanium (Ti), palladium (Pd), and copper (Cu) or an alloy thereof. At least one of the first electrode 127 and the second electrode 129 may have an arm pattern, and the arm pattern may diffuse current.

The upper surface of the semiconductor device 110 may include a pattern for extracting light, which may change the critical angle of emitted light. The semiconductor device 110 may include a light receiving element that receives light. The semiconductor device 110 may electrically protect the LED, for example, a thyristor, a zener diode, or a TVS (Transient Voltage Suppression).

The width D2 of the semiconductor device 110 in the X axis direction may be smaller than the width D1 of the heat radiation pad 220 in the X axis direction. The width of the semiconductor element 110 in the Y-axis direction may be smaller than the width of the heat radiation pad 220 in the Y-axis direction. The heat generated when the semiconductor device 110 is driven is conducted to the heat radiation pad 220 and the base layer 211 of the first substrate 210 through the body 312 of the second substrate 310 , And can be dissipated. The body 312 of the second substrate 310 and the base layer 211 of the first substrate 210 are provided as different types of thermally conductive materials so that the heat generated from the semiconductor elements 110 can be effectively It can radiate heat. The width D1 in the X axis direction of the semiconductor element 100 may be in a range of 50% or more, for example, 50% to 85% of the width D1 in the X axis direction of the heat radiation pad 220. [ This is because when the width D1 of the semiconductor device 100 is smaller than the above range, the light output may be lowered, and if the width D1 is larger than the above range, the improvement of the heat radiation effect may be insignificant.

2, a heat radiation pad 220 is disposed in a first opening 230 of an insulating layer 213 of the first substrate 210 and a heat dissipation pad 220 is disposed in a second opening 240 of the protection layer 231. [ The pad 220, and the first and second electrode pads 221 and 223 are exposed. The second substrate 310 corresponds to the first substrate 210 and may be bonded to the bonding members 251, 252, and 253. Here, before bonding the semiconductor device 110, the second substrate 310 may be bonded to the first substrate 210, or the semiconductor device 110 may be bonded to the second substrate 310 The second substrate 310 may be mounted on the first substrate 210.

2 and 3, the heat dissipation pad 220 of the first substrate 210 and the heat dissipation pad 220 of the second substrate 210 are in direct contact with the base layer 211, The thermal resistance R2 between the fifth metal layer 326 of the substrate 310 can be lowered. The thermal resistance R1 between the semiconductor device 110 and the first substrate 210 can be lowered by the thermal resistance R2 between the second substrate 310 and the first substrate 210, The reliability of the semiconductor device 110 with respect to heat can be improved.

The heat dissipation pad 220 has a top surface area in a range of 20% to 80% of the bottom surface area of the second substrate 310, The heat can be conducted through the base layer 211. When the top surface area of the heat radiation pad 220 is smaller than the area, the thermal conductivity may be lowered, and when the area is larger than the area, the contact ratio of the electrode pad may be reduced.

When the base layer 211 of the first substrate 210 is made of a metal material or a thermally conductive material, the first substrate 210 may be formed of the semiconductor device 110 and may be connected to the second substrate 310 through the first and second electrodes 127 and 129 And the second substrate 310 conducts heat to the heat dissipation pad 220 through the first and second metal layers 314 and 316, the body 312 and the fifth metal layer 326, and the base layer 211 Can spread the conducted heat through the entire area P1.

The heat conducted to the third and fourth metal layers 322 and 324 of the first substrate 210 is dissipated through the first and second electrode pads 221 and 223 of the first substrate 210 or through the insulating layer 213 And may be conducted to the base layer 211. In this case, since the heat resistance of the insulating layer 213 of the first substrate 210 is high, most of the heat generated from the semiconductor element 110 is low in the thermal resistance of the body 312 of the first substrate 210 The fifth metal layer 326 and the heat-radiating pad 220 can be conducted and dissipated.

4 is a first modification of the semiconductor module of Fig. In the description of FIG. 4, the same configuration as that of the above embodiment will be described with reference to the above description of the embodiment, and redundant description will be omitted.

4, one or a plurality of second substrates 310 may be disposed on a first substrate 210, and a plurality of semiconductor devices 110 may be disposed on the second substrate 310 And includes a reflective member 180 around it. The reflective member 180 may be disposed on the first substrate 210 and around the reflective member 180. The reflective member 180 may extend to a side of the upper layer of the semiconductor device 110, for example, the transparent substrate 11. The upper layer may be a transparent resin layer, but is not limited thereto.

The reflective member 180 may reflect the side light emitted from the semiconductor device 110 in an upward direction. The reflective member 180 includes a non-metallic material or an insulating material, and may be formed of a resin material such as silicon or epoxy. The reflective member 180 may include an impurity having a refractive index higher than that of the resin material. At least one of compounds such as oxides, nitrides, fluorides, and sulfides having at least one of Al, Cr, Si, Ti, Zn, and Zr may be added to the reflective member 180. The reflective member 180 may include at least one of TiO ₂ , SiO ₂ , and Al ₂ O ₃ , for example.

The upper end of the reflective member 180 is disposed at the same level as or lower than the upper surface of the semiconductor element 110 so as not to affect the directivity angle distribution of the light emitted from the semiconductor element 110. The thickness of the reflective member 180 may gradually decrease as the distance from the semiconductor device 110 increases. The reflective member 180 may be disposed on the first and second metal layers 314 and 316 of the second substrate 310 to protect the first and second metal layers 314 and 316. The reflective member 180 may block moisture penetrating the surface of the second substrate 310. The reflective member 180 may adhere to the surface of the body 312 of the second substrate 310 to prevent moisture penetration.

Since the reflective member 180 has a compound therein, it may be a thermally conductive material. The reflective member 180 of the thermally conductive material may be disposed of a material having a higher thermal conductivity than that of the insulating layer, thereby improving heat radiation.

5 is a second modification of the semiconductor module of Fig. In the description of FIG. 5, the same configuration as that of the above embodiment will be described with reference to the above description of the embodiment, and redundant description will be omitted.

5, one or a plurality of second substrates 310 may be disposed on the first substrate 210, and the semiconductor device 110 may be disposed on the second substrate 310 And may include a reflective member 180 and a fluorescent film 190 on the semiconductor element 110. The fluorescent film 190 may be in contact with or spaced from the upper surface of the semiconductor element 100.

The fluorescent film 190 converts the wavelength of a part of light emitted from the semiconductor device 110, for example, an LED. The fluorescent film 190 may include at least one of a red phosphor, a green phosphor, a blue phosphor, and a yellow phosphor, but the present invention is not limited thereto. The phosphor may be selectively formed from among YAG, TAG, Silicate, Nitride, and Oxy-nitride based materials.

The width D4 in the X axis direction of the fluorescent film 190 is larger than the width D2 in the X axis direction of the semiconductor element 110 and less than the width X2 in the X axis direction of the second substrate 310 It is not limited thereto. A surface having roughness may be formed on the upper surface or the lower surface of the fluorescent film 190. The lower surface area of the fluorescent film 190 may be larger than the upper surface area of the semiconductor device 110, thereby improving the wavelength conversion efficiency of incident light.

The light emitted through the fluorescent film 190 may emit at least one of warm white, pure white, and cool white. The warm white may have a color temperature of 4500K or less, and the cool white may have a color temperature of cool white of 5000K to 6000K. The pure white may be disposed between the color temperature of the cool white and the color temperature of the cool white. In the case where the fluorescent film / semiconductor device 110 / second substrate having different color temperatures are arranged on the first substrate 210, the semiconductor devices 110 having different color temperatures are used to adjust the CRI rendering index can be improved.

5 is a second modification of the semiconductor module of Fig. In the description of FIG. 5, the same configuration as that of the above embodiment will be described with reference to the above description of the embodiment, and redundant description will be omitted.

5, one or a plurality of second substrates 310 may be disposed on the first substrate 210, and the semiconductor device 110 may be disposed on the second substrate 310 A fluorescent film on the semiconductor element 110, and an optical lens 195 on the fluorescent film and the reflective member 180. The reflective member 180 is provided on the reflective element 180,

The optical lens 195 may include a hemispherical or aspherical lens shape on the first substrate 210. When the optical lens 195 is an aspherical lens, it is possible to reduce the height of the optical lens 195 and diffuse the emitted light to reduce the color separation phenomenon. The optical lens 195 may be in contact with the upper surface of the fluorescent film 190 and extend to the upper surface of the reflective member 180. The outer surface of the optical lens 195 may be disposed around the reflective member 180 The first and second metal layers 314 and 316 may be in contact with each other.

The optical lens 195 may be formed of a transparent resin material such as silicon or epoxy. As another example, the optical lens 195 may be formed of a glass material or a transparent plastic material.

The optical lens 195 refracts and extracts light that has passed through the fluorescent film 190, or refracts the light reflected by the reflection member 180. The light emitted to this optical lens 195 can provide a uniform light-directed angular distribution. The orientation angle of the semiconductor element 110 having the optical lens 195 can be formed to be in a range of 125 degrees or more, for example, in a range of 128 degrees to 140 degrees, thereby improving the directivity. Further, by arranging the reflection member 180 around the semiconductor element 110, the light flux can be improved.

7 is a view showing a first example of the semiconductor device according to the embodiment.

Referring to Fig. 7, the semiconductor device can emit blue, green or red light, for example, as an LED chip. The semiconductor device includes a transparent substrate 11 and a semiconductor structure 13. The transparent substrate 11 is disposed on the semiconductor structure 13. The semiconductor structure 13 includes first and second electrodes 127, 129).

The translucent substrate 11 may be, for example, a translucent, conductive substrate or an insulating substrate. A plurality of protrusions (not shown) may be formed on the upper surface and / or the lower surface of the transparent substrate 11, and each of the plurality of protrusions may include at least one of a side surface, a hemispherical shape, a polygonal shape, , Stripe form, or matrix form. The protrusions can improve the light extraction efficiency. A semiconductor layer such as a buffer layer (not shown) may be disposed between the transmissive substrate 11 and the first conductivity type semiconductor layer 13A. However, the present invention is not limited thereto. The transparent substrate 11 can be removed.

The semiconductor structure includes a first conductive semiconductor layer 13A, a second conductive semiconductor layer 13C, and an active layer 13B between the first and second conductive semiconductor layers 13A and 13C. Other semiconductor layers may be disposed above and / or below the active layer 13B, but the present invention is not limited thereto.

The first conductive semiconductor layer 13A may be disposed between the transparent substrate 11 and the active layer 13B. The first conductive semiconductor layer 13A may be formed of at least one of Group III-V and Group II-VI compound semiconductors doped with a first conductivity type dopant. The first conductivity type semiconductor layer 13A may be a semiconductor having a composition formula of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + May be formed of a material. The first conductive semiconductor layer 13A may include at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP and AlGaInP. The first conductive semiconductor layer 13A may be an n-type semiconductor layer doped with an n-type dopant such as Si, Ge, Sn, Se or Te. The first conductive semiconductor layer 13A may be a single layer or a multi-layered structure. The first conductive semiconductor layer 13A may have a superlattice structure in which at least two different layers are alternately arranged. The first conductive semiconductor layer 13A may be an electrode contact layer.

The active layer 13B may be disposed between the first conductive semiconductor layer 13A and the second conductive semiconductor layer 13C. The active layer 13B may be formed of at least one of a single well, a single quantum well, a multi-well, a multi quantum well (MQW) structure, a quantum-wire structure, or a quantum dot structure . Electrons (or holes) injected through the first conductive type semiconductor layer 13A and holes (or electrons) injected through the second conductive type semiconductor layer 13C meet with each other in the active layer 13B, And is a layer that emits light due to a band gap difference of an energy band according to a material of the active layer 13B. The active layer 13B may be formed of a compound semiconductor. The active layer 13B may be formed of at least one of Group II-VI and Group III-V compound semiconductors, for example. In the case where the active layer 13B is implemented as a multi-well structure, the active layer 13B includes a plurality of alternately arranged well layers and a plurality of barrier layers, and the pair of well layers / . InGaN / AlGaN, InGaN / AlGaN, InGaN / InGaN, AlGaAs / GaAs, InGaAs / GaAs, InGaP / GaP, AlInGaP / InGaP, or InGaN / AlGaN. InP / GaAs < / RTI &gt; pair. The well layer may be disposed of a semiconductor material having a composition formula of, for example, In _x Al _y Ga _{1 -x- y} N (0 <x? 1, 0? Y? 1, 0? _X + y < The barrier layer may be formed of a semiconductor material having a composition formula of In _x Al _y Ga _{1 -x- y} N (0? _X? 1, 0? Y? 1, 0? _X + y <

The second conductivity type semiconductor layer 13C may be a semiconductor having a composition formula of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + May be formed of a material. The second conductive semiconductor layer 13C may include at least one of, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, May be a doped p-type semiconductor layer. The second conductivity type semiconductor layer 13C may be a single layer or a multilayer. The second conductive semiconductor layer 13C may have a superlattice structure in which at least two different layers are alternately arranged. The second conductivity type semiconductor layer 13C may be an electrode contact layer.

The semiconductor structure 13 may include the first conductivity type semiconductor layer 13A to the second conductivity type semiconductor layer 13C. As another example, the semiconductor structure 13 may be implemented by any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure.

The first and second electrodes 127 and 129 may be disposed under the semiconductor structure 13. The first electrode is in contact with and electrically connected to the first conductive type semiconductor layer 13A, and the second electrode is in contact with and electrically connected to the second conductive type semiconductor layer 13C.

The first electrode 127 and the second electrode 129 may be made of a metal having the characteristics of an ohmic contact, an adhesive layer, and a bonding layer, and may not be transparent. The first and second electrodes 127 and 129 may have a polygonal or circular bottom shape.

The semiconductor device 110 includes first and second electrode layers 121 and 122, a third electrode layer 113, and insulating layers 124 and 125. Each of the first and second electrode layers 121 and 122 may be formed as a single layer or a multilayer, and may function as a current diffusion layer. The first and second electrode layers 121 and 122 include a first electrode layer 121 disposed under the semiconductor structure 13; And a second electrode layer 122 disposed under the first electrode layer 121. The first electrode layer 121 diffuses a current, and the second electrode layer 121 reflects incident light.

The first and second electrode layers 121 and 122 may be formed of different materials. The first electrode layer 121 may be formed of a light-transmitting material, for example, a metal oxide or a metal nitride. The first electrode layer 121 may be formed of one of indium tin oxide (ITO), indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (IZO) , Indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO) and gallium zinc oxide (GZO). The second electrode layer 122 is in contact with the lower surface of the first electrode layer 121 and may function as a reflective electrode layer. The second electrode layer 122 includes a metal such as Ag, Au, or Al. The second electrode layer 122 may partially contact the lower surface of the second conductivity type semiconductor layer 13C when a portion of the first electrode layer 121 is removed.

As another example, the structures of the first and second electrode layers 121 and 122 may be stacked in an omni directional reflector layer (ODR) structure. The omnidirectional reflection structure may have a laminated structure of a first electrode layer 121 having a low refractive index and a second electrode layer 122 made of a highly reflective metal material in contact with the first electrode layer 121. The electrode layers 121 and 122 may have a laminated structure of, for example, ITO / Ag. The total reflection angle can be improved at the interface between the first electrode layer 121 and the second electrode layer 122.

As another example, the second electrode layer 122 may be removed and may be formed of a reflective layer of another material. The reflective layer may be formed of a distributed Bragg reflector (DBR) structure. The distributed Bragg reflector structure includes a structure in which two dielectric layers having different refractive indices are alternately arranged. For example, a SiO2 layer, A Si3N4 layer, a TiO2 layer, an Al2O3 layer, and a MgO layer, respectively. As another example, the electrode layers 121 and 122 may include both a dispersed Bragg reflection structure and an omnidirectional reflection structure. In this case, a light emitting chip having a light reflectance of 98% or more can be provided. Since the light emitted from the second electrode layer 122 is emitted through the light-transmissive substrate 11, the light-emitting chip mounted with the flip method can emit most of the light in the vertical direction.

The third electrode layer 123 is disposed under the second electrode layer 122 and is electrically insulated from the first and second electrode layers 121 and 122. The third electrode layer 123 may be formed of a metal such as titanium, copper, nickel, gold, chromium, tantalum, platinum, tin, ), Silver (Ag), and phosphorus (P). A first electrode 127 and a second electrode 129 are disposed under the third electrode layer 123.

The insulating layers 124 and 125 prevent unnecessary contact between the first and second electrode layers 121 and 122, the third electrode layer 123, the first and second electrodes 127 and 129, and the semiconductor structure 13. The insulating layers 124 and 125 include first and second insulating layers 135 and 135. The first insulating layer 124 is disposed between the third electrode layer 123 and the second electrode layer 122. The second insulating layer 125 is disposed between the third electrode layer 123 and the first and second electrodes 127 and 129.

The third electrode layer 123 is connected to the first conductive semiconductor layer 13A. The connection portion 123A of the third electrode layer 123 protrudes in a via structure through the first and second electrode layers 121 and 122 and the lower portion of the semiconductor structure 13 and is in contact with the first conductivity type semiconductor layer 13A do. The connection portions 123A may be arranged in plural. A part 124A of the first insulating layer 124 extends around the connection part 123A of the third electrode layer 123 to form the third electrode layer 123 and the first and second electrode layers 121 and 122, Type semiconductor layer 13C and the active layer 13B. The side surface of the semiconductor structure 13 may be provided with an insulating layer for side protection, but the present invention is not limited thereto.

The second electrode 129 is disposed below the second insulating layer 125 and is in contact with at least one of the first and second electrode layers 121 and 122 through an open region of the second insulating layer 125, do. The first electrode 127 is disposed below the second insulating layer 125 and is connected to the third electrode layer 113 through an open region of the second insulating layer 125. The protrusion 129A of the second electrode 129 is electrically connected to the second conductivity type semiconductor layer 13C through the first and second electrode layers 121 and 122 and the protrusion 127A of the first electrode 127 Is electrically connected to the first conductivity type semiconductor layer 13A through the third electrode layer 113. [

A plurality of connection portions 123A connected to the first electrode 127 can be disposed to improve current diffusion. The first and second electrodes 127 and 129 may be provided under the semiconductor structure 13 in a large area. The lower surfaces of the first and second electrodes 127 and 129 can be disposed on the same horizontal plane, thereby improving the bonding efficiency.

8 is a second modification of the semiconductor device according to the embodiment. In describing the second modification, the same parts as those described above will be described with reference to the above description.

8, the semiconductor device includes a transparent substrate 11, a semiconductor structure 13, an electrode layer 131, and an insulating layer 133. The material of the electrode layer 131 and the insulating layer 133 will be described with reference to the above description.

The light emitting device includes a first electrode 137 and a second electrode 139 below the semiconductor structure 13. The first electrode 137 may include a first contact layer 135, a first connection layer 141 and a first bonding layer 142. The first contact layer 135 may include a first conductive semiconductor Layer 13A and the first connection layer 141 is connected between the first contact layer 135 and the first bonding layer 142. [ The first connection layer 141 and the first bonding layer 142 may be arranged in a multi-layer structure. The first contact layer 135 may include at least one of Cr, Ti, and Ta and an optional alloy thereof. The first contact layer 141 may include one or more of Al, Ti, Fe, Ni, And the first bonding layer 142 may include at least two of In, Sn, Ni, Au, and their alloys.

The second electrode 139 includes a second contact layer 136, a second connection layer 143 and a second bonding layer 144. The second contact layer 136 may include a second conductive semiconductor Layer 13 C and the second connection layer 143 is connected between the second contact layer 136 and the second bonding layer 144. The second contact layer 136, the second connection layer 143, and the second bonding layer 144 may be disposed in a single layer or a multi-layer structure. The second contact layer 136 may include at least one of Cr, Ti, and Ta and an optional alloy thereof. The second contact layer 143 may include Al, Ti, Cu, Ag, Pt, Alloy, and the first bonding layer 144 may include at least two of In, Sn, Cu, Au, and their alloys.

The semiconductor element 110 may be provided with a support member 151 under the semiconductor structure 13. The supporting member 151 is formed of an insulating material, and the insulating material is formed of a resin layer such as silicon or epoxy. As another example, the insulating material may include a paste or an insulating ink. The insulating material may be selected from the group consisting of polyacrylate resin, epoxy resin, phenolic resin, polyamides resin, polyimides rein, unsaturated polyesters resin, polyphenylene ether resin (PPE), polyphenylene oxide resin (PPO), polyphenylenesulfide resin, cyanate ester resin, benzocyclobutene (BCB), Polyamido-amine Dendrimers (PAMAM), and Polypropylene-imine, Dendrimers (PPI), and PAMAM-internal structures and PAMAM-OS (organosilicon) with organic-silicone outer surfaces alone or combinations thereof .

At least one of compounds such as oxides, nitrides, fluorides and sulfides having at least one of Al, Cr, Si, Ti, Zn and Zr may be added to the support member 151. Here, the compound added to the support member 151 may be a heat spreader, and the heat spreader may be used as powder particles, pellets, fillers, and additives having a predetermined size. For convenience of explanation, The diffusion agent will be described. The heat spreader may include a ceramic material. The ceramic material may include a low temperature co-fired ceramic (LTCC), a high temperature co-fired ceramic (HTCC), an alumina, Quartz, calcium zirconate, forsterite, SiC, graphite, fused silica, mullite, cordierite, zirconia, beryllia, ), And aluminum nitride. The ceramic material is, for _{example, SiO 2, Si x O y} , Si 3 N 4, Si x N y (x, y≥0.1), SiO x N y (x, y≥0.1), Al 2 O 3, BN, (SiC-BeO), BeO, CeO, AlN or the like. The thermally conductive material may comprise a component of C (diamond, CNT).

The support member 151 may be formed as a single layer or a multilayer, but is not limited thereto. By including the powder of the ceramic material in the support member 151, the strength of the support member 151 can be improved and the thermal conductivity can also be improved. The support member 151 may be formed to have a thickness of 2 탆 or more, and when the support member 151 is formed to be less than 2 탆, the support of the support member 151 and improvement of the thermal conductivity may be insignificant.

The support member 151 may be disposed in a structure in which a first support member disposed around the first electrode 137 and a second support member disposed around the second electrode 139 are separated from each other , Heat generated from each electrode can be dissipated.

The semiconductor module according to the embodiment includes devices such as an interior lamp, an outdoor lamp, a street lamp, an automobile lamp, a headlight or tail lamp of a moving or fixing device, and an indicator lamp. The light emitting side of the semiconductor module according to the embodiment may include at least one of a light guide plate, a diffusion sheet, and a prism sheet.

The semiconductor module may be used as a light source of a lighting system, for example, as a light source of an image display device or a lighting device. When used as a backlight unit of a video display device, it can be used as an edge type backlight unit or as a direct-type backlight unit. When used as a light source of a lighting device, it can be used as a regulator or a bulb type. It is possible.

A light emitting device using a semiconductor device includes a laser diode in addition to the light emitting diode described above. Like the light emitting device, the laser diode may include a first conductivity type semiconductor layer having the structure described above, an active layer, and a second conductivity type semiconductor layer. Then, electro-luminescence (electroluminescence) phenomenon in which light is emitted when an electric current is applied after bonding the p-type first conductivity type semiconductor and the n-type second conductivity type semiconductor is used, And phase. That is, the laser diode can emit light having one specific wavelength (monochromatic beam) with the same phase and in the same direction by using a phenomenon called stimulated emission and a constructive interference phenomenon. It can be used for optical communication, medical equipment and semiconductor processing equipment.

As the light receiving element, a photodetector, which is a kind of transducer that detects light and converts the intensity of the light into an electric signal, is exemplified. As such a photodetector, a photodiode (e.g., a PD with a peak wavelength in a visible blind spectral region or a true blind spectral region), a photodiode (e.g., a photodiode such as a photodiode (silicon, selenium), a photoconductive element (cadmium sulfide, cadmium selenide) , Photomultiplier tube, phototube (vacuum, gas-filled), IR (Infra-Red) detector, and the like.

In addition, a semiconductor device such as a photodetector may be fabricated using a direct bandgap semiconductor, which is generally excellent in photo-conversion efficiency. Alternatively, the photodetector has a variety of structures, and the most general structure includes a pinned photodetector using a pn junction, a Schottky photodetector using a Schottky junction, and a metal-semiconductor metal (MSM) photodetector have.

The photodiode, like the light emitting device, may include the first conductivity type semiconductor layer having the structure described above, the active layer, and the second conductivity type semiconductor layer, and may have a pn junction or a pin structure. The photodiode operates by applying reverse bias or zero bias. When light is incident on the photodiode, electrons and holes are generated and a current flows. At this time, the magnitude of the current may be approximately proportional to the intensity of the light incident on the photodiode.

A photovoltaic cell or a solar cell is a type of photodiode that can convert light into current. The solar cell, like the light emitting device, may include the first conductivity type semiconductor layer, the active layer and the second conductivity type semiconductor layer having the above-described structure.

In addition, it can be used as a rectifier of an electronic circuit through a rectifying characteristic of a general diode using a p-n junction, and can be applied to an oscillation circuit or the like by being applied to a microwave circuit.

In addition, the above-described semiconductor element is not necessarily implemented as a semiconductor, and may further include a metal material as the case may be. For example, a semiconductor device such as a light receiving element may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, Or may be implemented using a doped semiconductor material or an intrinsic semiconductor material.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

11: Transparent substrate 13: Semiconductor structure
127, 129: electrode 110: semiconductor element
180: reflective member 190: fluorescent film
210: first substrate 211: base layer
213: insulation layer 220: heat radiation pad
221, 223: electrode pads 230, 240:
231: Protective layer

Claims (14)

A base layer, an insulating layer on the base layer, first and second electrode pads electrically isolated on the insulating layer, and a heat dissipation electrically separated from the first and second electrode pads between the first and second electrode pads A first substrate comprising a pad;
A second substrate disposed on the first substrate and having a ceramic body; And
And a semiconductor device including first and second electrodes electrically separated on the second substrate,
Wherein the heat dissipation pad has a thickness greater than a thickness of the first and second electrode pads and is disposed between the second substrate and the base layer,
The second substrate includes first and second metal layers between the body and the first and second electrodes of the semiconductor device, a third and a fourth metal layer between the body and the first and second electrode pads of the first substrate, And a fifth metal layer separated from the third metal layer and disposed between the body and the heat radiating pad. The method of claim 1, wherein the base layer comprises a metal having a thermal conductivity of at least 200 W / mk,
Wherein the heat dissipation pad comprises a metal having the same thermal conductivity as the base layer. The semiconductor module according to claim 1, wherein an upper surface of the heat dissipation pad has an area larger than a top surface area of the semiconductor element. The semiconductor module according to claim 3, wherein the heat radiating pad has a thickness equal to a sum of thicknesses of the insulating layer and the first and second electrode pads. The semiconductor module of claim 4, wherein the heat dissipation pad comprises at least one of Cu, Al, and Au. 5. The semiconductor module of claim 4, wherein the body comprises aluminum nitride. The semiconductor module according to any one of claims 1 to 6, wherein the insulating layer includes a first opening in which the heat radiation pad is disposed between the first and second electrode pads. [8] The plasma display panel of claim 7, wherein the second substrate includes a first via electrode connecting the first and third metal layers in the body, and a second via electrode connecting the second and fourth metal layers,
Wherein the first and second via electrodes are spaced apart from each other in the first axis direction,
And the distance between the first and second via electrodes is larger than the width of the semiconductor element in the first axis direction. The semiconductor module according to claim 8, wherein a distance between the first and second via electrodes is larger than a width of the heat dissipation pad in a first axis direction. The semiconductor module according to claim 8, wherein a width of the first opening in a first axis direction is smaller than an interval of the first and second via electrodes and larger than a width of the heat radiation pad in a first axis direction. The semiconductor module according to claim 10, wherein the upper surface of the heat dissipation pad is disposed in the same horizontal plane as the upper surface of the first and second electrode pads facing the third and fourth metal layers of the second substrate. The semiconductor module according to claim 7, wherein a width of the semiconductor element in a first axis direction is smaller than a width of the heat radiation pad in a first axis direction. The semiconductor module according to claim 7, comprising at least one of a reflective member around the semiconductor element and a fluorescent film on the semiconductor element. 8. The semiconductor module of claim 7, wherein a plurality of the second substrates are disposed on the first substrate.

Images