KR20180059257A - Semiconductor module - Google Patents

Abstract

A semiconductor module disclosed in embodiments includes a base layer; a wiring layer having a plurality of electrode pads and recesses on the base layer; and a circuit board having a resin layer on the base layer; and a semiconductor element arranged on the plurality of electrode pads of the circuit board. The resin layer is formed of a reflective material. The resin layer is extended to the recess of the wiring layer. The upper surface of the resin layer is disposed lower than the lower surface of the semiconductor element. The light reflection efficiency of the semiconductor module can be improved.

Description

[0001] SEMICONDUCTOR MODULE [0002]

An embodiment relates to a semiconductor module.

The embodiment relates to a semiconductor module in which a plurality of semiconductor elements are arranged on a circuit board.

The embodiment relates to a semiconductor module having a plurality of semiconductor light emitting elements.

Semiconductor devices including compounds such as GaN and AlGaN have a wide and easily adjustable band gap energy and can be used as various devices such as light emitting devices, light receiving devices and various diodes.

Particularly, light emitting devices such as light emitting diodes and laser diodes using III-V or II-VI compound semiconductor materials of semiconductors can be used for various applications such as red, Blue, and ultraviolet rays. By using fluorescent materials or combining colors, it is possible to realize a white light beam with high efficiency. Also, compared to conventional light sources such as fluorescent lamps and incandescent lamps, low power consumption, , Safety, and environmental friendliness.

Embodiments provide a semiconductor module having a novel reflective structure.

Embodiments provide a semiconductor module that improves the area of reflection on a circuit board.

The embodiment provides a semiconductor module in which a recess is disposed in a wiring layer of a circuit board and a resin layer of a reflective material is disposed in the recess to improve the reflection efficiency.

The embodiment provides a semiconductor module in which a resin layer of reflective material is disposed on an intermediate connection portion having a recess between a plurality of electrode pads overlapping with a semiconductor element.

The embodiment provides a semiconductor module having a resin layer of a reflective material lower than the upper surface of a plurality of electrode pads overlapping with a semiconductor element.

A semiconductor module according to an embodiment includes: a wiring layer having a plurality of electrode pads; And a circuit board having a resin layer on the wiring layer; And a semiconductor element disposed on the plurality of electrode pads of the circuit board, wherein the resin layer includes a material having a reflectivity higher than that of the electrode pad, and the upper surface of the resin layer It may have a height equal to or less than the horizontal straight line with the top surface.

A semiconductor module according to an embodiment includes: a base layer; A wiring layer having a plurality of electrode pads and recesses on the base layer; A circuit board having a resin layer on the base layer; And a semiconductor element disposed on a plurality of electrode pads of the circuit board, wherein the resin layer is formed of a reflective material, the resin layer extending in the recess, and the upper surface of the resin layer Can be disposed lower than the lower surface.

In an embodiment, the wiring layer includes a concave recess between the plurality of electrode pads, and the resin layer may extend in the recess.

In an embodiment, the recess may be disposed in at least one of an input line, an output line and a connection line connected to at least one of the plurality of electrode pads.

In an embodiment, the semiconductor device may include an LED vertically overlapping the plurality of electrode pads. In an embodiment, the wiring layer may connect two adjacent LEDs in series or in parallel.

In an embodiment, the semiconductor element may include a first array portion having a plurality of semiconductor elements coupled to each other to emit light of a first color, and a plurality of second semiconductor elements having a plurality of second semiconductor elements coupled to emit light of a second color, 2 array unit, and the first and second array units may be connected to each other in parallel.

The input line connects the input terminal to the electrode pad connected to the input terminal of the plurality of semiconductor elements, and the output line connects the output terminal to the electrode pad connected to the output terminal of the plurality of semiconductor elements, The connection line may connect the electrode pads connected to the plurality of semiconductor elements.

In an embodiment, an outer side of the electrode pad may be disposed at an angle of 30 degrees or less from a side surface of the semiconductor element with respect to an outer point of the reflective layer in the semiconductor element.

In an embodiment, the recess may be disposed in an area that does not overlap vertically with the semiconductor element. In an embodiment, the wiring layer may have a plurality of connection lines in which the recesses are arranged. In an embodiment, the reflectance of the resin layer may be higher than that of the upper surface of the electrode pad.

The embodiment can improve the light reflection efficiency of the semiconductor module.

The embodiment can improve the color rendering index of the light emitted from the semiconductor module.

In the semiconductor module of the embodiment, the light flux can be improved by the increase of the reflection area of the resin layer.

The embodiment can reduce the mounting defect of the semiconductor element in the semiconductor module.

The embodiment can improve the reliability of the semiconductor element and the semiconductor module having the semiconductor element.

1 is a side sectional view showing a semiconductor module according to an embodiment.
2 is a partial enlarged view of the semiconductor module of Fig.
3 is a diagram showing an example in which flip-shaped semiconductor elements are arranged in the semiconductor module of FIG. 2. FIG.
4 is a plan view for explaining electrode pads and semiconductor elements in the semiconductor module of FIG.
5 is a plan view for explaining a connection line of a wiring layer in the semiconductor module of FIG.
6 is a view showing another example of an electrode pad in which semiconductor elements are arranged in the semiconductor module of FIG.
7 is another example of the semiconductor module of Fig.
8 is a plan view of a semiconductor module according to an embodiment.
9 is another example of the semiconductor module according to the embodiment.
10 is a cross-sectional view illustrating an example of a semiconductor device of a semiconductor module according to an embodiment.
11 is an example in which the phosphor layer is arranged on the semiconductor element of Fig.
12 is a view for explaining another example of a semiconductor element in the semiconductor module according to the embodiment.
13 is a view for explaining a manufacturing process of the semiconductor module of FIG.
14 is a view for explaining an example of a semiconductor module according to a comparative example.
15 is a graph comparing the reflectance of the resin layer and the reflectance of the wiring layer in the semiconductor module according to the embodiment.
16 is a graph comparing the difference between the short-wavelength spectrum and the solar spectrum in the embodiment.

The embodiments may be modified in other forms or various embodiments may be combined with each other, and the scope of the present invention is not limited to each embodiment described below. Although not described in the context of another embodiment, unless otherwise described or contradicted by the description in another embodiment, the description in relation to another embodiment may be understood. For example, if the features of configuration A are described in a particular embodiment, and the features of configuration B are described in another embodiment, even if the embodiment in which configuration A and configuration B are combined is not explicitly described, It is to be understood that they fall within the scope of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. In the description of the embodiment according to the present invention, in the case of being described as being formed "on or under" of each element, the upper (upper) or lower (lower) or under are all such that two elements are in direct contact with each other or one or more other elements are indirectly formed between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

The semiconductor device may include various electronic devices such as a light emitting device and a light receiving device. The light emitting device and the light receiving device may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer. The semiconductor device according to this embodiment may be a light emitting device. The light emitting device emits light by recombination of electrons and holes, and the wavelength of the light can be determined by an energy band gap inherent to the material. Thus, the wavelength of the emitted light may vary depending on the composition of the material.

Hereinafter, a module having a semiconductor device according to an embodiment will be described with reference to the accompanying drawings. Throughout the accompanying drawings, the same or corresponding components are referred to by the same reference numerals, and redundant description is omitted.

FIG. 1 is a side sectional view showing a semiconductor module according to an embodiment, FIG. 2 is a partially enlarged view of the semiconductor module of FIG. 1, and FIG. 3 is a view showing an example in which flip- And FIG. 4 is a plan view for explaining electrode pads and semiconductor elements of the semiconductor module of FIG.

1 to 4, a semiconductor module 100 includes a circuit board 200 and a plurality of semiconductor elements 101 disposed on the circuit board 200. The semiconductor module 100 may be applied to various lighting devices, display devices, or vehicle lamps. The semiconductor module 100 may be implemented as a light emitting module that emits light of at least one of green, blue, red, and white or two or more types of light.

The length of the circuit board 200 in the X-axis direction may be equal to or different from the length in the Y-axis direction. The X-axis direction and the Y-axis direction may be orthogonal to each other, and the Z-axis direction may be perpendicular to the X-axis and Y-axis directions.

The circuit board 200 may be a thermally conductive substrate made of a metal material or a non-metal material. The metal material may be copper or a copper alloy material, and the non-metal material may be a resin material such as silicon or epoxy, or a plastic material. The circuit board 200 may be a ceramic substrate. The circuit board 200 may be a resin substrate. As another example, the circuit board 200 may include a material having a higher thermal conductivity and a lower thermal resistance than the resin material.

The circuit board 200 includes a base layer 210, a wiring layer 230 having a plurality of electrode pads 31, 32, 35, and 36 on the base layer 210, And may include a resin layer 250 on the substrate 210.

When the base layer 210 is made of a metal, at least one of copper (Cu), aluminum (Al), silver (Ag), ceramic material, graphite, silicon (Si), and silicon carbide . When the base layer 210 is made of a metal, an insulating layer may be disposed between the base layer 210 and the wiring layer 230. The base layer 210 may be made of silicon, epoxy, or plastic. The base layer 210 may include a material having a thermal conductivity of 150 W / mk or more, for example, 200 W / mk or more. The base layer 210 may be, for example, a copper material having a thermal conductivity of 200 W / mk or more. The base layer 210 may have a thickness of 50% or more of the thickness of the circuit board 200, for example. The base layer 210 may include, for example, a range of 0.2 mm to 1.5 mm. If the thickness of the base layer 210 is less than the above range, the thermal conductivity may be lowered and the reliability of the semiconductor device 101 may be deteriorated or the rigidity thereof may be deteriorated. If the thickness is larger than the above range, Can be thicker. The base layer 210 may be a support layer or a heat dissipation layer.

The resin layer 250 may be formed of a single layer or multiple layers using a dielectric material. The resin layer 250 may include at least one of an epoxy resin, a phenol resin, and an unsaturated polyester resin, including pre-impregnated materials. The resin layer 250 includes an insulating material or an insulating resin formed of at least one of oxides, nitrides, fluorides, and sulfides having at least one of Al, Cr, Si, Ti, Zn and Zr. The resin layer 250 may include, for _{example, SiO 2, Si 3 N 4} , Al 2 O 3, at least one of TiO ₂ in a resin such as silicon or epoxy. If the thickness of the resin layer 250 is less than the above range, the reflection characteristic may be lowered. If the thickness of the resin layer 250 is larger than the above range, the withstand voltage characteristic may be deteriorated . The resin layer 250 according to an embodiment may be a layer of reflective material. The resin layer 250 may be in contact with the base layer 210 through a region where the wiring layer 230 is removed. The resin layer 250 may be a reflective member. Since the resin layer 250 has a compound therein, it may be a thermally conductive material. The resin layer 250 of the thermally conductive material can be disposed as a material having a higher thermal conductivity than a general resin layer, thereby improving heat dissipation. The resin layer 250 may include a material having a higher reflectivity than the material of the electrode pads 31, 32, 35, and 36, for example, the reflectance of the upper surface.

The wiring layer 230 may include an input terminal 231 for power input and an output terminal 233 for power output. The wiring layer 230 includes electrode pads 31, 32, 35, and 36 connected to the semiconductor device 101 between the input terminal 231 and the output terminal 233. The input terminal 231 and the output terminal 233 may be provided with electrode pads 31 and 32 connected to at least some electrodes of the semiconductor device 101. The input side electrode pad 31 connected to the input terminal 231 may be an input pad connected to the input line and the output side electrode pad 32 connected to the output terminal 233 may be an output pad connected to the output line.

The wiring layer 230 may connect the plurality of semiconductor devices 101 in series, parallel, series-parallel, or bottle-serial. The semiconductor device 101 may be defined as an array unit 110 when a plurality of semiconductor devices 101 are connected. The array unit 110 may include a plurality of semiconductor devices 101 connected in series. The period T1 of the semiconductor device 101 in the array unit 110 may be a constant interval or a different interval.

The wiring layer 230 may include an intermediate connection part 235 and the intermediate connection part 235 may connect the adjacent two semiconductor devices 101. The intermediate connection part 235 is connected to the first and second electrode pads 35 and 36 disposed under the adjacent semiconductor devices 101 and a connection line 37 ). The intermediate connection 235 may include a recess 38.

Since the upper surface of the resin layer 250 is disposed at a position lower than the lower surface of the semiconductor element 101 or lower than the lower surface of the semiconductor element 101 in the embodiment, You can give. 1 and 2, the first and second electrode pads 35 and 36 and the input terminal 231 and the output terminal 233 may have the same thickness D1. The first and second electrode pads 35 and 36 and the input / output terminals 231 and 233 may have the same thickness D1 as the thickness of the resin layer 250. The connection line 37 may have the recess 38 and the length of the recess 38 may be equal to or less than the length T2 of the connection line 37. [ The length T2 of the connection line 37 may be equal to or different from the interval C3 between the semiconductor devices 101. [ The length T2 of the connection line 37 may vary depending on the top surface area of the first and second electrode pads 35 and 36. [ The length of the recess 38 in the connection line 37 is equal to or longer than 80% of the interval C3 between adjacent two semiconductor elements 101 connected to each other, % ≪ / RTI > When the length of the recesses 38 is less than 80% of the interval C3, the upper surface of the connection line 37 may be exposed in the region between the semiconductor elements 101, Can be increased. Here, the longitudinal direction of the connection line 37 is an X-axis direction in which two adjacent semiconductor elements 101 are arranged, and two adjacent semiconductor elements 101 arranged in the X-axis direction can be electrically connected. The thickness D3 of the connection line 37 may be a perpendicular Z-axis direction orthogonal to the X-axis direction.

The length T2 of the connection line 37 is a length extending in the connection direction of the adjacent semiconductor elements 101 and is connected to two adjacent electrode pads 35 and 36. [ The recess 38 may be disposed on the intermediate connection portion 235 or may be disposed on a line connected to the input terminal 231 and a line connected to the output terminal 233. [

The thickness D3 of the connection line 37 may be in a range of 40% to 60% of the thickness D1 of the electrode pads 35 and 36. [ If the thickness D3 of the connecting line 37 is less than the above range, the power line may be opened and the electrical connection may be broken. If the thickness D3 of the connection line 37 is larger than the above range, There is a problem that the reflection efficiency may be lowered due to the thickness.

The depth D2 of the recess 38 may be the same or different from the thickness D3 of the connection line 37. [ The depth of the recess 38 may be 40% to 60% of the thickness D1 of the electrode pads 35 and 36. The ratio of the depth D2 of the recess 38 to the thickness D3 of the connection line 37 may be in the range of 1.5: 1 to 1: 1.5. When the depth D2 of the recess 38 is greater than the range, power supply and heat dissipation by the connection line 37 is difficult and when the depth D2 of the recess 38 is smaller than the range, The thickness of the resin layer 250 disposed on the resin layer 37 may be reduced, and the reflection efficiency may be reduced. The depth D2 of the recess 38 may be equal to the thickness of the reflective region 53 of the resin layer 250 disposed in the recess 38. [ The connection line 37 may be disposed between the reflective region 53 of the resin layer 250 and the base layer 210. The resin layer 250 may be disposed on the base layer 210 and on a region where the wiring layer 230 is removed. Accordingly, most of the upper surface of the circuit board 200 can expose the resin layer 250 and effectively reflect the light emitted in the lateral direction of the semiconductor element 101, for example, the light emitting element. Accordingly, the light flux in the semiconductor module 100 can be improved.

Embodiments can reduce the height of the upper surface of the resin layer 250 by disposing the recesses 38 in the wiring layer 230, thereby reducing the defective bonding due to the solder material. Also, the reflection area of the resin layer 250 on the semiconductor module can be increased by 10% or more as compared with the comparative example. Here, the comparative example is an example of a semiconductor module in which a resin layer is disposed on a recess-free wiring layer. 8) connected to at least one of the plurality of electrode pads 31, 32, 35, 36, an output line (32A in FIG. 8) connected to at least one of the plurality of electrode pads 31, And the connecting line 37, and the resin layer 250 can be extended on the lines 31A, 32A,

The resin layer 250 may include a gap portion 51 and the gap portion 51 may be disposed between the adjacent two electrode pads 35 and 36. The semiconductor element 101 may be disposed on the gap portion 51. The width T5 of the gap portion 51 may be narrower than the widths T3 and T4 of the electrode pads 35 and 36. [

The wiring layer 230 may be formed of a metal such as titanium, copper, nickel, gold, chromium, tantalum, platinum, tin, Silver (Ag), and phosphorus (P), and may be formed as a single layer or a multilayer. When the thickness of the electrode pads 35 and 36 is less than the above range, the thermal conductivity may be deteriorated. If the thickness of the electrode pads 35 and 36 is thicker than the above range The thickness of the face module can be increased. When a gold (Au) layer is disposed on the surface of the wiring layer 230, the bonding efficiency can be improved.

The wiring layer 230 may expose the input terminal 231, the output terminal 233 and the electrode pads 31, 32, 35, and 36 on the base layer 210. The recess 38 of the wiring layer 230 is a region overlapping in the vertical direction with the region between the semiconductor elements 101 and an input line 31A between the input terminal 231 and the electrode pad 31, , And an output line (32A in Fig. 8) between the output terminal 233 and the electrode pad 32. [ A reflective region 53 of the resin layer 250 may be disposed on the recesses 38. The upper surface of the resin layer 250 may be disposed on the same horizontal line X1 as the upper surface of the electrode pads 35 and 36. [ The upper surface of the resin layer 250 may be disposed on the same horizontal plane as the upper surface of the electrode pads 35 and 36. The upper surface of the resin layer 250 may be the same as the upper surface of the electrode pads 35 and 36 or lower than the upper surface of the electrode pads 35 and 36. The upper surface of the resin layer 250 may be a horizontal surface, a concave surface, or a convex surface.

The recess 38 may be disposed in at least one of the input line 31A (FIG. 8), the output line 32A (FIG. 8), and the intermediate connection 235, as described above. The recesses 38 may be disposed in regions that do not overlap vertically with respect to the semiconductor device 101.

The semiconductor device 101 may be connected to the electrode pads 31, 32, 35, and 36 of the wiring layer 230. The semiconductor device 101 may overlap the electrode pads 31, 32, 35, 36 of the wiring layer 230 in the vertical direction. The semiconductor device 101 may be arranged in a flip chip structure. The semiconductor element 101 may include, for example, a light emitting element. The semiconductor device 101 includes a light emitting device such as an LED, and the LED may emit at least one of blue, green, red, or white light. The semiconductor device 101 can selectively emit light in a range of visible light, ultraviolet light, or infrared light. The semiconductor device 101 may include at least one of an ultraviolet (UV) LED, a red LED, a blue LED, a green LED, a yellow green LED, an infrared ray or a white LED.

As shown in Fig. 3, the plurality of electrodes 127 and 129 of the semiconductor element 101 may be arranged separately from each other. The electrodes 127 and 129 are formed of a metal such as gold (Au), nickel (Ni), chromium (Cr), tantalum (Ta), platinum (Pt), tin (Sn), silver (Ag) Ti), palladium (Pd), copper (Cu), or an alloy thereof, and may be formed as a single layer or a multilayer. At least one of the plurality of electrodes 127 and 129 may have an arm pattern and the arm pattern may be formed in a pattern having a predetermined length branched from the electrodes 127 and 129. Such a dark pattern can spread the current. The upper surface of the semiconductor device 101 may include a pattern for extracting light, and this pattern may change the critical angle of emitted light. The semiconductor element 101 may include a light receiving element for receiving light. The semiconductor device 101 may electrically protect the LED, and may be realized with a thyristor, a zener diode, or a TVS (Transient Voltage Suppression).

Each of the plurality of electrodes 127 and 129 of each of the semiconductor devices 101 may be disposed in one or more than one. In this case, each of the electrode pads 35 and 36 corresponding to the lower part of the semiconductor device 101 may be arranged in one or more.

Referring to FIG. 3, the plurality of electrodes 127 and 129 of the semiconductor device 101 may be electrically connected to the electrode pads 35 and 36. The electrodes 127 and 129 of the semiconductor element 101 can be bonded by the electrode pads 35 and 36 and the bonding members 171 and 173. [ The joining members 171 and 173 may include a material such as a solder. The solder may include, but is not limited to, AuSn or PbSn, for example. The bottom surface area of each of the electrodes 127 and 129 of the semiconductor device 101 may be smaller than the top surface area of each of the electrode pads 35 and 36. Accordingly, defective bonding due to mounting of the semiconductor device 101 can be reduced. If the bottom surface area of each of the electrodes 127 and 129 of the semiconductor device 101 is larger than the top surface area of each of the electrode pads 35 and 36, interference between the bonding members 171 and 173 may occur, Electrical reliability may be degraded.

As shown in Fig. 4, the length C1 in the X-axis direction of the semiconductor device 101 may be the same as or different from the length C2 in the Y-axis direction. The X axis length C1 may be greater than twice the width T3 of the electrode pads 35 and 36 in the X axis direction and the length C2 in the Y axis direction may be larger than the width T3 of the electrode pads 35 and 36 And may be equal to or larger than the width C5 in the Y-axis direction. The heat generated when the semiconductor device 101 is driven may be conducted through different electrode pads 35 and 36 or may be dissipated through the base layer 210. The Y-axis direction may be a direction orthogonal to the X-axis direction.

The region of the semiconductor device 101 may overlap the region of the electrode pads 35 and 36 in the vertical direction. The embodiment can increase the area of the resin layer 250 on the circuit board 200 and improve the reflection efficiency by the resin layer 250. The reflection efficiency of the resin layer 250 can be increased in proportion to the top surface area.

The width C5 of the electrode pads 35 and 36 in the Y axis direction may be equal to each other and the width C5 of the electrode pads 35 and 36 may be equal to the length of the connection line 37 T2 of the semiconductor device 101, which may be different depending on the size of the semiconductor device 101. [ The width C4 of the connection line 37 may be equal to or greater than the width C5 of the semiconductor device 101 and may be less than the width C2 of the semiconductor device 101, . This may vary depending on the size of the semiconductor device 101 and the interval between the array parts.

The width C5 of the electrode pads 35 and 36 may be wider than the width T5 of the gap 51. The electrode pads 35 and 36 can stably supply power to the semiconductor element 101 and effectively dissipate the heat conducted from the semiconductor element 101. Although the connection lines 37 are connected to the electrode pads 35 and 36 by one line, they may be connected to two lines 37-1 and 37-2 as shown in FIG. If the connection line 37 is arranged in two lines 37-1 and 37-2, it is possible to prevent circuit open when the connection line 37 boils, So that the power can be supplied stably.

3 and 6, the outer sides 35A and 36A of the electrode pads 35 and 36 are arranged on the same line on the straight lines V1 and V2 perpendicular to the side surface of the semiconductor element 101 And may protrude outward from the vertical lines V1 and V2. When the semiconductor device 101 is an LED, a reflective layer R1 may be disposed inside the reflective layer R1, and the reflective layer R1 may reflect incident light in a different direction. In order to reduce the loss of light leaked to the side surface of the LED, it is preferable that the distance between the electrode pads 35 and 36 within an angle R2 of 30 degrees or less from the vertical straight line, The outer sides 35A and 36A can be disposed. If the angle R2 exceeds 30 degrees, light loss may be generated by the surfaces of the electrode pads 35 and 36 or the bonding members 171 and 173, and the reflectance by the resin layer 250 may be lowered. The exposure ratio of the bonding members 171 and 173 may become larger as the outer sides 35A and 36A of the electrode pads 35 and 36 are exposed to the outside of the side surfaces S1 and S2 of the semiconductor element 101, The optical loss can be increased in proportion to the exposure ratio.

The upper surface of the resin layer 250 may be equal to or lower than a straight line X1 on the upper surface of the electrode pads 35 and 36. [ When the upper surface of the resin layer 250 is flat, the horizontal straight line X1 may be disposed on the same line as the upper surface of the resin layer 250. [ As shown in FIG. 6, when the upper surface of the resin layer 250 is concave (dotted line X2), a part of the upper surface of the resin layer 250 may be arranged lower than the horizontal straight line X1. When the outer sides 35A and 36A of the electrode pads 35 and 36 are protruded by a predetermined width E1 from the area of the semiconductor element 101, R1 from the straight line parallel to the side surfaces S1, S2 of the semiconductor element 101 with respect to the outer point of the semiconductor elements 101, R1.

The outer sides 35A and 36A of the electrode pads 35 and 36 are electrically connected to the electrode pads 35 and 36 of the semiconductor device 101 when the outer sides 35A and 36A of the electrode pads 35 and 36 protrude, The distance E2 from the one side S1 to the semiconductor element 101 can be larger than the distance E1 from the other side S1.

The embodiment maximizes the reflective area by the resin layer 250, thereby improving the reflection efficiency and improving the color rendering index. 15, the reflectance G1 of the resin layer 250 may be higher than the reflectance G2 of gold (Au) of the metal of the wiring layer. For example, the reflectance G1 of the resin layer 250 may be higher than the reflectance G2 of the gold material in the band of 400 nm to 500 nm And more than 40%. Since the reflectance of the resin layer 250 is high, the difference between the block body emission at the color temperature of 6000K and the solar spectrum becomes large in the wavelength band of 400 nm to 500 nm as shown in FIG. 16, The light reflection efficiency of the band can be improved, and the color rendering index (CRI) can be improved.

The resin layer 252 of the circuit board 200 is formed on the upper surface of the wiring layer 230 of the circuit board 200 and the electrode pads 31 and 32 or the protective layer 251, Thickness. The protective layer 251 may be a solder resist material for protecting the wiring layer 230. The upper surface of the resin layer 252 of the comparative example shown in Fig. 14 can face each side of the semiconductor element 101. [ When the resin layer 252 of the comparative example faces each side of the semiconductor element 101, light is lost through the region between the side of the semiconductor element 101 and the resin layer 252, for example, . In addition, when the light emitting device has a flip chip structure, the position of the active layer of the light emitting device is lowered, so that the light traveling to the region between the light emitting device and the resin layer 252 due to the thickness of the resin layer 252 is lost . When the height of the resin layer 252 of the comparative example is higher than the upper surface of the electrode pads 31 and 32, the resin layer 252 of the comparative example can cover the surfaces of the electrode pads 31 and 32 , Contact failure with the electrode pads (31, 32) may occur and the semiconductor element (101) may fail to be mounted.

7 is an example in which different array portions are arranged on a semiconductor module. 7, the semiconductor module includes a first array portion 110A having a plurality of first semiconductor elements 101 and a second array portion 110B having a plurality of second semiconductor elements 103 . The first and second semiconductor devices 101 and 103 may include a light emitting device, and the light emitting device may include a blue, green, red, or white light emitting device such as an LED. The first and second semiconductor devices 101 and 103 may include LEDs emitting the same color or LEDs emitting different colors.

The plurality of first semiconductor elements 101 may be connected to each other, and the plurality of second semiconductor elements 103 may be connected to each other. The first array part 110A is connected between the first input terminal 231 and the output terminal 234 and the second array part 110B is connected between the second input terminal 232 and the output terminal 234. [ Lt; / RTI > The output terminal 234 may be commonly connected to the first and second array units 110A and 110B.

The semiconductor module of the embodiment can improve reflection efficiency of light by disposing a reflective material such as a resin layer 250 on an area excluding the input terminals 231 and 232, the output terminal 234, and the semiconductor elements 101 and 103.

8 is an example in which a plurality of array portions are arranged on the semiconductor module of the embodiment. 8 and 1, the semiconductor device 100 includes a plurality of array units 110 having semiconductor elements 101 arranged on a circuit board 200, and each of the array units 110 is connected to an input terminal 231 And may be connected to an output line 32A connected to the input line 31A and the output terminal 233 connected thereto. The input line 31A and the output line 32A may have a recess 38 of FIG. 1 according to an embodiment. Accordingly, the reflection region (53 in FIG. 1) of the resin layer 250 can be disposed on the recesses 38 of the input line 31A and the output line 32A. Since the input line 31A and the output line 32A have the recesses 38, they may have the same thickness as the thickness of the connection line 37 (D3 in FIG. 2). The input line 31A may be disposed at the input end of the plurality of array units 110 and the output line 32A may be disposed at the output end of the plurality of array units 110. [ A plurality of semiconductor elements 101 may be connected in series in each array unit 110. The array units 110 may be connected to each other in parallel. The plurality of array units 110 may include a light emitting element that emits light of at least one color or two or more colors. Each of the plurality of array units 110 may include LEDs capable of emitting the same or different colors to each other, and in this case, can be driven within a driving voltage range.

A resin layer 250 is disposed on the circuit board 200 of the semiconductor module 100A and the resin layer 250 may be disposed on the entire upper surface area of the circuit board 200. [ The resin layer 250 may be disposed on an area excluding the semiconductor device 101 connected to the input and output terminals 231 and 233 and the input and output terminals 231 and 233. The resin layer 250 is disposed on the entire surface of the circuit board 200 as a reflective material so as to reflect the light emitted through the side surface of the semiconductor element 101, You can give. The light loss due to the electrode pads 31, 32, 35, and 36 can be reduced by minimizing the area of the electrode pads 31, 32, 35, and 36 on the circuit board 200.

Specifically, the input line 31A connected between the input terminal 231 and the semiconductor element 101, the connection line 37 between the semiconductor elements 101, the semiconductor element 101 and the output terminal 233 ) May be sealed by the resin layer 350 with the recess (38 in FIG. 1). The line widths of the input line 31A, the connection line 37, and the output line 32A may be formed to have a width that can withstand the withstand voltage, but the present invention is not limited thereto. At least one or both of the input line 31A, the output line 32A and the connection line 37 may be arranged in one line or in two or more lines. When the lines are arranged in two, each line can be protected from an external impact transmitted through the circuit board.

As a comparative example, in a semiconductor module having a plurality of array portions, a resin layer 252 disposed on the circuit board 200 as shown in FIG. 14 is formed on the wiring layer 230, the protective layer 251, Can be arranged at a height higher than the upper surface of the pads (31, 32). In this case, the resin layer 252 of the comparative example can face the side surface of the semiconductor element 101 of each array part. When the resin layer 252 of the comparative example protrudes to the side of the semiconductor element, light traveling to the region between the semiconductor element 101, for example, the light emitting element and the resin layer may be lost. In addition, when the light emitting device has a flip chip structure, the position of the active layer of the light emitting device is lowered, so that the light traveling to the region between the light emitting device and the resin layer 252 due to the thickness of the resin layer 252 is lost . When the height of the resin layer 252 of the comparative example is higher than the upper surface of the electrode pads 31 and 32, the resin layer 252 of the comparative example can cover the surfaces of the electrode pads 31 and 32 , Contact failure with the electrode pads (31, 32) may occur and the semiconductor element (101) may fail to be mounted.

9 is an example in which different array portions are separately connected on the semiconductor module of the embodiment.

Referring to FIG. 9 and FIG. 1, a plurality of array units 111, 112, and 113 may be disposed on a circuit board 200 of a semiconductor module 100B. The plurality of array units 111, 112 and 113 include one or a plurality of first array units 111 having a first semiconductor element 101A and one or a plurality of second array units 112 having a second semiconductor element 101B And a third semiconductor element 101C, as shown in FIG. The first to third semiconductor devices 101A, 101B, and 101C may emit the same color or emit different colors. For example, the first semiconductor element 101A is a light emitting element that emits a blue LED or blue light, the second semiconductor element 101B is a light emitting element that emits a red LED or red light, 101C may include a green LED or a light emitting element that emits green light. The number of the first to third array units 111, 112 and 113 may be equal to each other or may be smaller than the number of the first and third array units 111 and 113 having different numbers of the second array units 112, . The second array unit 112 may be disposed between the first and third array units 111 and 113. By arranging lights of different colors, color mixing of light can be facilitated.

The input terminals 231A, 231B, and 231C connected to the first to third array units 111, 112, and 113 may be disposed in different regions, and the first to third array units 231A, 231B, The connected output terminal 233 may be a common terminal. The circuit board 200 includes input terminals 231A, 231B and 231C and input lines 31B, 31C and 31D connected to the respective arrays 111 and 112 and a connecting line And the resin layer 250 covers the recesses of the output lines 32B connecting the output terminals 233 and the array units 111, 112 and 113. Accordingly, since the resin layer is disposed on the connection line and the input / output line of the wiring layer on the circuit board 200, the top surface area of the resin layer 250 can be increased. The resin layer 250 has a height that does not protrude from the upper surfaces of the input terminals 231A, 231B, and 231C and the output terminal 233, so that reflection of input light can be effectively performed.

10 is a view showing an example of a semiconductor element of a semiconductor module according to an embodiment.

Referring to Fig. 10, the semiconductor element 101 can emit blue, green or red light, for example, as an LED chip. The semiconductor device 101 includes a translucent substrate 11 and a semiconductor structure 13. The translucent substrate 11 is disposed on the semiconductor structure 13 and the semiconductor structure 13 includes first, Two electrodes 127 and 129 may be disposed.

The translucent substrate 11 may be, for example, a translucent, conductive substrate or an insulating substrate. A plurality of protrusions (not shown) may be formed on the upper surface and / or the lower surface of the transparent substrate 11, and each of the plurality of protrusions may include at least one of a side surface, a hemispherical shape, a polygonal shape, , Stripe form, or matrix form. The protrusions can improve the light extraction efficiency. A semiconductor layer such as a buffer layer (not shown) may be disposed between the transmissive substrate 11 and the first conductivity type semiconductor layer 13A. However, the present invention is not limited thereto. The transparent substrate 11 can be removed.

 The semiconductor structure 13 includes a first conductive type semiconductor layer 13A, a second conductive type semiconductor layer 13C and an active layer 13B between the first and second conductive type semiconductor layers 13A and 13C . Other semiconductor layers may be disposed above and / or below the active layer 13B, but the present invention is not limited thereto.

The first conductive semiconductor layer 13A may be disposed between the transparent substrate 11 and the active layer 13B. The first conductive semiconductor layer 13A may be formed of at least one of Group III-V and Group II-VI compound semiconductors doped with a first conductivity type dopant. The first conductivity type semiconductor layer 13A may be a semiconductor having a composition formula of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + May be formed of a material. The first conductive semiconductor layer 13A may include at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP and AlGaInP. The first conductive semiconductor layer 13A may be an n-type semiconductor layer doped with an n-type dopant such as Si, Ge, Sn, Se or Te. The first conductive semiconductor layer 13A may be a single layer or a multi-layered structure. The first conductive semiconductor layer 13A may have a superlattice structure in which at least two different layers are alternately arranged. The first conductive semiconductor layer 13A may be an electrode contact layer.

The active layer 13B may be disposed between the first conductive semiconductor layer 13A and the second conductive semiconductor layer 13C. The active layer 13B may be formed of at least one of a single well, a single quantum well, a multi-well, a multi quantum well (MQW) structure, a quantum-wire structure, or a quantum dot structure . Electrons (or holes) injected through the first conductive type semiconductor layer 13A and holes (or electrons) injected through the second conductive type semiconductor layer 13C meet with each other in the active layer 13B, And is a layer that emits light due to a band gap difference of an energy band according to a material of the active layer 13B. The active layer 13B may be formed of a compound semiconductor. The active layer 13B may be formed of at least one of Group II-VI and Group III-V compound semiconductors, for example. In the case where the active layer 13B is implemented as a multi-well structure, the active layer 13B includes a plurality of alternately arranged well layers and a plurality of barrier layers, and the pair of well layers / . InGaN / AlGaN, InGaN / AlGaN, InGaN / InGaN, AlGaAs / GaAs, InGaAs / GaAs, InGaP / GaP, AlInGaP / InGaP, or InGaN / AlGaN. InP / GaAs < / RTI &gt; pair. The well layer may be disposed of a semiconductor material having a composition formula of, for example, In _x Al _y Ga _{1 -x- y} N (0 <x? 1, 0? Y? 1, 0? _X + y < The barrier layer may be formed of a semiconductor material having a composition formula of In _x Al _y Ga _{1 -x- y} N (0? _X? 1, 0? Y? 1, 0? _X + y <

The second conductivity type semiconductor layer 13C may be a semiconductor having a composition formula of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + May be formed of a material. The second conductive semiconductor layer 13C may include at least one of, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, May be a doped p-type semiconductor layer. The second conductivity type semiconductor layer 13C may be a single layer or a multilayer. The second conductive semiconductor layer 13C may have a superlattice structure in which at least two different layers are alternately arranged. The second conductivity type semiconductor layer 13C may be an electrode contact layer.

The semiconductor structure 13 may include the first conductivity type semiconductor layer 13A to the second conductivity type semiconductor layer 13C. As another example, the semiconductor structure 13 may be implemented by any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure.

The first and second electrodes 127 and 129 may be disposed under the semiconductor structure 13. The first electrode is in contact with and electrically connected to the first conductive type semiconductor layer 13A, and the second electrode is in contact with and electrically connected to the second conductive type semiconductor layer 13C.

The first electrode 127 and the second electrode 129 may be made of a metal having the characteristics of an ohmic contact, an adhesive layer, and a bonding layer, and may not be transparent. The first and second electrodes 127 and 129 may have a polygonal or circular bottom shape.

The semiconductor device 101 includes first and second electrode layers 121 and 122, a third electrode layer 123, and insulating layers 124 and 125. Each of the first and second electrode layers 121 and 122 may be formed as a single layer or a multilayer, and may function as a current diffusion layer. The first and second electrode layers 121 and 122 include a first electrode layer 121 disposed under the semiconductor structure 13; And a second electrode layer 122 disposed under the first electrode layer 121. The first electrode layer 121 diffuses a current, and the second electrode layer 121 reflects incident light.

The first and second electrode layers 121 and 122 may be formed of different materials. The first electrode layer 121 may be formed of a light-transmitting material, for example, a metal oxide or a metal nitride. The first electrode layer 121 may be formed of one of indium tin oxide (ITO), indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (IZO) , Indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO) and gallium zinc oxide (GZO). The second electrode layer 122 is in contact with the lower surface of the first electrode layer 121 and may function as a reflective electrode layer. The second electrode layer 122 includes a metal such as Ag, Au, or Al. The second electrode layer 122 may partially contact the lower surface of the second conductivity type semiconductor layer 13C when a portion of the first electrode layer 121 is removed.

As another example, the structures of the first and second electrode layers 121 and 122 may be stacked in an omni directional reflector layer (ODR) structure. The omnidirectional reflection structure may have a laminated structure of a first electrode layer 121 having a low refractive index and a second electrode layer 122 made of a highly reflective metal material in contact with the first electrode layer 121. The electrode layers 121 and 122 may have a laminated structure of, for example, ITO / Ag. The total reflection angle can be improved at the interface between the first electrode layer 121 and the second electrode layer 122.

As another example, the second electrode layer 122 may be removed and may be formed of a reflective layer of another material. The reflective layer may be formed of a distributed Bragg reflector (DBR) structure. The distributed Bragg reflector structure includes a structure in which two dielectric layers having different refractive indices are alternately arranged. For example, a SiO2 layer, Si ₃ N ₄ layer, TiO ₂ layer, Al ₂ O ₃ layer, and MgO layer, respectively. As another example, the electrode layers 121 and 122 may include both a dispersed Bragg reflection structure and an omnidirectional reflection structure. In this case, a light emitting chip having a light reflectance of 98% or more can be provided. Since the light emitted from the second electrode layer 122 is emitted through the light-transmissive substrate 11, the light-emitting chip mounted with the flip method can emit most of the light in the vertical direction.

The third electrode layer 123 is disposed under the second electrode layer 122 and is electrically insulated from the first and second electrode layers 121 and 122 by a first insulating layer 124. The third electrode layer 123 may be formed of a metal such as titanium, copper, nickel, gold, chromium, tantalum, platinum, tin, ), Silver (Ag), and phosphorus (P). A first electrode 127 and a second electrode 129 are disposed under the third electrode layer 123.

The insulating layers 124 and 125 prevent unnecessary contact between the first and second electrode layers 121 and 122, the third electrode layer 123, the first and second electrodes 127 and 129, and the semiconductor structure 13. The insulating layers 124 and 125 include first and second insulating layers 135 and 135. The first insulating layer 124 is disposed between the third electrode layer 123 and the second electrode layer 122. The second insulating layer 125 is disposed between the third electrode layer 123 and the first and second electrodes 127 and 129.

The third electrode layer 123 is connected to the first conductive semiconductor layer 13A. The connection portion 123A of the third electrode layer 123 protrudes in a via structure through the first and second electrode layers 121 and 122 and the lower portion of the semiconductor structure 13 and is in contact with the first conductivity type semiconductor layer 13A do. The connection portions 123A may be arranged in plural. A part 124A of the first insulating layer 124 extends around the connection part 123A of the third electrode layer 123 to form the third electrode layer 123 and the first and second electrode layers 121 and 122, Type semiconductor layer 13C and the active layer 13B. The side surface of the semiconductor structure 13 may be provided with an insulating layer for side protection, but the present invention is not limited thereto.

The second electrode 129 is disposed below the second insulating layer 125 and is in contact with at least one of the first and second electrode layers 121 and 122 through an open region of the second insulating layer 125, do. The first electrode 127 is disposed below the second insulating layer 125 and is connected to the third electrode layer 113 through an open region of the second insulating layer 125. The protrusion 129A of the second electrode 129 is electrically connected to the second conductivity type semiconductor layer 13C through the first and second electrode layers 121 and 122 and the protrusion 127A of the first electrode 127 Is electrically connected to the first conductivity type semiconductor layer 13A through the third electrode layer 113. [

A plurality of connection portions 123A connected to the first electrode 127 can be disposed to improve current diffusion. The first and second electrodes 127 and 129 may be provided under the semiconductor structure 13 in a large area. The lower surfaces of the first and second electrodes 127 and 129 can be disposed on the same horizontal plane, thereby improving the bonding efficiency.

11 is an example in which the phosphor layer 120 is disposed on the semiconductor element of Fig. The phosphor layer 120 may include at least one of a red phosphor, a green phosphor, a blue phosphor, and a yellow phosphor, but the present invention is not limited thereto. The phosphor may be selectively formed from among YAG, TAG, Silicate, Nitride, and Oxy-nitride based materials.

The upper surface area of the phosphor layer 120 may be larger than the upper surface area of the semiconductor element 101. The width of the phosphor layer 120 may be greater than the width of the transparent substrate 11. A rough surface may be formed on the upper surface or the lower surface of the phosphor layer 120. The phosphor layer 120 may have a bottom surface area larger than the top surface area of the semiconductor device 101, thereby improving the wavelength conversion efficiency of incident light.

The light emitted through the phosphor layer 120 may emit at least one of warm white, pure white, and cool white. The warm white may have a color temperature of 4500K or less, and the cool white may have a color temperature of cool white of 5000K to 6000K. The pure white may be disposed between the color temperature of the cool white and the color temperature of the cool white. The semiconductor module can include a phosphor layer having different color temperatures, thereby improving the color rendering index (CRI) of light.

12 is another example of the semiconductor device according to the embodiment. In describing the semiconductor device, the same components as those shown in FIG. 10 will be described with reference to the above description.

12, a semiconductor device 101 is disposed on a circuit board 200 and includes a transparent substrate 11, a semiconductor structure 13, an electrode layer 131, and an insulating layer 133. The material of the electrode layer 131 and the insulating layer 133 will be described with reference to the above description.

The semiconductor device 101 includes a first electrode 137 and a second electrode 139 under the semiconductor structure 13. [ The first electrode 137 may include a first contact layer 135, a first connection layer 141 and a first bonding layer 142. The first contact layer 135 may include a first conductive semiconductor Layer 13A and the first connection layer 141 is connected between the first contact layer 135 and the first bonding layer 142. [ The first connection layer 141 and the first bonding layer 142 may be arranged in a multi-layer structure. The first contact layer 135 may include at least one of Cr, Ti, and Ta and an optional alloy thereof. The first contact layer 141 may include one or more of Al, Ti, Fe, Ni, And the first bonding layer 142 may include at least two of In, Sn, Ni, Au, and their alloys.

The second electrode 139 includes a second contact layer 136, a second connection layer 143 and a second bonding layer 144. The second contact layer 136 may include a second conductive semiconductor Layer 13 C and the second connection layer 143 is connected between the second contact layer 136 and the second bonding layer 144. The second contact layer 136, the second connection layer 143, and the second bonding layer 144 may be disposed in a single layer or a multi-layer structure. The second contact layer 136 may include at least one of Cr, Ti, and Ta and an optional alloy thereof. The second contact layer 143 may include Al, Ti, Cu, Ag, Pt, Alloy, and the first bonding layer 144 may include at least two of In, Sn, Cu, Au, and their alloys.

The semiconductor element 101 may be provided with a support member 151 under the semiconductor structure 13. The supporting member 151 is formed of an insulating material, and the insulating material is formed of a resin layer such as silicon or epoxy. As another example, the insulating material may include a paste or an insulating ink. The insulating material may be selected from the group consisting of polyacrylate resin, epoxy resin, phenolic resin, polyamides resin, polyimides rein, unsaturated polyesters resin, polyphenylene ether resin (PPE), polyphenylene oxide resin (PPO), polyphenylenesulfide resin, cyanate ester resin, benzocyclobutene (BCB), Polyamido-amine Dendrimers (PAMAM), and Polypropylene-imine, Dendrimers (PPI), and PAMAM-internal structures and PAMAM-OS (organosilicon) with organic-silicone outer surfaces alone or combinations thereof .

At least one of compounds such as oxides, nitrides, fluorides and sulfides having at least one of Al, Cr, Si, Ti, Zn and Zr may be added to the support member 151. Here, the compound added to the support member 151 may be a heat spreader, and the heat spreader may be used as powder particles, pellets, fillers, and additives having a predetermined size. For convenience of explanation, The diffusion agent will be described. The heat spreader may include a ceramic material. The ceramic material may include a low temperature co-fired ceramic (LTCC), a high temperature co-fired ceramic (HTCC), an alumina, Quartz, calcium zirconate, forsterite, SiC, graphite, fused silica, mullite, cordierite, zirconia, beryllia, ), And aluminum nitride. The ceramic material is, for _{example, SiO 2, Si x O y} , Si 3 N 4, Si x N y (x≥ 0.1, y≥0.1), SiO x N y (x≥0.1, y≥0.1), Al 2 O ₃ , BN, SiC (BeC), BeO, CeO, AlN, or the like. The thermally conductive material may comprise a component of C (diamond, CNT).

The support member 151 may be formed as a single layer or a multilayer, but is not limited thereto. By including the powder of the ceramic material in the support member 151, the strength of the support member 151 can be improved and the thermal conductivity can also be improved. The support member 151 may be formed to have a thickness of 2 탆 or more, and when the support member 151 is formed to be less than 2 탆, the support of the support member 151 and improvement of the thermal conductivity may be insignificant.

The support member 151 may be disposed in a structure in which a first support member disposed around the first electrode 137 and a second support member disposed around the second electrode 139 are separated from each other , Heat generated from each electrode can be dissipated. The above-described phosphor layer 120 may be disposed on such a semiconductor element.

An optical lens may be disposed on the semiconductor element 101. The optical lens may include a hemispherical or aspherical lens shape. When the optical lens is an aspherical lens, it is possible to reduce the height of the optical lens while diffusing the emitted light to reduce the color separation phenomenon. The optical lens may be in contact with or spaced from, for example, a top surface of a semiconductor element or a phosphor layer. The outer portion of the optical lens may be coupled to a part of the resin layer. The optical lens may be formed of a transparent resin material such as silicon or epoxy. As another example, the optical lens may be formed of a glass material or a transparent plastic material.

13 is a view illustrating a manufacturing process of the semiconductor module of FIG. Referring to FIG. 13, a wiring layer 230 having a predetermined pattern may be attached on the base layer 210 of the circuit board 200 as shown in (A). The wiring layer 230 may be attached before curing of the base layer 210 or may be attached with a separate adhesive.

The recesses 38 of the wiring layer 230 may be formed after attaching the wiring layer 230 on the base layer 210 or may be formed on the base layer 210 beforehand. The recess 38 may be disposed in at least one of the input line 31A (FIG. 8), the output line 32A (FIG. 8), and the intermediate connection 235, as described above. These recesses 38 may be arranged in regions which do not overlap vertically with the semiconductor elements 101. [

The resin layer 250 is formed on the base layer 210 as shown in FIG. 13 (B). The resin layer 250 may be formed on the recess 38 to cover the base layer 210 where the wiring layer 230 is not disposed. The method of forming the resin layer 250 may be formed by a screen printing method, but is not limited thereto. A region of the wiring layer 230 exposed from the resin layer 250 includes an input terminal 231 having an input side electrode pad 31 and an output terminal 233 having an output side electrode pad 32, The upper surface of the electrode pads 35 and 36 of the intermediate connection portion 235 disposed between the output terminal 231 and the output terminal 233 can be exposed. The upper surface of the connection line 38 may not be exposed from the resin layer 250.

As shown in FIG. 13C, the semiconductor device 101 may be bonded to the electrode pads 31, 32, 35, and 35 in a flip chip manner and connected to each other. Accordingly, a resin layer, for example, a resin material of a reflective material is disposed in a region between the semiconductor element 101 and the light emitting element, for example, a region that does not overlap with the light emitting element in the vertical direction, .

The semiconductor module according to the embodiment includes devices such as an interior lamp, an outdoor lamp, a street lamp, an automobile lamp, a headlight or tail lamp of a moving or fixing device, and an indicator lamp. The light emitting side of the semiconductor module according to the embodiment may include at least one of a light guide plate, a diffusion sheet, and a prism sheet.

The semiconductor module may be used as a light source of a lighting system, for example, as a light source of an image display device or a lighting device. When used as a backlight unit of a video display device, it can be used as an edge type backlight unit or as a direct-type backlight unit. When used as a light source of a lighting device, it can be used as a regulator or a bulb type. It is possible.

A light emitting device using a semiconductor device includes a laser diode in addition to the light emitting diode described above. Like the light emitting device, the laser diode may include a first conductivity type semiconductor layer having the structure described above, an active layer, and a second conductivity type semiconductor layer. Then, electro-luminescence (electroluminescence) phenomenon in which light is emitted when an electric current is applied after bonding the p-type first conductivity type semiconductor and the n-type second conductivity type semiconductor is used, And phase. That is, the laser diode can emit light having one specific wavelength (monochromatic beam) with the same phase and in the same direction by using a phenomenon called stimulated emission and a constructive interference phenomenon. It can be used for optical communication, medical equipment and semiconductor processing equipment.

As the light receiving element, a photodetector, which is a kind of transducer that detects light and converts the intensity of the light into an electric signal, is exemplified. As such a photodetector, a photodiode (e.g., a PD with a peak wavelength in a visible blind spectral region or a true blind spectral region), a photodiode (e.g., a photodiode such as a photodiode (silicon, selenium), a photoconductive element (cadmium sulfide, cadmium selenide) , Photomultiplier tube, phototube (vacuum, gas-filled), IR (Infra-Red) detector, and the like.

In addition, a semiconductor device such as a photodetector may be fabricated using a direct bandgap semiconductor, which is generally excellent in photo-conversion efficiency. Alternatively, the photodetector has a variety of structures, and the most general structure includes a pinned photodetector using a pn junction, a Schottky photodetector using a Schottky junction, and a metal-semiconductor metal (MSM) photodetector have.

The photodiode, like the light emitting device, may include the first conductivity type semiconductor layer having the structure described above, the active layer, and the second conductivity type semiconductor layer, and may have a pn junction or a pin structure. The photodiode operates by applying reverse bias or zero bias. When light is incident on the photodiode, electrons and holes are generated and a current flows. At this time, the magnitude of the current may be approximately proportional to the intensity of the light incident on the photodiode.

A photovoltaic cell or a solar cell is a type of photodiode that can convert light into current. The solar cell, like the light emitting device, may include the first conductivity type semiconductor layer, the active layer and the second conductivity type semiconductor layer having the above-described structure.

In addition, it can be used as a rectifier of an electronic circuit through a rectifying characteristic of a general diode using a p-n junction, and can be applied to an oscillation circuit or the like by being applied to a microwave circuit.

In addition, the above-described semiconductor element is not necessarily implemented as a semiconductor, and may further include a metal material as the case may be. For example, a semiconductor device such as a light receiving element may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, Or may be implemented using a doped semiconductor material or an intrinsic semiconductor material.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

11: Transparent substrate 13: Semiconductor structure
31, 33, 35, 36: electrode pad 37: connection line
38: recesses 51:
100, 100A, 100B: semiconductor modules 127, 129: electrodes
101, 103: Semiconductor device 120: Phosphor layer
200: circuit board 210: base layer
230: wiring layer 231: input terminal
233: output terminal 235: intermediate connection
250: resin layer

Claims (14)

A wiring layer having a plurality of electrode pads; And a circuit board having a resin layer on the wiring layer; And
And a semiconductor element disposed on the plurality of electrode pads of the circuit board,
Wherein the resin layer includes a material having a reflectance higher than that of the electrode pad,
Wherein the upper surface of the resin layer has a height equal to or lower than a straight line parallel to the upper surface of the plurality of electrode pads. A base layer; A wiring layer having a plurality of electrode pads and recesses on the base layer; A circuit board having a resin layer on the base layer; And
And a semiconductor element disposed on the plurality of electrode pads of the circuit board,
The resin layer is formed of a reflective material,
Wherein the recess is disposed lower than the upper surface of the electrode pad,
Wherein the resin layer extends to the recess,
And the upper surface of the resin layer is disposed lower than the lower surface of the semiconductor element. The semiconductor device according to claim 1, wherein the wiring layer includes a concave recess between the plurality of electrode pads,
Wherein the resin layer extends within the recess. The semiconductor module of claim 3, wherein the recess is disposed on at least one of an input line, an output line, and a connection line connected to at least one of the plurality of electrode pads. The semiconductor module according to any one of claims 2 to 4, wherein the semiconductor element includes an LED vertically overlapping the plurality of electrode pads. The semiconductor module according to claim 5, wherein the wiring layer connects two adjacent LEDs in series or in parallel. 6. The semiconductor device according to claim 5, wherein the semiconductor element has a first array portion having a plurality of semiconductor elements connected to each other and emitting light of a first color, and a plurality of second semiconductor elements connected to each other to emit light of a second color A second array section,
Wherein the first and second array units are connected in parallel to each other. The semiconductor device according to claim 4, wherein the input line connects an input terminal to an electrode pad connected to an input terminal of the plurality of semiconductor elements,
The output line connects an output terminal and an electrode pad connected to an output end of the plurality of semiconductor elements,
Wherein the connection line connects electrode pads connected to the plurality of semiconductor elements. The semiconductor module according to claim 8, wherein an outer side of the electrode pad is disposed at an angle of 30 degrees or less from a side of the semiconductor element with respect to an outer point of the reflective layer in the semiconductor element. The semiconductor module according to claim 4, wherein the recess is disposed in a region that does not overlap vertically with the semiconductor element. The semiconductor module according to any one of claims 2 to 4, wherein the wiring layer has a plurality of connection lines in which the recesses are arranged. The semiconductor module according to any one of claims 2 to 4, wherein the reflectance of the resin layer is higher than that of the upper surface of the electrode pad. The semiconductor module according to any one of claims 2 to 4, wherein a depth of the recess is 40% to 60% of a thickness of the electrode pad. The semiconductor module according to any one of claims 2 to 4, wherein the semiconductor element includes at least one of blue, green, and red LEDs mounted in a flip chip manner.

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