KR20170072512A - Liquid crystal display device - Google Patents

Abstract

A liquid crystal display device is provided. The liquid crystal display device includes a liquid crystal display panel which is time-divisionally driven by a display period and a touch period and includes a display region and a non-display region. The data driving circuit supplies a data signal to the liquid crystal display panel. A liquid crystal display panel includes a pixel array in which a plurality of data lines and a plurality of gate lines intersect each other in a display region, pixels are arranged in each of the intersected regions, a non-display region adjacent to the display region, And a noise reduction section including a gate driving circuit for supplying a gate signal to the plurality of gate lines and a compensation transistor arranged between the pixel and the stage and reducing the noise generated during the touch period. The data driving circuit supplies a compensating transistor control signal having a voltage lower than the gate low voltage (VGL) to the gate electrode of the compensating transistor during the display period. In the liquid crystal display device according to an embodiment of the present invention, deterioration of the compensation transistor that reduces the influence of the ripple of the gate signal during the touch period in the liquid crystal display device using the in-cell type touch screen panel can be suppressed.

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of suppressing deterioration of a compensating transistor that reduces noise generated during a touch period.

Flat panel displays (FPDs) have been employed in a variety of electronic devices such as mobile phones, tablets, notebook computers, televisions, and monitors. BACKGROUND ART [0002] Recent FPDs include a liquid crystal display device, an organic light emitting diode display, and the like. Such a display device includes a pixel array including a plurality of pixels, in which an image is displayed and composed of a plurality of pixels, and a driving circuit that controls light to be transmitted or emitted in each of the plurality of pixels. The driving circuit of the display device is a data driving circuit for supplying a data signal to the data lines of the pixel array, and sequentially supplies a gate signal (or a scanning signal) synchronized with the data signal to the gate lines (or scan lines) And a timing controller for controlling the gate driver circuit (or scan driving circuit) and the data driving circuit and the gate driving circuit.

Each of the plurality of pixels may include a thin film transistor that supplies a voltage of the data line to the pixel electrode in response to a gate signal supplied through the gate line. The gate signal swings between the gate high voltage (VGH) and the gate low voltage (VGL). That is, the gate signal appears in the form of a pulse. The gate high voltage VGH is set to a voltage higher than the threshold voltage of the thin film transistor formed on the display panel and the gate low voltage VGH is set to a voltage lower than the threshold voltage of the thin film transistor. The thin film transistors of the pixels are turned on in response to the gate high voltage.

2. Description of the Related Art Recently, a liquid crystal display (LCD) device equipped with a touch screen panel (TSP), which is a device for sensing a user's touch input, has been widely used. The touch screen panel may be attached on the liquid crystal display device in an on-cell manner. However, in the case of the on-cell method, the thickness of the liquid crystal display device is increased and the visibility of the liquid crystal display device is lowered due to the increased thickness. In order to solve this problem, an in-cell type touch screen panel in which a touch screen panel is integrated into a liquid crystal display has been developed.

The common electrode of the liquid crystal display device to which the in-cell type touch screen panel is applied can also be used as a touch electrode. Also, a common voltage line connected to the common electrode may be used as a touch signal line for receiving a touch signal. That is, the liquid crystal display device employing the in-cell type touch screen panel performs time division driving, and the common electrode operates as a common electrode that forms an electric field with the pixel electrode during the first time period, and during the second time period, . Accordingly, a liquid crystal display device using an in-cell type touch screen pattern uses a first time period as a display period and a second time period as a touch period.

 [Related Technical Literature]

One. Display device and driving method thereof (Korean Patent Laid-open No. 10-2015-0044318)

As described above, the inventors of the present invention have found that a noise of a gate signal generated during a touch period, for example ripple, in a liquid crystal display device to which an in-cell type touch screen panel is applied affects a common voltage, Thereby causing a malfunction of the panel.

Therefore, a compensating transistor is used to solve the problem of the touch screen panel due to the ripple of the gate signal. Here, the compensation transistor discharges the ripple of the gate signal generated during the touch period in a short time, thereby reducing the influence of the gate signal ripple on the common voltage.

The compensating transistor also receives a positive bias temperature shift (PBTS) due to a high voltage during a touch period, so that the compensating transistor is gradually deteriorated and the threshold voltage (Vth) of the compensating transistor is positively shifted. Further, due to the continuous deterioration of the compensating transistor, ripple is not suppressed to the common voltage during the touch period, and malfunction of the touch screen panel is not suppressed.

In order to solve the problem caused by the positive shift of the compensation transistor, there is a need for a liquid crystal display capable of reducing the problem caused by deterioration of the compensation transistor. A new method of a liquid crystal display device capable of improving the reliability of a compensating transistor for suppressing malfunction of a touch screen panel has been invented.

Accordingly, it is an object of the present invention to provide a liquid crystal display device capable of suppressing a positive shift of a compensating transistor during a touch period.

The problems of the present invention are not limited to the above-mentioned problems, and other problems not mentioned can be clearly understood by those skilled in the art from the following description.

A liquid crystal display according to an embodiment of the present invention is provided. The liquid crystal display device includes a liquid crystal display panel including a display area and a non-display area, which are configured to be time-divisionally driven by a display period and a touch interval in one frame. And a data driving circuit configured to supply a data signal to the liquid crystal display panel. The liquid crystal display panel includes a pixel array in which pixels corresponding to the data lines, the gate lines intersecting the data lines and the data lines and the gate lines are arranged in the display region, a stage arranged in the non-display region adjacent to the display region, And a noise reduction unit including a gate driving circuit for supplying a gate signal to the gate line and a compensation transistor arranged between the pixel and the stage and configured to reduce noise generated during the touch period. The data driving circuit is configured to supply a compensating transistor control signal having a voltage lower than the gate low voltage (VGL) to the gate electrode of the compensating transistor during the display period. In the liquid crystal display device according to an embodiment of the present invention, deterioration of the compensation transistor that reduces the influence of the ripple of the gate signal during the touch period in the liquid crystal display device using the in-cell type touch screen panel can be suppressed.

The data driving circuit may be configured to supply a compensating transistor control signal having a gate high voltage (VGH) to the gate electrode of the compensating transistor during a touch period.

The data driving circuit may be configured to supply the compensating transistor control signal corresponding to the ratio of the duty period of the gate high voltage to the ratio of the touch period to one frame to the gate electrode of the compensating transistor.

The compensation transistor may include a drain electrode coupled to the gate line and a source electrode coupled to the gate low voltage (VGL) line.

The value obtained by subtracting the voltage of the source electrode from the voltage of the gate electrode of the compensating transistor during the touch period may be positive.

The value obtained by subtracting the voltage of the source electrode from the voltage of the gate electrode of the compensating transistor during the display period may be negative.

A liquid crystal display according to another embodiment of the present invention is provided. A liquid crystal display device is configured to be turned on during a display period and configured to turn-off during a touch period, wherein a pixel including a driving transistor includes a plurality of data lines and a plurality of gates And a pixel array arranged corresponding to each of the crossing regions of the lines. The gate drive circuit is arranged in a non-display area adjacent to the display area, and is configured to supply a gate signal for turning on the drive transistor to the plurality of gate lines in a time-division manner. The data driver circuit is configured to supply a data signal to the plurality of data lines. The noise reduction unit includes a compensation transistor arranged between the pixel and the gate drive circuit and configured to reduce noise generated during the touch period. The data driving circuit is configured to supply a compensating transistor control signal capable of compensating for a positive shift of the threshold voltage of the compensating transistor to the noise reducing section. In a liquid crystal display device according to another embodiment of the present invention, reliability of a compensating transistor for suppressing malfunction of a touch screen panel in a liquid crystal display device using an in-cell type touch screen panel can be improved.

The data driving circuit may be configured to supply a compensating transistor control signal to the gate electrode of the compensating transistor.

The data drive circuit supplies a compensating transistor control signal swinging between the control high voltage TCH and the control low voltage TCL while the control high voltage is the gate high voltage VGH and the control low voltage is the gate low voltage VGL ). ≪ / RTI >

During the display interval, the compensating transistor control signal may be configured to negatively shift the threshold voltage of the compensating transistor.

The compensating transistor control signal during the touch period can be configured to positively shift the threshold voltage of the compensating transistor.

The duty ratio of the compensating transistor control signal corresponding to the display period and the touch period is determined by the voltage value between the gate electrode and the source electrode of the compensating transistor corresponding to the display period and the voltage between the gate electrode and the source electrode of the compensating transistor corresponding to the touch period Lt; RTI ID = 0.0 > a < / RTI > threshold voltage of the compensation transistor based on the value of the threshold voltage.

The duty ratio of the compensating transistor control signal can be determined so as to suppress the positive shift or the negative shift based on the threshold voltage positive shift speed of the compensating transistor corresponding to the touch period and the threshold voltage negative shift speed of the compensating transistor corresponding to the display period.

The duty ratio of the compensating transistor control signal can be determined to swing within a set range such that the threshold voltage suppresses a positive shift or a negative shift.

The details of other embodiments are included in the detailed description and drawings.

A liquid crystal display device using an in-cell type touch screen panel is provided with a liquid crystal display device including a data driving circuit for supplying a compensating transistor control signal for suppressing deterioration of a compensating transistor for reducing the influence of a ripple of a gate signal during a touch period. A display device can be manufactured.

The effects according to the present invention are not limited by the contents exemplified above, and more various effects are included in the specification.

1 is a block diagram showing the relationship between a driving circuit and a driving circuit of a liquid crystal display device according to an embodiment of the present invention.
FIG. 2 is a block diagram showing the relationship between a stage of a gate driving circuit, a noise reducing section, and a control signal supplied thereto, according to an embodiment of the present invention.
3 is a schematic circuit diagram showing a relationship between a pixel array, a gate driving circuit, and a noise reduction unit according to an embodiment of the present invention.
4 is a waveform diagram showing a signal supplied to the compensating transistor according to the comparative example.
5 is a graph showing a threshold voltage of a compensating transistor for a time according to a comparative example.
6 is a waveform diagram showing a signal supplied to a compensating transistor according to an embodiment of the present invention.
7 is a graph illustrating a threshold voltage of a compensating transistor for a time according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited thereto. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. Where the terms "comprises", "having", "done", and the like are used in this specification, other portions may be added unless "only" is used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is not used, one or more other portions may be located between the two portions.

It will be understood that when an element or layer is referred to as being on another element or layer, it encompasses the case where it is directly on or intervening another element or intervening another element or element.

Although the first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

Like reference numerals refer to like elements throughout the specification.

The sizes and thicknesses of the individual components shown in the figures are shown for convenience of explanation and the present invention is not necessarily limited to the size and thickness of the components shown.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other partially or entirely and technically various interlocking and driving is possible as will be appreciated by those skilled in the art, It may be possible to cooperate with each other in association.

Various embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram showing the relationship between a driving circuit and a driving circuit of a display device according to an embodiment of the present invention. 1, a liquid crystal display 100 includes a driving circuit for inputting data of an input image to a pixel array 110 of a liquid crystal display panel (PNL) and a liquid crystal display panel (PNL) . The liquid crystal display device 100 is a liquid crystal display device to which an in-cell type touch screen panel is applied, and a common electrode Ec of a pixel is used as a touch electrode of a touch screen panel. Hereinafter, a liquid crystal display device 100 to which an in-cell type touch screen panel is applied will be described.

1, the liquid crystal display panel PNL includes a plurality of data lines 139, a plurality of gate lines 149 orthogonal to the plurality of data lines 139, a plurality of data lines 150, And a pixel array 110 in which pixels are arranged in a matrix form defined by a gate line 149. A driving transistor TFT for driving each pixel is disposed for each pixel of the pixel array 110. The driving transistor TFT is connected to a gate electrode through which a gate signal is inputted via a gate line 149, A source electrode to which a data signal is input, and a drain electrode connected to the pixel electrode Ep. The driving transistor (TFT) of this pixel is turned on during a display period and turned off during a touch period in one frame.

1, a driving circuit of a liquid crystal display 100 includes a data driving circuit 130 for supplying a data voltage to a plurality of data lines 139, a gate signal synchronized with a data voltage to a plurality of gate lines 149 A gate driving circuit 140 and a timing controller (TCON)

The timing controller 120 transmits the data of the input image received from the external host system to the data driving circuit 130 and the gate driving circuit 140. The timing controller 120 receives timing signals such as a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a dot clock synchronized with an input video from an external host system. The timing controller 120 generates various control signals for controlling the operation timings of the data driving circuit 130 and the gate driving circuit 140 based on the input timing signal. That is, the timing controller 120 generates a data driver control signal (DDC) for controlling the data driving circuit 130 and generates a gate driver control signal Gate for controlling the gate driving circuit 140 Driver control signal (GDC). The timing controller 120 may be disposed outside the liquid crystal display panel PNL. Specifically, the timing controller 120 may be disposed on a printed circuit board. The timing controller 120 transmits the data driver control signal DDC to the data driving circuit 130 from the outside of the liquid crystal display panel PNL and transfers the gate driver control signal GDC to the gate driver. However, the present invention is not limited thereto, and the timing controller 120 may be disposed inside the liquid crystal display panel PNL. Also, the timing controller 120 may be integrated with the data driving circuit 130.

The data driving circuit 130 receives the data of the input image and the data driver control signal DDC from the timing controller 120. The data driving circuit 130 converts the data of the input image into the gamma compensation voltage by the data driver control signal DDC transmitted from the timing controller 120 to generate the data voltage and supplies the data voltage to the plurality of data lines 139 . The data driving circuit 130 includes a plurality of source electrode driver ICs (Integrated Circuits). The source electrode drive IC is connected to a plurality of data lines 139 by a COG (Chip On Glass) process or a TAB (Tape Automated Bonding) process.

Further, the data driving circuit 130 can supply various control signals to the liquid crystal display panel (PNL). For example, the data driving circuit 130 can generate the gate low voltage VGL and the gate high voltage VGH and supply the gate low voltage VGL and the gate high voltage VGH to the liquid crystal display panel PNL.

The gate driving circuit 140 may be implemented as a GIP (Gate in Panel) circuit. The gate driving circuit 140 receives the signal transmitted from the level shifter and drives the GIP circuit to supply the gate signal to the gate line 149. Here, the level shifter may be physically separated from the GIP circuit and disposed outside the liquid crystal display panel PNL, and may be disposed on an external circuit portion (e.g., a printed circuit board) connected to the liquid crystal display panel PNL . But the present invention is not limited thereto, and the level shifter may be integrated with the gate driving circuit 140. [ 1, the gate driving circuit 140 may be disposed on only one side of the liquid crystal display panel PNL, but may be disposed on both sides of the liquid crystal display panel PNL according to the embodiment, The position of the liquid crystal display panel PNL is not limited thereto. Hereinafter, the gate drive circuit 140 will be described on the basis of a GIP circuit.

The gate driver control signal GDC transmitted from the timing controller 120 is converted into a voltage level by the level shifter and input to the GIP circuit. Since the signal inputted to the level shifter is a digital signal, the thin film transistors of the liquid crystal display panel (PNL) can not be driven. The level shifter shifts the voltage of each of the gate driver control signals GDC transmitted from the timing controller 120 to generate a signal having a voltage swinging between the gate low voltage VGL and the gate high voltage VGH . The gate high voltage VGH is set to a voltage higher than the threshold voltage of the thin film transistor formed on the liquid crystal display panel PNL and the gate low voltage VGL is set to a voltage lower than the threshold voltage of the thin film transistor. Thus, the signal converted by the level shifter is time-divided through the GIP circuit and supplied to each gate line.

Referring to FIG. 1, the liquid crystal display 100 further includes a noise reduction unit 150 disposed between the pixel array 110 and the gate drive circuit 140.

The noise reduction unit 150 is configured to reduce the influence of the noise of the gate signal generated during the touch period on the common voltage. The noise reduction unit 150 receives the gate signal output from the gate drive circuit 140 and reduces noise such as ripple of the gate signal and supplies the noise to the pixel array 110. Accordingly, the noise reduction unit 150 can reduce the noise generated during the touch period to the pixels of the pixel array 110, thereby reducing the noise of the common voltage.

In particular, the noise reduction unit 150 may be driven by receiving a control signal from the data driving circuit 130. Waveforms and characteristics of a specific control signal received from the data driving circuit 130 will be described later with reference to Figs. 6 and 7. Fig.

A liquid crystal display 100 according to an embodiment of the present invention includes a timing controller 120, a data driving circuit 130, a gate driving circuit 140, and a noise reduction unit 150 for driving the pixel array 110, . Here, since the noise reduction unit 150 reduces noise in the gate signal input during the touch period, noise of the common voltage due to the noise included in the gate signal is reduced. Accordingly, erroneous operation of the touch screen panel due to the noise of the common voltage is also reduced. The specific configuration of the noise reduction unit 150 will be described later with reference to Fig. 2 and Fig.

FIG. 2 is a block diagram showing the relationship between a stage of a gate driving circuit, a noise reducing section, and a control signal supplied thereto, according to an embodiment of the present invention. 3 is a schematic circuit diagram showing a relationship between a pixel array, a gate driving circuit, and a noise reduction unit according to an embodiment of the present invention.

Referring to FIGS. 2 and 3, the gate driving circuit 140 is disposed at one side of the pixel array 110 away from the pixel array 110. The gate drive circuit 140 includes a plurality of stages. Each stage may be composed of a shift register. Specifically, the gate drive circuit 140 disposed on the left side of the pixel array 110 includes a plurality of stages ST1 to STn that are connected in a dependent manner. Further, each of the stages ST1 to STn is connected to a pull-up transistor PU1 to PUn including a gate electrode connected to the Q node and a gate electrode connected to the QB node and a gate low voltage (VGL) line And pull-down transistors PD1 to PDn including a source electrode. Here, the stages ST1 to STn output the outputs of one of the pull-up transistors PU1 to PUn and the pull-down transistors PD1 to PDn as gate signals.

The first carry signal Gout_Pre input to the k-th stage STk excluding the first stage ST1 is the output Gout of the (k-1) th stage STk-1, The second carry signal Gout_Post input to the k stage STk is the output Gout of the (k + 1) th stage STk + 1. The first carry signal Gout_Pre is not input to the first stage ST1 and the start pulse VST is input. The second carry signal Gout_Post is not inputted to the last stage STn and a reset pulse is inputted from a dummy stage (End Generator). Here, n is the number of gate lines, and k is an arbitrary integer between 1 and n. For example, n may be 1920.

Specifically, the stages ST1 to STn of the gate driving circuit 140 start to output gate signals in response to the start pulse VST. The gate signal output from each of the stages ST1 to STn is supplied to the gate lines G1 to Gn and simultaneously input to the next stage as the first carry signal Gout_Pre.

The gate driving circuit 140 receives the gate driver control signal GDC and outputs a voltage. That is, the gate driving circuit 140 sequentially supplies the gate signals generated in the level shifter through the plurality of stages ST1 to STn to the gate lines G1 to Gn by the gate driver control signal GDC. Here, the gate driver control signal GDC includes a gate start pulse (GSP) VST and a gate shift clock GSC (CLK). Accordingly, the gate driving circuit 140 sequentially supplies gate signals to the gate lines G1, G2, ..., Gn.

The gate driving circuit 140 includes a dummy stage EG that does not generate an output but supplies a second carry signal Gout_Post to a previous stage. That is, the gate drive circuit 140 includes the dummy stage EG as the next stage of the last stage STn. That is, the dummy stage EG is connected to the last stage STn for outputting the last gate signal, and the dummy stage EG supplies the second carry signal Gout_Post to the last stage STn without outputting the gate signal do.

The shift clock CLK is input to the stages ST1 to STn of the gate driving circuit 140. [ The shift clock signal CLK controls the timing at which the first carry signal Gout_Pre and the second carry signal Gout_Post are input to the gate driving circuit 140. [

2 and 3, the noise reduction unit 150 includes compensation transistors TT1 to TTn connected to the gate lines G1 to Gn, respectively. In detail, each of the compensating transistors TT1 to TTn includes a gate electrode connected to each of the tail TFT control signal (TCS) lines, a drain electrode connected to each of the gate lines G1 to Gn, And a source electrode connected to the source electrode. Accordingly, the noise reduction section 150 has the compensation transistors TT1 to TTn by the number of the gate lines G1 to Gn.

Here, the noise reduction unit 150 is turned off during the display period to transfer the gate signal supplied to the gate lines G1 to Gn in the stages ST1 to STn to the pixel array 110 as it is. On the other hand, the noise reduction unit 150 is turned on during the touch period, and the gate low voltage VGL is supplied to the drain electrodes connected to the gate lines G1 to Gn. Accordingly, only the gate low voltage VGL is transferred to the pixel array 110 through the gate lines G1 to Gn during the touch period, and therefore, the data signal is transferred to the stage 110 through the gate lines G1 to Gn Noise (e.g., ripple) of the gate signal generated in ST1 to STn is reduced. That is, during the touch period, the compensation transistors TT1 to TTn of the noise reduction unit 150 are activated to reduce the noise transmitted to the pixel array 110. [

A liquid crystal display 100 to which an in-cell type touch screen panel according to an exemplary embodiment of the present invention is applied includes a noise reduction unit 150 disposed between the pixel array 110 and the gate driving circuit 140 . The compensating transistors TT1 to TTn of the noise reduction unit 150 are turned off during the display period to transfer the gate signal generated by the gate driving circuit 140 to the pixel array 110. [ On the other hand, the compensating transistors TT1 to TTn of the noise reduction unit 150 are turned on during the touch period to supply the gate line voltage VGL to the pixel array 110, and the gate driving circuit 140 The noise of the gate signal that can be generated is prevented from being transmitted to the pixel array 110. Accordingly, the noise reduction unit 150 reduces noise transmitted to the pixel array 110.

As described above, the noise reduction unit 150 can reduce the noise of the gate signal transmitted to the pixel array 110 during the touch period by the operation of the compensation transistors TT1 to TTn. The compensation transistors TT1 to TTn, (For example, a threshold voltage characteristic) of the pixel array 110 is an important factor for reducing the noise of the gate signal transmitted to the pixel array 110 during the touch period. Specifically, the threshold voltage Vth of the compensating transistors TT1 to TTn is deteriorated by a bias of the voltage Vgs between the gate electrode G and the source electrode S. The threshold voltage Vth of the compensating transistors TT1 to TTn is positively shifted when the voltage Vgs between the gate electrode G and the source electrode S is positive and the threshold voltage Vth between the gate electrode G and the source electrode S is positive The threshold voltage Vth of the compensating transistors TT1 to TTn is negatively shifted. Thus, when the threshold voltage Vth of the transistors TT1 to TTn is shifted for a long time, the characteristics of the transistors TT1 to TTn are deteriorated. The voltage Vgs between the gate electrode G and the source electrode S of the compensating transistors TT1 to TTn is influenced by the efficiency of suppressing the noise of the gate signal transmitted to the pixel array 110 during the touch period .

The data driving circuit 130 supplies the compensating transistor control signal to the noise reduction section 150 through the compensating transistor control (TCS) line so as to suppress the positive shift of the threshold voltage Vth of the compensating transistors TT1 to TTn do. Variations of the compensating transistor control signals supplied to the compensating transistors TT1 to TTn of the noise reduction unit 150 and the threshold voltage (Vth) characteristics of the compensating transistors TT1 to TTn accordingly will be described later with reference to Figs. 4 to 7 The comparative example will be described below in comparison with one embodiment of the present invention.

4 is a waveform diagram showing a signal supplied to the compensating transistor according to the comparative example. 5 is a graph showing a threshold voltage of a compensating transistor for a time according to a comparative example. 4 and 5 are diagrams showing the arrangement of pixels arranged in a region where the first stage ST1 and the first data line D1 and the first gate line G1 are crossed in the liquid crystal display 100 of FIG. A noise reduction unit 150, and a first compensation transistor TT1. Will be described later with reference to Fig. 3 for convenience of explanation.

Referring to FIG. 4, one frame is composed of a display period of 10.7 msec and a touch interval of 6 msec. That is, one frame is 16.7 msec, and the liquid crystal display device 100 is driven at 60 Hz.

3 and 4, the gate electrode G of the first compensating transistor TT1 is connected to the gate of the gate electrode G swinging from the gate high voltage VGH to the gate low voltage VGL through the compensating transistor control (TCS) A voltage VG is applied. Specifically, during the display period, the gate low voltage VGL is applied to the gate electrode G of the first compensating transistor TT1 through the compensating transistor control (TCS) line, and the compensating transistor control (TCS) line is applied during the touch period The gate high voltage VGH is applied to the gate electrode G of the first compensation transistor TT1.

Referring to FIGS. 3 and 4, a gate low voltage VGL is applied to the source electrode S of the first compensation transistor TT1. That is, since the source electrode S of the first compensation transistor TT1 is directly connected to the gate low voltage (VGL) line, the source electrode S of the first compensation transistor TT1 is continuously supplied with the display period and the touch period A gate-low voltage VGL is applied.

3 and 4, a gate signal supplied to the first gate line G1 is applied to the drain electrode of the first compensation transistor TT1. Specifically, during the display period, the gate low voltage VGL is applied to the drain electrode D of the first compensating transistor TT1 to turn off the first compensating transistor TT1. The drain electrode D of the first compensation transistor TT1 is connected to the output voltage node of the first stage ST1 through the first gate line G1. Accordingly, the gate signal supplied to the first gate line G1 is directly applied to the drain electrode D of the first compensation transistor TT1 during the display period. Meanwhile, during the touch period, the gate high voltage VGH is applied to the gate electrode G of the first compensation transistor TT1 to turn on the first compensation transistor TT1. When the first compensation transistor TT1 is turned on, the drain electrode D of the first compensation transistor TT1 is connected to the source electrode S through a channel. Accordingly, the gate low voltage VGL connected to the source electrode S is directly applied to the drain electrode D of the first compensating transistor TT1 during the touch period.

3 and 4, the voltage Vgs between the gate electrode G and the source electrode S of the first compensating transistor TT1 changes from 0V to the gate low voltage VGL at the gate high voltage VGH, And swings between the voltages. Specifically, the voltage Vgs between the gate electrode G and the source electrode S of the first compensating transistor TT1 during the display period is 0 V, and during the touch period, the gate electrode G of the first compensating transistor TT1 ) And the source electrode S is a voltage obtained by subtracting the gate high voltage VGH from the gate low voltage VGL. For example, when the gate high voltage VGH is 14V and the gate low voltage VGL is -12V, the potential difference between the gate electrode G and the source electrode S of the first compensation transistor TT1 during the touch period The voltage Vgs is 26V.

Accordingly, only 0 V is applied between the gate electrode G and the source electrode S during the display period in the first compensation transistor TT1, and a voltage of 0 V is always applied between the gate electrode G and the source electrode S during the touch period. Only a positive voltage is applied. That is, the voltage Vgs between the gate electrode G and the source electrode S is always equal to or greater than 0 V during one frame of the first compensation transistor TT1. In other words, only the positive bias voltage is continuously applied to the first compensation transistor TT1. Thus, when only the positive bias voltage is applied to the first compensation transistor TT1, only the positive shift of the threshold voltage Vth of the first compensation transistor TT1 is achieved.

Referring to FIGS. 4 and 5, as only the positive bias voltage is applied to the first compensating transistor TT1, the threshold voltage Vth of the first compensating transistor TT1 is also positively shifted continuously over time . Accordingly, after a long time, the threshold voltage Vth of the first compensating transistor TT1 becomes equal to the voltage Vgs between the gate electrode G and the source electrode S of the first compensating transistor TT1 . The threshold voltage Vth of the first compensating transistor TT1 is set to be equal to the threshold voltage Vth of the gate electrode G and the source electrode S of the first compensating transistor TT1 after 10 hours of driving the liquid crystal display device 100. [ (26 V), which is the maximum value of the voltage (Vgs).

Here, if the threshold voltage Vth of the first compensation transistor TT1 is equal to the voltage Vgs between the gate electrode of the first compensation transistor TT1 and the source electrode S, The compensation transistor TT1 is not turned on. That is, the first compensation transistor TT1 is kept in the turn-off state continuously. When the first compensating transistor TT1 is in the turn-off state, the first compensating transistor TT1 transfers the gate signal to the pixel through the drain electrode D as it is in the touch period, as in the display period.

Accordingly, when the threshold voltage Vth of the first compensating transistor TT1 becomes equal to the voltage Vgs between the gate electrode G and the source electrode S of the first compensating transistor TT1, (TT1) is always in the turn-off state, the noise of the gate signal is transmitted to the pixel as it is in the touch period.

Accordingly, the first compensating transistor TT1 according to the comparative example deteriorates and the first compensating transistor TT1 does not operate during the touch interval. The noise reducing unit 150 removes the noise of the gate signal from the pixel array 110 ) To reduce the noise.

6 is a waveform diagram showing a signal supplied to a compensating transistor according to an embodiment of the present invention. 7 is a graph illustrating a threshold voltage of a compensating transistor for a time according to an embodiment of the present invention. 6 and 7 are schematic diagrams of the liquid crystal display 100 of FIG. 3 in which the first stage ST1, the first data line D1 and the first gate line G1 are arranged in a crossing area, A waveform and a graph according to an embodiment of the present invention, which are based on the noise reduction unit 150 and the first compensation transistor TT1. The waveform diagram shown in Fig. 6 is a waveform diagram in which the gate voltage VG of the first compensating transistor TT1 and the voltage Vgs between the gate electrode G and the source electrode S are different from each other in the waveform diagram shown in Fig. 4 However, the actual configuration of the remaining waveform diagrams is the same, and redundant description is omitted. Will be described later with reference to Figs. 1 and 3 for convenience of explanation.

Referring to FIGS. 3 and 6, a compensation transistor control signal is applied to the gate electrode G of the first compensation transistor TT1 through a compensation transistor control (TCS) line. In other words, the data driving circuit 130 supplies the compensating transistor control signal to the gate electrode G of the first compensating transistor TT1. Specifically, the compensating transistor control signal has a control low voltage (TCL) during the display period and a control high voltage (TCH) during the touch period. That is, the compensation transistor control signal swings between the control high voltage (TCH) and the control low voltage (TCL). Here, the control high voltage TCH may be the gate high voltage VGH. The control low voltage TCL is lower than the gate low voltage VGL. For example, the control high voltage (TCH) is 14V and the control low voltage (TCL) is -20V.

Accordingly, the data driving circuit 130 has a control low voltage (TCL) lower than the gate low voltage (VGL) during the display period through the compensating transistor control (TCS) line and controls the same as the gate high voltage And supplies the compensation transistor control signal having the high voltage (TCH) to the noise reduction section 150. [

3 and 6, the voltage Vgs between the gate electrode and the source electrode of the first compensating transistor TT1 changes from a voltage obtained by subtracting the gate low voltage VGL from the control low voltage TCL to a control high voltage TCH) minus the gate low voltage (VGL). Since the control low voltage TCL is lower than the gate low voltage VGL during the display period, the voltage Vgs between the gate electrode and the source electrode of the first compensation transistor TT1 during the display period is less than 0V.

The voltage Vgs between the gate electrode G and the source electrode S of the first compensating transistor TT1 becomes equal to the gate high voltage VGH when the control high voltage TCH is the gate high voltage VGH during the touch period, ) Minus the gate low voltage (VGL). The voltage Vgs between the gate electrode G and the source electrode S of the first compensating transistor TT1 during the display period is a voltage obtained by subtracting the gate low voltage VGL from the control low voltage TCL. For example, if the control high voltage TCH and the gate high voltage VGH are 14V, the control low voltage TCL is -20V, and the gate low voltage VGL is -12V, The voltage Vgs between the gate electrode G and the source electrode S of the transistor TT1 is 26 V and the voltage between the gate electrode G and the source electrode S of the first compensation transistor TT1 during the display period The voltage Vgs is -8V.

Referring to FIG. 6, one frame includes a display period of 10.7 msec and a touch interval of 6 msec. That is, one frame is 16.7 msec, and the liquid crystal display device 100 is driven at 60 Hz. The voltage Vgs between the gate electrode and the source electrode of the first compensating transistor TT1 in the display period and the touch period and the duty ratio of the touch period in the compensating transistor control signal are as shown in Table 1 .

Display interval Touch section Vgs (V) -20 - (- 12) = - 8 14 - (- 12) = 26 Duty ratio (%) (10.7 / 16.7) * 100 = 64 (6 / 16.7) * 100 = 36

Accordingly, the voltage Vgs between the gate electrode and the source electrode of the first compensation transistor TT1 during the touch period is 26V, and the duty ratio of the control high voltage TCH in the compensation transistor control signal is about 36%.

Here, the Vgs duty ratio can be set to correspond to the display period and the touch period based on one frame. That is, the Vgs duty ratio may be set to have a negative bias corresponding to the display period and have a positive bias corresponding to the touch period. For example, the Vgs duty ratio is about 36% in one frame based on the positive bias, which is set equal to the ratio of the touch period in one frame. To this end, the compensating transistor control signal has a control low voltage (TCL) during the display interval and can be set to have a control high voltage (TCH) during the touch interval.

Further, in order to compensate the shift of the threshold voltage Vth of the first compensation transistor TT1, the Vgs duty ratio is a positive shift of the threshold voltage Vth of the compensating transistor based on Vgs of the display period and Vgs of the touch period, or It can be determined to suppress the negative shift.

Specifically, the rate at which the threshold voltage Vth of the compensating transistor is shifted can be adjusted according to the voltage value of Vgs of the display period or Vgs of the touch period. For example, if the Vgs of the touch interval is -12 V, which is lower than -8 V, the negative shift can proceed faster for the same time. Conversely, when the Vgs of the display period is 30 V, which is higher than 26 V, the positive shift can proceed faster for the same time.

That is, since the degree of shift of the threshold voltage Vth of the compensation transistor can be adjusted according to the voltage magnitude of Vgs and the time when the voltage is applied, the Vgs duty ratio is adjusted in consideration of Vgs of the display period and Vgs of the touch period . Thereby, the duty ratio of the compensating transistor control signal can be determined so that the threshold voltage (Vth) of the compensating transistor swings within a range set so as to suppress the positive shift or the negative shift.

6 and 7, the voltage Vgs between the gate electrode and the source electrode of the first compensating transistor TT1 during the touch interval has a positive voltage, and the gate of the first compensating transistor TT1 during the display period The voltage Vgs between the electrode and the source electrode has a negative voltage. That is, a positive bias voltage is applied to the first compensation transistor TT1 during a touch interval, and a negative bias voltage is applied during a display interval.

Referring to FIGS. 6 and 7, as the negative bias voltage is applied to the first compensating transistor TT1 during the display period, the threshold voltage Vth of the first compensating transistor TT1 is negatively shifted. Further, as the positive bias voltage is applied to the first compensating transistor TT1 during the touch period, the threshold voltage Vth of the first compensating transistor TT1 is positively shifted. That is, during the display period, the compensating transistor control signal negatively shifts the threshold voltage (Vth) of the first compensating transistor (TT1), and during the touch period, the compensating transistor controlling signal decreases the threshold voltage (Vth) of the first compensating transistor Positive shift is performed.

As described above, the negative bias voltage and the positive bias voltage are differently applied to the display period and the touch period in one frame, so that the threshold voltage (Vth) of the first compensating transistor TT1 also repeats the negative shift and the positive shift . Accordingly, the threshold voltage Vth of the first compensating transistor TT1 does not significantly deteriorate even after the liquid crystal display device 100 is driven for a long time by either the positive shift or the negative shift due to the compensating transistor control signal.

Accordingly, the first compensating transistor TT1 is turned on for a long time and turned off for a display period. Further, the drain electrode of the first compensation transistor TT1 connected to the first gate line G1 is connected to the gate low voltage (VGL) line connected to the source electrode of the first compensation transistor TT1 during the touch period. Therefore, during the touch period, the gate-low voltage VGL is supplied to the pixel connected to the first gate line G1 and the noise of the gate signal is not transmitted to the pixel to which the first gate line G1 is connected. Therefore, the noise reduction unit 150 can reduce the noise generated during the touch period through the compensation transistors TT1 to TTn even after long driving.

The liquid crystal display 100 according to an exemplary embodiment of the present invention includes a noise reduction unit 150 including compensation transistors TT1 to TTn configured to reduce noise generated during a touch interval. The data driving circuit 130 applies a positive bias voltage during a touch interval and a negative bias voltage during a display period through a compensating transistor control (TCS) line connected to the compensating transistors TT1 to TTn. That is, the data driving circuit 130 supplies the compensating transistor control signal to the noise reduction section 150 so as to suppress the continuous positive shift of the threshold voltage Vth of the compensating transistors TT1 to TTn.

Thus, the threshold voltage Vth of the compensating transistors TT1 to TTn repeats the positive shift and the negative shift for one frame, and does not deteriorate significantly after the long-time driving. That is, even if the liquid crystal display device 100 is driven for a long time, the compensating transistors TT1 to TTn and the noise reduction unit 150 operate normally and the noise of the gate signal generated during the touch period is transmitted to the pixel array 110 .

Although the embodiments of the present invention have been described in detail with reference to the accompanying drawings, it is to be understood that the present invention is not limited to those embodiments and various changes and modifications may be made without departing from the scope of the present invention. . Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

100: display device
110: pixel array
120: Timing controller
130: Data driving circuit
139: Data line
140: Gate drive circuit
149: gate line
150: Noise Reduction Unit

Claims (14)

A liquid crystal display panel configured to be time-divisionally driven by a display period and a touch period in one frame and including a display area and a non-display area; And
And a data driving circuit configured to supply a data signal to the liquid crystal display panel,
In the liquid crystal display panel,
A data line in the display region, a gate line crossing the data line, and a pixel array in which pixels corresponding to the data line and the gate line are arranged;
A gate driving circuit arranged in a non-display area adjacent to the display area, the gate driving circuit including a stage connected to the gate line, and supplying a gate signal to the gate line; And
And a compensation transistor arranged between the pixel and the stage and configured to reduce noise generated during the touch interval,
And the data driving circuit is configured to supply, to the gate electrode of the compensating transistor, a compensating transistor control signal having a voltage lower than the gate-low voltage (VGL) during the display period. The method according to claim 1,
And the data driving circuit is configured to supply the compensating transistor control signal having the gate high voltage (VGH) during the touch period to the gate electrode of the compensating transistor. 3. The method of claim 2,
Wherein the data driving circuit is configured to supply the compensating transistor control signal to the gate electrode of the compensating transistor whose duty rate of the gate high voltage corresponds to the ratio of the touch period to the one frame, Display device. The method according to claim 1,
The compensation transistor includes:
A drain electrode connected to the gate line, and a source electrode connected to a gate low voltage (VGL) line. 5. The method of claim 4,
Wherein a value obtained by subtracting the voltage of the source electrode from the voltage of the gate electrode of the compensating transistor during the touch period is a positive value. 5. The method of claim 4,
Wherein a value obtained by subtracting the voltage of the source electrode from the voltage of the gate electrode of the compensating transistor during the display period is negative. A pixel including a driving transistor configured to be turned on during a display period and turned off during a touch period is driven by a plurality of data lines in a display region and a plurality of gate lines crossed A pixel array arranged corresponding to each of the regions;
A gate driving circuit arranged in a non-display area adjacent to the display area, configured to supply a gate signal for turning on the driving transistor to the plurality of gate lines in a time-division manner;
A data driving circuit configured to supply a data signal to the plurality of data lines; And
And a compensating transistor arranged between the pixel and the gate driving circuit and configured to reduce noise generated during the touch period,
Wherein the data driving circuit is configured to supply a compensation transistor control signal to the noise reduction unit, which can compensate for a positive shift of a threshold voltage of the compensation transistor. 8. The method of claim 7,
And the data driving circuit is configured to supply the compensating transistor control signal to the gate electrode of the compensating transistor. 9. The method of claim 8,
The data driving circuit supplies the compensation transistor control signal swinging between a control high voltage (TCH) and a control low voltage (TCL)
The control high voltage is a gate high voltage (VGH)
And the control low voltage is a predetermined voltage lower than the gate low voltage (VGL). 8. The method of claim 7,
And the compensating transistor control signal is configured to negatively shift the threshold voltage of the compensating transistor during the display period. 8. The method of claim 7,
And the compensating transistor control signal during the touch period is configured to positively shift the threshold voltage of the compensating transistor. 9. The method of claim 8,
Wherein the duty ratio of the compensating transistor control signal corresponding to the display period and the touch period,
And a voltage value between the gate electrode and the source electrode of the compensating transistor corresponding to the display period and a voltage value between the gate electrode and the source electrode of the compensating transistor corresponding to the touch period, Wherein the threshold voltage is determined so as to suppress the positive shift or the negative shift of the threshold voltage. 12. The method of claim 12,
The duty ratio of the compensating transistor control signal is set to a value
The positive shift or the negative shift is determined based on the threshold voltage positive shift speed of the compensating transistor corresponding to the touch period and the threshold voltage negative shift speed of the compensating transistor corresponding to the display period. 13. The method of claim 13,
The duty ratio of the compensating transistor control signal is set to a value
Wherein the threshold voltage is determined to swing within a range set so as to suppress the positive shift or the negative shift.

Images