KR102540315B1 - Liquid crystal display device - Google Patents

Abstract

A liquid crystal display device is provided. The liquid crystal display device includes a liquid crystal display panel that is time-division driven in a display period and a touch period, and includes a display area and a non-display area. The data driving circuit supplies data signals to the liquid crystal display panel. A liquid crystal display panel includes a pixel array in which a plurality of data lines and a plurality of gate lines intersect in a display area, pixels are disposed in each intersecting area, and a plurality of gate lines are disposed in a non-display area adjacent to the display area and connected to each of the plurality of gate lines. and a noise reduction unit including a gate driving circuit including a stage and supplying gate signals to a plurality of gate lines, and a compensation transistor disposed between the pixel and the stage and reducing noise generated during a touch period. The data driving circuit supplies a compensation transistor control signal having a voltage lower than the gate low voltage VGL to the gate electrode of the compensation transistor during the display period. In the liquid crystal display device according to an embodiment of the present invention, deterioration of a compensation transistor that reduces the effect of ripple of a gate signal during a touch period in a liquid crystal display device to which an in-cell touch screen panel is applied can be suppressed.

Description

Liquid crystal display device {LIQUID CRYSTAL DISPLAY DEVICE}

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of suppressing deterioration of a compensation transistor that reduces noise generated during a touch period.

Flat panel displays (FPDs) have been employed in various electronic devices such as mobile phones, tablets, notebook computers, televisions and monitors. Recently, FPDs include a liquid crystal display device (LCD) and an organic light emitting diode display (OLED). Such a display device includes a plurality of pixels, displays an image, includes a pixel array composed of a plurality of pixels, and a driving circuit that controls light to be transmitted or emitted from each of the plurality of pixels. The driving circuit of the display device includes a data driving circuit supplying data signals to data lines of the pixel array and sequentially supplying a gate signal (or scan signal) synchronized with the data signal to the gate lines (or scan lines) of the pixel array. and a timing controller controlling the gate driving circuit (or scan driving circuit) and the data driving circuit and the gate driving circuit.

Each of the plurality of pixels may include a thin film transistor that supplies a voltage of a data line to a pixel electrode in response to a gate signal supplied through a gate line. The gate signal swings between a gate high voltage (VGH) and a gate low voltage (VGL). That is, the gate signal appears in the form of a pulse. The gate high voltage (VGH) is set to a voltage higher than the threshold voltage of the thin film transistor formed in the display panel, and the gate low voltage (VGH) is set to a voltage lower than the threshold voltage of the thin film transistor. The thin film transistors of the pixels are turned on in response to the gate high voltage.

Recently, a liquid crystal display device equipped with a touch screen panel (TSP), which is a device that detects a user's touch input, has been widely used. The touch screen panel may be attached to an upper portion of the liquid crystal display in an on-cell manner. However, in the case of the on-cell type, the thickness of the liquid crystal display device is increased, and visibility of the liquid crystal display device is deteriorated due to the increased thickness. In order to solve this problem, an in-cell touch screen panel in which the touch screen panel is integrated into a liquid crystal display device has been developed.

The common electrode of the liquid crystal display to which the in-cell touch screen panel is applied may also be used as a touch electrode. Also, a common voltage line connected to the common electrode may be used as a touch signal line for receiving a touch signal. That is, the liquid crystal display to which the in-cell touch screen panel is applied performs time-division driving, so that the common electrode operates as a common electrode forming an electric field with the pixel electrode during the first time period and as a touch electrode during the second time period. It works. Accordingly, the liquid crystal display to which the in-cell touch screen panel is applied uses the first time period as a display period and uses the second time period as a touch period.

[Related technical literature]

1. Display device and its driving method (Korean Patent Publication No. 10-2015-0044318)

As described above, the inventors of the present invention have found that in a liquid crystal display to which an in-cell type touch screen panel is applied, noise of a gate signal generated during a touch period, for example, a ripple, affects a common voltage, thereby affecting a touch screen A problem causing malfunction of the panel was recognized.

Accordingly, a compensation transistor is used to solve the problem of the touch screen panel due to the ripple of the gate signal. Here, the compensation transistor reduces the effect of the ripple of the gate signal on the common voltage by quickly discharging the ripple of the gate signal generated during the touch period.

Such a compensation transistor also receives a positive bias temperature shift (PBTS) caused by a high voltage during a touch period, so that the compensation transistor is gradually deteriorated and the threshold voltage (Vth) of the compensation transistor is positively shifted. Furthermore, due to the continuous deterioration of the compensation transistor, ripple in the common voltage is not suppressed during the touch period, and malfunction of the touch screen panel is not suppressed.

Accordingly, there is a need for a liquid crystal display capable of reducing the problem caused by the deterioration of the compensation transistor in order to solve the problem caused by the above-described positive shift of the compensation transistor. A new method of a liquid crystal display device capable of improving the reliability of a compensation transistor that suppresses malfunction of a touch screen panel has been invented.

Accordingly, an object to be solved by the present invention is to provide a liquid crystal display capable of suppressing a positive shift of a compensation transistor during a touch period.

The tasks of the present invention are not limited to the tasks mentioned above, and other tasks not mentioned will be clearly understood by those skilled in the art from the following description.

A liquid crystal display according to an embodiment of the present invention is provided. The liquid crystal display device is configured to be time-division driven in a display period and a touch period in one frame, and includes a liquid crystal display panel including a display area and a non-display area. and a data driving circuit configured to supply data signals to the liquid crystal display panel. A liquid crystal display panel includes a data line in a display area, a gate line crossing the data line, a pixel array in which pixels corresponding to the data line and the gate line are arranged, and a stage arranged in a non-display area adjacent to the display area and connected to the gate line. and a noise reduction unit including a gate driving circuit for supplying a gate signal to a gate line, and a compensation transistor disposed between the pixel and the stage and configured to reduce noise generated during a touch period. The data driving circuit is configured to supply a compensation transistor control signal having a voltage lower than the gate low voltage VGL to the gate electrode of the compensation transistor during the display period. In the liquid crystal display device according to an embodiment of the present invention, deterioration of a compensation transistor that reduces the effect of ripple of a gate signal during a touch period in a liquid crystal display device to which an in-cell touch screen panel is applied can be suppressed.

The data driving circuit may be configured to supply a compensation transistor control signal having a gate high voltage (VGH) to a gate electrode of the compensation transistor during a touch period.

The data driving circuit may be configured to supply a compensation transistor control signal whose duty rate of the gate high voltage corresponds to a ratio of a touch period to one frame to a gate electrode of the compensation transistor.

The compensation transistor may include a drain electrode connected to the gate line and a source electrode connected to the gate low voltage (VGL) line.

A value obtained by subtracting the voltage of the source electrode from the voltage of the gate electrode of the compensation transistor during the touch period may be a positive number.

A value obtained by subtracting the voltage of the source electrode from the voltage of the gate electrode of the compensation transistor during the display period may be a negative number.

A liquid crystal display device according to another embodiment of the present invention is provided. In the liquid crystal display, a pixel including a driving transistor configured to be turned on during a display period and turned off during a touch period includes a plurality of data lines and a plurality of gates in a display area. and pixel arrays disposed corresponding to each of the regions where the lines intersect. The gate driving circuit is disposed in a non-display area adjacent to the display area, and is configured to time-divide supply a gate signal for turning on a driving transistor to a plurality of gate lines. The data driving circuit is configured to supply data signals to a plurality of data lines. The noise reducing unit includes a compensation transistor disposed between the pixel and the gate driving circuit and configured to reduce noise generated during a touch period. The data driving circuit is configured to supply a compensation transistor control signal capable of compensating for a positive shift in the threshold voltage of the compensation transistor to the noise reducer. In a liquid crystal display device according to another embodiment of the present invention, reliability of a compensation transistor that suppresses malfunction of the touch screen panel in a liquid crystal display device to which an in-cell touch screen panel is applied may be improved.

The data driving circuit may be configured to supply a compensation transistor control signal to a gate electrode of the compensation transistor.

The data driving circuit supplies a compensation transistor control signal that swings between a control high voltage (TCH) and a control low voltage (TCL), the control high voltage being the gate high voltage (VGH), and the control low voltage being the gate low voltage (VGL). ) may be a predetermined voltage lower than

During the display period, the compensation transistor control signal may be configured to negatively shift the threshold voltage of the compensation transistor.

During the touch period, the compensation transistor control signal may be configured to positively shift the threshold voltage of the compensation transistor.

The duty ratio of the compensation transistor control signal corresponding to the display period and the touch period is the voltage value between the gate electrode and the source electrode of the compensation transistor corresponding to the display period and the voltage between the gate electrode and the source electrode of the compensation transistor corresponding to the touch period. Based on the value, it may be determined to suppress a positive shift or a negative shift of the threshold voltage of the compensation transistor.

A duty ratio of the compensation transistor control signal may be determined to suppress a positive shift or a negative shift based on a positive shift rate of the threshold voltage of the compensation transistor corresponding to the touch period and a negative shift rate of the threshold voltage of the compensation transistor corresponding to the display period.

The duty ratio of the compensation transistor control signal may be determined such that the threshold voltage swings within a set range to suppress positive shift or negative shift.

Other embodiment specifics are included in the detailed description and drawings.

The present invention relates to a liquid crystal display including a data driving circuit for supplying a control signal to a compensation transistor for suppressing deterioration of a compensation transistor that reduces the influence of ripple of a gate signal during a touch period in a liquid crystal display device to which an in-cell type touch screen panel is applied. A display device can be manufactured.

Effects according to the present invention are not limited by the contents exemplified above, and more various effects are included in the present specification.

1 is a block diagram showing a driving circuit of a liquid crystal display according to an exemplary embodiment and a relationship between driving circuits.
2 is a block diagram showing the relationship between stages of a gate driving circuit, a noise reduction unit, and a control signal supplied thereto according to an embodiment of the present invention.
3 is a schematic circuit diagram illustrating a relationship between a pixel array, a gate driving circuit, and a noise reducer according to an exemplary embodiment of the present invention.
4 is a waveform diagram illustrating a signal supplied to a compensation transistor according to a comparative example.
5 is a graph showing a threshold voltage of a compensation transistor versus time according to a comparative example.
6 is a waveform diagram illustrating a signal supplied to a compensation transistor according to an embodiment of the present invention.
7 is a graph showing a threshold voltage of a compensation transistor versus time according to an embodiment of the present invention.

Advantages and features of the present invention, and methods of achieving them, will become clear with reference to the detailed description of the following embodiments taken in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, only these embodiments make the disclosure of the present invention complete, and common knowledge in the art to which the present invention belongs. It is provided to fully inform the holder of the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are illustrative, so the present invention is not limited to the details shown. In addition, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the subject matter of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in this specification is used, other parts may be added unless 'only' is used. In the case where a component is expressed in the singular, the case including the plural is included unless otherwise explicitly stated.

In interpreting the components, even if there is no separate explicit description, it is interpreted as including the error range.

In the case of a description of a positional relationship, for example, 'on top of', 'on top of', 'at the bottom of', 'next to', etc. Or, unless 'directly' is used, one or more other parts may be located between the two parts.

When an element or layer is referred to as (on) another element or layer, it includes all cases where another element or layer is directly on top of another element or another layer or another element is interposed therebetween.

Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from another. Therefore, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Like reference numbers designate like elements throughout the specification.

The size and thickness of each component shown in the drawings are shown for convenience of description, and the present invention is not necessarily limited to the size and thickness of the illustrated components.

Each feature of the various embodiments of the present invention can be partially or entirely combined or combined with each other, and as those skilled in the art can fully understand, various interlocking and driving operations are possible, and each embodiment can be implemented independently of each other. It may be possible to implement together in an association relationship.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram illustrating a driving circuit of a display device according to an exemplary embodiment and a relationship between driving circuits. Referring to FIG. 1 , the liquid crystal display device 100 includes a liquid crystal display panel (PNL) and a driving circuit for inputting data of an input image to a pixel array 110 of the liquid crystal display panel (PNL). . The liquid crystal display device 100 is a liquid crystal display device to which an in-cell type touch screen panel is applied, and a common electrode Ec of a pixel is used as a touch electrode of the touch screen panel. Hereinafter, the liquid crystal display device 100 to which the in-cell type touch screen panel is applied will be described as a standard.

Referring to FIG. 1 , the liquid crystal display panel PNL includes a plurality of data lines 139, a plurality of gate lines 149 orthogonal to the plurality of data lines 139, and a plurality of data lines 150 and a plurality of gate lines. It includes a pixel array 110 in which pixels are arranged in a matrix form defined by the gate line 149 . A driving transistor TFT for driving each pixel is disposed in each pixel of the pixel array 110, and the driving transistor TFT includes a gate electrode to which a gate signal is input through a gate line 149 and a data line 139. It includes a source electrode to which the data signal is input and a drain electrode connected to the pixel electrode Ep. In such a pixel, the driving transistor TFT is turned on during a display period and turned off during a touch period in one frame.

Referring to FIG. 1 , the driving circuit of the liquid crystal display device 100 includes a data driving circuit 130 supplying data voltages to a plurality of data lines 139 and a plurality of gate lines 149 supplying gate signals synchronized with the data voltages. It includes a gate driving circuit 140 and a timing controller (TCON) 120 that sequentially supplies to ).

The timing controller 120 transmits data of an input image received from an external host system to the data driving circuit 130 and the gate driving circuit 140 . The timing controller 120 receives timing signals such as a vertical sync signal, a horizontal sync signal, a data enable signal, and a dot clock synchronized with an input image from an external host system. The timing controller 120 generates various control signals for controlling operation timings of the data driving circuit 130 and the gate driving circuit 140 based on the input timing signal. That is, the timing controller 120 generates a data driver control signal (DDC) to control the data driving circuit 130 and a gate driver control signal (Gate) to control the gate driving circuit 140. Generates Driver Control signal (GDC). The timing controller 120 may be disposed outside the liquid crystal display panel PNL. Specifically, the timing controller 120 may be disposed on a printed circuit board. Accordingly, the timing controller 120 transmits the data driver control signal DDC to the data driving circuit 130 and transmits the gate driver control signal GDC to the gate driver from the outside of the liquid crystal display panel PNL. However, it is not limited thereto, and the timing controller 120 may be disposed inside the liquid crystal display panel PNL. Also, the timing controller 120 may be integrated with the data driving circuit 130 .

The data driving circuit 130 receives data of an input image and a data driver control signal DDC from the timing controller 120 . The data driving circuit 130 converts data of an input image into a gamma compensation voltage according to the data driver control signal DDC transmitted from the timing controller 120 to generate a data voltage, and converts the data voltage into a plurality of data lines 139 . ) is output as The data driving circuit 130 includes a plurality of source electrode driver integrated circuits (ICs). The source electrode drive IC is connected to the plurality of data lines 139 by a COG (Chip On Glass) process or a TAB (Tape Automated Bonding) process.

Also, the data driving circuit 130 may supply various control signals to the liquid crystal display panel PNL. For example, the data driving circuit 130 may generate and supply the gate low voltage VGL and the gate high voltage VGH to the liquid crystal display panel PNL.

The gate driving circuit 140 may be implemented as a gate in panel (GIP) circuit. The gate driving circuit 140 receives a signal transmitted from the level shifter, drives the GIP circuit, and supplies the gate signal to the gate line 149. Here, the level shifter may be physically separated from the GIP circuit and disposed outside the liquid crystal display panel PNL, and may be disposed on an external circuit unit (eg, a printed circuit board) connected to the liquid crystal display panel PNL. . However, it is not limited thereto, and the level shifter may be integrated with the gate driving circuit 140 . 1 shows that the gate driving circuit 140 is disposed on only one side of the liquid crystal display panel PNL, but may be disposed on both sides of the liquid crystal display panel PNL according to embodiments, and the gate driving circuit 140 The position of the liquid crystal display panel PNL is not limited thereto. Hereinafter, the gate driving circuit 140 will be described based on being a GIP circuit.

The voltage level of the gate driver control signal GDC transmitted from the timing controller 120 is converted by the level shifter and then input to the GIP circuit. Since a signal input to the level shifter is a digital signal, thin film transistors of the liquid crystal display panel PNL cannot be driven. Accordingly, the level shifter shifts the voltage of each gate driver control signal (GDC) transmitted from the timing controller 120 to obtain a signal having a voltage swinging between the gate low voltage (VGL) and the gate high voltage (VGH). convert to The gate high voltage VGH is set to a voltage higher than the threshold voltage of the thin film transistor formed in the liquid crystal display panel PNL, and the gate low voltage VGL is set to a voltage lower than the threshold voltage of the thin film transistor. In this way, the signal converted by the level shifter is time-divided through the GIP circuit and supplied to each gate line.

Referring to FIG. 1 , the liquid crystal display device 100 further includes a noise reducing unit 150 disposed between the pixel array 110 and the gate driving circuit 140 .

The noise reduction unit 150 is configured to reduce an effect of gate signal noise generated during the touch period on the common voltage. The noise reduction unit 150 receives the gate signal output from the gate driving circuit 140, reduces noise such as ripple of the gate signal, and supplies the reduced noise to the pixel array 110. Accordingly, the noise reduction unit 150 may reduce noise of the common voltage by reducing noise generated during a touch period of a pixel of the pixel array 110 .

In particular, the noise reducer 150 may be driven by receiving a control signal from the data driving circuit 130 . Waveforms and characteristics of specific control signals received from the data driving circuit 130 will be described later with reference to FIGS. 6 and 7 .

A liquid crystal display device 100 according to an exemplary embodiment of the present invention includes a timing controller 120 for driving a pixel array 110, a data driving circuit 130, a gate driving circuit 140, and a noise reduction unit 150. includes Here, since the noise reduction unit 150 reduces noise in the gate signal input during the touch period, noise of the common voltage caused by noise included in the gate signal is reduced. Accordingly, malfunction of the touch screen panel due to noise of the common voltage is also reduced. A detailed configuration of the noise reduction unit 150 will be described later with reference to FIGS. 2 and 3 .

2 is a block diagram showing the relationship between stages of a gate driving circuit, a noise reduction unit, and a control signal supplied thereto according to an embodiment of the present invention. 3 is a schematic circuit diagram illustrating a relationship between a pixel array, a gate driving circuit, and a noise reducer according to an exemplary embodiment of the present invention.

Referring to FIGS. 2 and 3 , the gate driving circuit 140 is spaced apart from the pixel array 110 and disposed on one side of the pixel array 110 . The gate driving circuit 140 includes a plurality of stages. Each stage may consist of a shift register. Specifically, the gate driving circuit 140 disposed on the left side of the pixel array 110 includes a plurality of stages ST1 to STn that are cascadedly connected. Further, each of the stages ST1 to STn includes pull-up transistors PU1 to PUn including a gate electrode connected to a Q node and a gate electrode connected to a QB node and a gate low voltage (VGL) line. and pull-down transistors PD1 to PDn including source electrodes. Here, the stages ST1 to STn output an output of one of the pull-up transistors PU1 to PUn and the pull-down transistors PD1 to PDn as a gate signal.

The first carry signal Gout_Pre input to the k th stage STk excluding the first stage ST1 is the output Gout of the k−1 th stage STk−1, and the first carry signal Gout_Pre input to the k th stage STk excluding the last stage STn. The second carry signal Gout_Post input to the k stage STk is the output Gout of the k+1th stage STk+1. In the first stage ST1, the first carry signal Gout_Pre is not input and the start pulse VST is input. In the last stage STn, the second carry signal Gout_Post is not input and a reset pulse is input from a dummy stage (End Generator; EG). Here, n is the number of gate lines, and k is an arbitrary integer between 1 and n. For example, n may be 1920.

Specifically, the stages ST1 to STn of the gate driving circuit 140 start to output gate signals in response to the start pulse VST. The gate signal output from each of the stages ST1 to STn is supplied to the gate lines G1 to Gn and is input to the next stage as the first carry signal Gout_Pre.

The gate driving circuit 140 receives the gate driver control signal GDC and outputs a voltage. That is, the gate driving circuit 140 sequentially supplies the gate signal generated by the level shifter to the gate lines G1 to Gn through the plurality of stages ST1 to STn by the gate driver control signal GDC. Here, the gate driver control signal GDC includes a gate start pulse (GSP) (VST) and a gate shift clock (GSC) (CLK). Accordingly, the gate driving circuit 140 sequentially supplies gate signals to the gate lines G1, G2, ..., Gn.

The gate driving circuit 140 includes a dummy stage EG that supplies the second carry signal Gout_Post to the previous stage without generating an output. That is, the gate driving circuit 140 includes a dummy stage EG as a stage following the last stage STn. That is, the dummy stage EG is connected to the last stage STn outputting the last gate signal, and the dummy stage EG supplies the second carry signal Gout_Post to the last stage STn without outputting a gate signal. do.

In addition, the shift clock CLK is input to the stages ST1 to STn of the gate driving circuit 140 . The shift clock CLK controls timing at which the first carry signal Gout_Pre and the second carry signal Gout_Post are input to the gate driving circuit 140 .

Referring to FIGS. 2 and 3 , the noise reducer 150 includes compensation transistors TT1 to TTn connected to gate lines G1 to Gn, respectively. Specifically, each of the compensation transistors TT1 to TTn includes a gate electrode connected to each of the compensation transistor control (Tail TFT Control Signal; TCS) lines, a drain electrode connected to each of the gate lines G1 to Gn, and a gate low voltage (VGL) line. It includes a source electrode connected to. Accordingly, the noise reduction unit 150 has compensation transistors TT1 to TTn equal to the number of gate lines G1 to Gn.

Here, the noise reducer 150 is turned off during the display period and transfers the gate signals supplied to the gate lines G1 to Gn in the stages ST1 to STn to the pixel array 110 as they are. On the other hand, the noise reducer 150 is turned on during the touch period, and the gate low voltage VGL is supplied to the drain electrodes connected to the gate lines G1 to Gn. Accordingly, since only the gate low voltage VGL is transmitted to the pixel array 110 through the gate lines G1 to Gn during the touch period, the stage (which is transmitted to the pixel array 110 through the gate lines G1 to Gn) Noise (eg, ripple) of the gate signal generated in ST1 to STn is reduced. That is, during the touch period, the compensation transistors TT1 to TTn of the noise reduction unit 150 are activated to reduce noise transmitted to the pixel array 110 .

A liquid crystal display device 100 to which an in-cell touch screen panel is applied according to an embodiment of the present invention includes a noise reduction unit 150 disposed between a pixel array 110 and a gate driving circuit 140. . The compensation transistors TT1 to TTn of the noise reducer 150 are turned off during the display period to transfer the gate signal generated by the gate driving circuit 140 to the pixel array 110 . On the other hand, the compensation transistors TT1 to TTn of the noise reducer 150 are turned on during the touch period to supply the gate low voltage VGL to the pixel array 110, and the gate driving circuit 140 during the touch period Gate signal noise that may occur is suppressed from being transferred to the pixel array 110 . Accordingly, the noise reduction unit 150 reduces noise transmitted to the pixel array 110 .

As such, the noise reduction unit 150 can reduce the noise of the gate signal transmitted to the pixel array 110 during the touch period by the operation of the compensation transistors TT1 to TTn. Maintaining device characteristics of (eg, threshold voltage characteristics) is an important factor in reducing noise of a gate signal transmitted to the pixel array 110 during a touch period. Specifically, the threshold voltage (Vth) of the compensation transistors (TT1 to TTn) is degraded by the bias of the voltage (Vgs) between the gate electrode (G) and the source electrode (S). When the voltage (Vgs) between the gate electrode (G) and the source electrode (S) is positive, the threshold voltage (Vth) of the compensation transistors (TT1 to TTn) is positively shifted, and the voltage between the gate electrode (G) and the source electrode (S) is When the voltage Vgs is a negative number, the threshold voltages Vth of the compensation transistors TT1 to TTn are negatively shifted. Accordingly, when the threshold voltages Vth of the transistors TT1 to TTn shift for a long time, the characteristics of the transistors TT1 to TTn are deteriorated. Accordingly, the voltage Vgs between the gate electrode G and the source electrode S of the compensation transistors TT1 to TTn affects the efficiency of suppressing noise of the gate signal transmitted to the pixel array 110 during the touch period. can give

Accordingly, the data driving circuit 130 supplies a compensation transistor control signal to the noise reducer 150 through a compensation transistor control (TCS) line to suppress a positive shift in the threshold voltages Vth of the compensation transistors TT1 to TTn. do. For the compensation transistor control signals supplied to the compensation transistors TT1 to TTn of the noise reduction unit 150 and the resulting change in threshold voltage (Vth) characteristics of the compensation transistors TT1 to TTn, see FIGS. 4 to 7 below. Thus, a comparative example and an embodiment of the present invention will be compared and described below.

4 is a waveform diagram illustrating a signal supplied to a compensation transistor according to a comparative example. 5 is a graph showing a threshold voltage of a compensation transistor versus time according to a comparative example. 4 and 5 are disposed between pixels disposed in an area where the first stage ST1, the first data line D1, and the first gate line G1 intersect in the liquid crystal display 100 of FIG. 3. These are waveform diagrams and graphs according to the Comparative Example shown based on the noise reducer 150 and the first compensation transistor TT1. For convenience of explanation, it will be described later with reference to FIG. 3 .

Referring to FIG. 4 , one frame includes a display period of 10.7 msec and a touch period of 6 msec. That is, one frame is 16.7 msec, and the liquid crystal display device 100 is driven at 60 Hz.

3 and 4, the gate electrode G of the first compensation transistor TT1 has a gate swinging between the gate high voltage VGH and the gate low voltage VGL through the compensation transistor control (TCS) line. A voltage VG is applied. Specifically, the gate low voltage VGL is applied to the gate electrode G of the first compensation transistor TT1 through the compensation transistor control (TCS) line during the display period, and the compensation transistor control (TCS) line is applied during the touch period. Through this, the gate high voltage VGH is applied to the gate electrode G of the first compensation transistor TT1.

Referring to FIGS. 3 and 4 , the gate low voltage VGL is applied to the source electrode S of the first compensation transistor TT1. That is, since the source electrode S of the first compensation transistor TT1 is directly connected to the gate low voltage VGL line, the source electrode S of the first compensation transistor TT1 is continuously connected during the display period and the touch period. A gate low voltage VGL is applied.

Referring to FIGS. 3 and 4 , the gate signal supplied to the first gate line G1 is applied to the drain electrode of the first compensation transistor TT1. Specifically, during the display period, the gate low voltage VGL is applied to the drain electrode D of the first compensation transistor TT1 to turn off the first compensation transistor TT1. The drain electrode D of the first compensation transistor TT1 is connected to the output voltage node of the first stage ST1 through the first gate line G1. Accordingly, the gate signal supplied to the first gate line G1 is applied to the drain electrode D of the first compensation transistor TT1 as it is during the display period. Meanwhile, during the touch period, the gate high voltage VGH is applied to the gate electrode G of the first compensation transistor TT1 so that the first compensation transistor TT1 is turned on. When the first compensation transistor TT1 is turned on, the drain electrode D of the first compensation transistor TT1 is connected to the source electrode S through a channel. Accordingly, the gate low voltage VGL connected to the source electrode S is applied to the drain electrode D of the first compensation transistor TT1 as it is during the touch period.

Referring to FIGS. 3 and 4 , the voltage Vgs between the gate electrode G and the source electrode S of the first compensation transistor TT1 ranges from 0V to a gate high voltage VGH to a gate low voltage VGL. Swings between voltages minus Specifically, the voltage Vgs between the gate electrode G and the source electrode S of the first compensation transistor TT1 during the display period is 0V, and the gate electrode G of the first compensation transistor TT1 during the touch period ) and the source electrode S is the voltage obtained by subtracting the gate low voltage VGL from the gate high voltage VGH. For example, when the gate high voltage (VGH) is 14V and the gate low voltage (VGL) is -12V, the voltage between the gate electrode (G) and the source electrode (S) of the first compensation transistor (TT1) during the touch period is The voltage (Vgs) is 26V.

Accordingly, only 0V is applied to the first compensation transistor TT1 between the gate electrode G and the source electrode S during the display period, and always positive between the gate electrode G and the source electrode S during the touch period. Only a positive voltage is applied. That is, in the first compensation transistor TT1, the voltage Vgs between the gate electrode G and the source electrode S is always greater than or equal to 0V during one frame. In other words, only the positive bias voltage is continuously applied to the first compensation transistor TT1. In this way, when only the positive bias voltage is applied to the first compensation transistor TT1, the threshold voltage Vth of the first compensation transistor TT1 also undergoes only a positive shift.

4 and 5, as only a positive bias voltage is applied to the first compensation transistor TT1, the threshold voltage Vth of the first compensation transistor TT1 continuously shifts positively over time. . Accordingly, after a long time passes, the threshold voltage (Vth) of the first compensation transistor (TT1) becomes equal to the voltage (Vgs) between the gate electrode (G) and the source electrode (S) of the first compensation transistor (TT1). . For example, when 10 hours have elapsed since the liquid crystal display 100 was driven, the threshold voltage Vth of the first compensation transistor TT1 is increased between the gate electrode G and the source electrode S of the first compensation transistor TT1. ) converges to 26V, which is the maximum value of the voltage (Vgs) between

Here, when the threshold voltage (Vth) of the first compensation transistor (TT1) is equal to the voltage (Vgs) between the gate electrode (G) and the source electrode (S) of the first compensation transistor (TT1), the first compensation transistor (TT1) also in the touch period Compensation transistor TT1 is not turned on. That is, the first compensation transistor TT1 continues to be turned off. When the first compensation transistor TT1 is in a turn-off state, the first compensation transistor TT1 transfers the gate signal to the pixel as it is through the drain electrode D even in the touch period as in the display period.

Accordingly, when the threshold voltage (Vth) of the first compensation transistor (TT1) becomes equal to the voltage (Vgs) between the gate electrode (G) and the source electrode (S) of the first compensation transistor (TT1), the first compensation transistor (TT1) Since (TT1) is always turned off, the noise of the gate signal is transferred to the pixel as it is during the touch period.

Accordingly, as the first compensation transistor TT1 according to the comparative example deteriorates, the first compensation transistor TT1 does not operate during the touch period, and the noise reduction unit 150 removes the noise of the gate signal as it is from the pixel array 110. ) and does not play a role in reducing noise.

6 is a waveform diagram illustrating a signal supplied to a compensation transistor according to an embodiment of the present invention. 7 is a graph showing a threshold voltage of a compensation transistor versus time according to an embodiment of the present invention. 6 and 7 show the liquid crystal display 100 of FIG. 3 disposed between pixels disposed in an area where the first stage ST1, the first data line D1, and the first gate line G1 intersect. It is a waveform diagram and a graph according to an embodiment of the present invention shown based on the noise reducer 150 and the first compensation transistor TT1. The waveform diagram shown in FIG. 6 is different from the waveform diagram shown in FIG. 4 in that the gate voltage VG of the first compensation transistor TT1 and the voltage Vgs between the gate electrode G and the source electrode S are different. However, since the substantive configuration of the rest of the waveform diagram is the same, redundant description is omitted. For convenience of explanation, it will be described later with reference to FIGS. 1 and 3 .

Referring to FIGS. 3 and 6 , a compensation transistor control signal is applied to the gate electrode G of the first compensation transistor TT1 through a compensation transistor control (TCS) line. In other words, the data driving circuit 130 supplies the compensation transistor control signal to the gate electrode G of the first compensation transistor TT1. Specifically, the compensation transistor control signal has a control low voltage TCL during the display period and a control high voltage TCH during the touch period. That is, the compensation transistor control signal swings between the control high voltage TCH and the control low voltage TCL. Here, the control high voltage TCH may be the gate high voltage VGH. The control low voltage TCL is a voltage lower than the gate low voltage VGL. For example, the control high voltage TCH is 14V and the control low voltage TCL is -20V.

Accordingly, the data driving circuit 130 has a control low voltage (TCL) lower than the gate low voltage (VGL) during the display period through the compensation transistor control (TCS) line and controls the same as the gate high voltage (VGH) during the touch period. A compensation transistor control signal having a high voltage TCH is supplied to the noise reducer 150 .

Referring to FIGS. 3 and 6 , the voltage Vgs between the gate electrode and the source electrode of the first compensation transistor TT1 is the control high voltage (Vgs) obtained by subtracting the gate low voltage (VGL) from the control low voltage (TCL). TCH) minus the gate low voltage (VGL). Since the control low voltage TCL is lower than the gate low voltage VGL during the display period, the voltage Vgs between the gate electrode and the source electrode of the first compensation transistor TT1 is less than 0V during the display period.

When the control high voltage TCH is the gate high voltage VGH during the touch period, the voltage Vgs between the gate electrode G and the source electrode S of the first compensation transistor TT1 is the gate high voltage VGH. ) minus the gate low voltage (VGL). Also, the voltage Vgs between the gate electrode G and the source electrode S of the first compensation transistor TT1 during the display period is a voltage obtained by subtracting the gate low voltage VGL from the control low voltage TCL. For example, when the control high voltage (TCH) and the gate high voltage (VGH) are 14V, the control low voltage (TCL) is -20V, and the gate low voltage (VGL) is -12V, the first compensation during the touch period The voltage Vgs between the gate electrode G and the source electrode S of the transistor TT1 is 26V, and the voltage Vgs between the gate electrode G and the source electrode S of the first compensation transistor TT1 is 26V during the display period. The voltage (Vgs) is -8V.

Referring to FIG. 6 , one frame includes a display period of 10.7 msec and a touch period of 6 msec. That is, one frame is 16.7 msec, and the liquid crystal display device 100 is driven at 60 Hz. The voltage (Vgs) between the gate electrode and the source electrode of the first compensation transistor TT1 in each of the display period and touch period and the duty rate of the touch period in the compensation transistor control signal are as follows [Table 1]. .

display section touch section Vgs(V) -20-(-12)=-8 14-(-12)=26 Duty ratio (%) (10.7/16.7)*100=64 (6/16.7)*100=36

Accordingly, the voltage Vgs between the gate electrode and the source electrode of the first compensation transistor TT1 during the touch period is 26V, and the duty ratio of the control high voltage TCH in the compensation transistor control signal is about 36%.

Here, the Vgs duty ratio may be set to correspond to the display period and the touch period based on one frame. That is, the Vgs duty ratio may be set to have a negative bias corresponding to the display period and a positive bias corresponding to the touch period. For example, the Vgs duty ratio is about 36% in one frame based on the positive bias, which is set equal to the ratio of the touch period in one frame. To this end, the compensation transistor control signal may be set to have a control low voltage TCL during the display period and a control high voltage TCH during the touch period.

In addition, in order to compensate for the shift of the threshold voltage Vth of the first compensation transistor TT1, the Vgs duty ratio is a positive shift of the threshold voltage Vth of the compensation transistor based on Vgs of the display period and Vgs of the touch period, or It can be determined to suppress the negative shift.

Specifically, the speed at which the threshold voltage Vth of the compensation transistor shifts may be adjusted according to the voltage value of Vgs of the display period or Vgs of the touch period. For example, when Vgs of the touch period is -12V lower than -8V, the negative shift may proceed faster during the same time period. Conversely, when the Vgs of the display period is 30V higher than 26V, the positive shift can proceed faster during the same time period.

That is, since the degree of shift of the threshold voltage (Vth) of the compensation transistor can be adjusted according to the magnitude of the voltage of Vgs and the time at which the voltage is applied, the duty ratio of Vgs is adjusted in consideration of Vgs of the display period and Vgs of the touch period. can Accordingly, the duty ratio of the compensation transistor control signal may be determined such that the threshold voltage Vth of the compensation transistor swings within a range set to suppress a positive shift or a negative shift.

6 and 7, the voltage Vgs between the gate electrode and the source electrode of the first compensation transistor TT1 during the touch period has a positive voltage, and the gate of the first compensation transistor TT1 during the display period. The voltage (Vgs) between the electrode and the source electrode has a negative voltage. That is, a positive bias voltage is applied to the first compensation transistor TT1 during the touch period, and a negative bias voltage is applied during the display period.

Referring to FIGS. 6 and 7 , as a negative bias voltage is applied to the first compensation transistor TT1 during the display period, the threshold voltage Vth of the first compensation transistor TT1 is negatively shifted. Also, as the positive bias voltage is applied to the first compensation transistor TT1 during the touch period, the threshold voltage Vth of the first compensation transistor TT1 shifts positively. That is, during the display period, the compensation transistor control signal negatively shifts the threshold voltage Vth of the first compensation transistor TT1, and during the touch period, the compensation transistor control signal shifts the threshold voltage Vth of the first compensation transistor TT1. positive shift.

As such, as the negative bias voltage and the positive bias voltage are differently applied to each display period and touch period in one frame, the threshold voltage Vth of the first compensation transistor TT1 also repeats a negative shift and a positive shift. . Accordingly, the threshold voltage Vth of the first compensation transistor TT1 does not greatly deteriorate even after the liquid crystal display 100 is driven for a long time because only one of the positive shift and the negative shift is continued by the compensation transistor control signal.

Accordingly, the first compensation transistor TT1 is turned on during the touch period and turned off during the display period for a long time. Furthermore, during the touch period, the drain electrode of the first compensation transistor TT1 connected to the first gate line G1 is connected to the gate low voltage VGL line connected to the source electrode of the first compensation transistor TT1. Therefore, during the touch period, the gate low voltage VGL is supplied to the pixel to which the first gate line G1 is connected, and noise of the gate signal is not transmitted to the pixel to which the first gate line G1 is connected. Therefore, the noise reduction unit 150 can reduce noise generated during the touch period through the compensation transistors TT1 to TTn even after driving for a long time.

The liquid crystal display device 100 according to an embodiment of the present invention includes a noise reducing unit 150 including compensation transistors TT1 to TTn configured to reduce noise generated during a touch period. In addition, the data driving circuit 130 applies a positive bias voltage during the touch period and a negative bias voltage during the display period through compensation transistor control (TCS) lines connected to the compensation transistors TT1 to TTn. That is, the data driving circuit 130 supplies a compensation transistor control signal to the noise reducer 150 to suppress continuous positive shifts in the threshold voltages Vth of the compensation transistors TT1 to TTn.

Accordingly, the threshold voltages (Vth) of the compensation transistors TT1 to TTn repeat a positive shift and a negative shift during one frame, and are not greatly deteriorated even after driving for a long time. That is, even if the liquid crystal display device 100 is driven for a long time, the compensation transistors TT1 to TTn and the noise reduction unit 150 operate normally, so that noise of the gate signal generated during the touch period is transmitted to the pixel array 110. can suppress.

Although the embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and may be variously modified and implemented without departing from the technical spirit of the present invention. . Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but to explain, and the scope of the technical idea of the present invention is not limited by these embodiments. The protection scope of the present invention should be construed according to the claims below, and all technical ideas within the equivalent range should be construed as being included in the scope of the present invention.

100: display device
110: pixel array
120: timing controller
130: data driving circuit
139: data line
140: gate driving circuit
149: gate line
150: noise reduction unit

Claims (14)

a liquid crystal display panel configured to be time-division driven in a display period and a touch period in one frame, and including a display area and a non-display area; and
a data driving circuit configured to supply data signals to the liquid crystal display panel;
The liquid crystal display panel,
a pixel array including a data line in the display area, a gate line crossing the data line, and a pixel corresponding to the data line and the gate line;
a gate driving circuit disposed in a non-display area adjacent to the display area, including a stage connected to the gate line, and supplying a gate signal to the gate line; and
a noise reduction unit including a compensation transistor disposed between the pixel and the stage and configured to reduce noise generated during the touch period;
The compensation transistor,
a drain electrode connected to the gate line and a source electrode connected to a gate low voltage (VGL) line;
During the display period, a control low voltage is applied to the gate electrode to turn off, and during the touch period, a control high voltage is applied to the gate electrode to turn on;
Wherein the data driving circuit is configured to supply the control low voltage having a voltage lower than the gate low voltage (VGL) to the gate electrode of the compensation transistor as a compensation transistor control signal during the display period. According to claim 1,
Wherein the data driving circuit is configured to supply the control high voltage having a gate high voltage (VGH) as the compensation transistor control signal to the gate electrode of the compensation transistor during the touch period. According to claim 2,
The data driving circuit is configured to supply the compensation transistor control signal, wherein the duty rate of the gate high voltage corresponds to the ratio of the touch period to the one frame, to the gate electrode of the compensation transistor. display device. delete According to claim 1,
A value obtained by subtracting the voltage of the source electrode from the voltage of the gate electrode of the compensation transistor during the touch period is a positive number. According to claim 1,
A value obtained by subtracting the voltage of the source electrode from the voltage of the gate electrode of the compensation transistor during the display period is a negative number. A pixel including a driving transistor configured to be turned on during the display period and turned off during the touch period is configured to cross a plurality of data lines and a plurality of gate lines in the display area. a pixel array arranged to correspond to each area;
a gate driving circuit disposed in a non-display area adjacent to the display area and configured to time-divide supply a gate signal for turning on the driving transistor to the plurality of gate lines;
a data driving circuit configured to supply data signals to the plurality of data lines; and
A noise reduction unit including a compensation transistor disposed between the pixel and the gate driving circuit and configured to reduce noise generated during the touch period;
The data driving circuit is configured to supply a compensation transistor control signal capable of compensating for a positive shift of a threshold voltage of the compensation transistor to the noise reducer,
The compensation transistor,
a drain electrode connected to the gate line and a source electrode connected to a gate low voltage (VGL) line;
During the display period, the control low voltage is applied to the gate electrode as the compensation transistor control signal to be turned off, and during the touch period, the control high voltage is applied to the gate electrode as the compensation transistor control signal to turn on. display device. According to claim 7,
wherein the data driving circuit is configured to supply the compensation transistor control signal to a gate electrode of the compensation transistor. According to claim 8,
the data driving circuit supplies the compensation transistor control signal that swings between the control high voltage and the control low voltage;
The control high voltage is a gate high voltage (VGH),
The control low voltage is a predetermined voltage lower than the gate low voltage (VGL). According to claim 7,
The liquid crystal display device of claim 1 , wherein the compensation transistor control signal causes a threshold voltage of the compensation transistor to be negatively shifted during the display period. According to claim 7,
The liquid crystal display device of claim 1 , wherein the compensation transistor control signal is configured to positively shift a threshold voltage of the compensation transistor during the touch period. According to claim 8,
The duty ratio of the compensation transistor control signal corresponding to the display period and the touch period,
Based on a voltage value between the gate electrode and the source electrode of the compensation transistor corresponding to the display period and a voltage value between the gate electrode and the source electrode of the compensation transistor corresponding to the touch period, The liquid crystal display device determined to suppress the positive shift or the negative shift of the threshold voltage. According to claim 12,
The duty ratio of the compensation transistor control signal is
It is determined to suppress the positive shift or negative shift based on a threshold voltage positive shift rate of the compensation transistor corresponding to the touch period and a threshold voltage negative shift rate of the compensation transistor corresponding to the display period. According to claim 13,
The duty ratio of the compensation transistor control signal is
wherein the threshold voltage is determined to swing within a range set to suppress the positive shift or the negative shift.

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