KR20160121837A - Light emitting device and lighting system - Google Patents

Abstract

The embodiments of the present invention relate to a light emitting element having desirable ESD characteristics and desirable efficiency of internal light emission, a method for manufacturing the light emitting element, a light emitting element package, and a lighting system. The light emitting element according to an embodiment of the present invention may comprise: a first semiconductor layer (112) of a first conductivity type; an active layer (114) which is disposed on the first semiconductor layer (112) of the first conductivity type; a second semiconductor layer (115) of a second conductivity type which has a predetermined slope, and is disposed on the active layer (114); an insulation layer (130) which is disposed on the slope of the second semiconductor layer (115) of the second conductivity type; and a third semiconductor layer (116) of the second conductivity type which is disposed on the insulation layer (130) and the second semiconductor layer (115) of the second conductivity type.

Description

[0001] LIGHT EMITTING DEVICE AND LIGHTING SYSTEM [0002]

Embodiments relate to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and an illumination system.

Light emitting diodes (LEDs) can be produced by combining p-n junction diodes with the characteristics that electrical energy is converted into light energy by elements of Groups III and V on the periodic table. LEDs can be implemented in various colors by controlling the composition ratio of compound semiconductors.

When a forward voltage is applied to the light emitting device, electrons in the n-layer and holes in the p-layer are coupled to emit energy corresponding to the energy gap between the conduction band and the valance band. This energy is emitted in the form of heat or light, and when emitted in the form of light, becomes a light emitting element.

For example, nitride semiconductors have received great interest in the development of optical devices and high power electronic devices due to their high thermal stability and wide bandgap energy. Particularly, blue light emitting devices, green light emitting devices, ultraviolet (UV) light emitting devices, and the like using nitride semiconductors have been commercialized and widely used.

In the light emitting device according to the related art, the active layer, which is a light emitting layer, is formed by repeatedly laminating a quantum well having a small energy band gap and a quantum wall having a large energy band gap and electrons injected from the n layer and holes injected from the p- And emits light.

Meanwhile, according to the prior art, a V-pit structure is adopted in the Epi layer in order to prevent ESD (Electrostatic Discharge) or to reduce the stress of the epi layer (Epi layer stress).

However, in such a conventional technique, a V-pit is formed in a superlattice layer in which a V-pit is disposed below an active layer, and V-pits are transferred to an active layer, which is a substantial luminescent region. Or the V-pit is formed from the active layer, there is a problem that the area of the active layer capable of substantially emitting light is reduced and the luminous efficiency is lowered.

Also, in the prior art, there is a problem in that the V-pit is transferred to the active layer or is formed from the active layer itself, so that the distribution of the Epi layer, which affects the V-pit, is widened, .

Embodiments provide a light emitting device having excellent ESD characteristics and excellent internal light emitting efficiency, a method of manufacturing the same, a light emitting device package, and a lighting system.

A light emitting device according to an embodiment includes a first conductive type first semiconductor layer 112; An active layer 114 on the first conductive type first semiconductor layer 112; A second conductive type second semiconductor layer 115 having a predetermined inclined surface and disposed on the active layer 114; An insulating layer 130 disposed on an inclined surface of the second conductive type second semiconductor layer 115; And a second conductive type third semiconductor layer 116 disposed on the insulating layer 130 and the second conductive type second semiconductor layer 115.

The illumination system according to the embodiment may include a light emitting unit having the light emitting element.

Embodiments can provide a light emitting device having excellent ESD characteristics and excellent internal light emitting efficiency, a method of manufacturing the same, a light emitting device package, and an illumination system.

1 is a cross-sectional view of a light emitting device according to an embodiment.
FIGS. 2 to 5 are views showing a manufacturing process of the light emitting device according to the embodiment. FIG.
6 is a cross-sectional view of a light emitting device package according to an embodiment.
7 is an exploded perspective view of a lighting apparatus according to an embodiment.

In the description of the embodiments, it is to be understood that each layer (film), area, pattern or structure may be referred to as being "on" or "under" the substrate, each layer Quot; on "and" under "are intended to include both" directly "or" indirectly " do. Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings.

(Example)

FIG. 1 is a cross-sectional view of a light emitting device 100 according to an embodiment. The embodiment can be applied to a horizontal light emitting device, but not limited thereto, and can be applied to a vertical light emitting device or a flip chip light emitting device.

The light emitting device 100 according to the embodiment includes a substrate 102, a first conductive type first semiconductor layer 112, an active layer 114, a second conductive type second semiconductor layer 115 having a predetermined inclined surface, An insulating layer 130, and a second conductive type third semiconductor layer 116. The light emitting device 100 according to the embodiment may include an electron blocking layer 122 between the active layer 114 and the second conductive type second semiconductor layer 115. In addition, the embodiment may include the light-transmitting electrode 140 on the second conductive type third semiconductor layer 116. For example, in the light emitting device 100 according to the embodiment, An active layer 114 and a second conductive type second semiconductor layer 115 disposed on the active layer 114 and having a predetermined inclined surface, the first conductive type first semiconductor layer 112, the first conductive type first semiconductor layer 112, An insulating layer 130 disposed on the inclined surface of the second conductive type second semiconductor layer 115 and an insulating layer 130 disposed on the insulating layer 130 and the second conductive type second semiconductor layer 115, And a second conductivity type third semiconductor layer 116.

The first conductive type first semiconductor layer 112, the active layer 114, the second conductive type second semiconductor layer 115 and the second conductive type third semiconductor layer 116 are formed on the light emitting structure 110, But it is not limited thereto.

In addition, the embodiment may include the light-transmitting electrode 140 and the light-transmitting electrode 140 on the second conductive type third semiconductor layer 116, and the second conductive type third semiconductor layer 116, A second electrode 152 and a first electrode 151 that are electrically connected to the first semiconductor layer 112, respectively.

The first conductivity type first semiconductor layer 112 may be an n-type semiconductor layer, and the second conductivity type second semiconductor layer 115 and the second conductivity type third semiconductor layer 116 may be a p- But is not limited thereto.

In an exemplary embodiment, the second conductive type second semiconductor layer 115 may have a V-pit structure V that includes an inclined plane.

 According to the embodiment, a V-pit structure (V) can be formed on the second conductive type second semiconductor layer 115 which is a p-type semiconductor layer. The second conductive type second semiconductor layer 115 is disposed on the upper side of the active layer 114 and spaced apart from the active layer 114 to improve the crystal quality of the active layer 114.

The embodiment may include an electron blocking layer 122 between the active layer 114 and the second conductive type second semiconductor layer 115. The electron blocking layer 122 may be an Al _p Ga _q In _1-pq N layer (where 0 <p≤1, 0≤q≤1) 122, and the active layer 114 may include a second conductive type 2 semiconductor layer 115. In this case, the light emitting efficiency can be increased.

In addition, according to the embodiment, the insulating layer 130 may be formed on the V-pit structure (V). The insulating layer 130 may include nitride or oxide. For example, the insulating layer 130 may be a SiN mask, but is not limited thereto. The insulating layer 130 may be formed to cover the inclined surface, but the present invention is not limited thereto. In an embodiment, the insulating layer 130 may be formed in a plurality of spaced apart shapes. For example, the insulating layer 130 may be formed on the inclined surfaces of the V-pit structure V of the second conductive type second semiconductor layer 115. Thereafter, the second conductive type third semiconductor layer 116 may be formed on the inclined surface between the insulating layers 130 spaced apart from each other and merged to form the second conductive type third semiconductor layer 116. However, It is not.

The insulating layer 130 may be formed to have a thickness of about 0.001 nm to less than 1 nm. If the insulating layer 130 is formed to be less than 0.001 nm, the insulating layer 130 may not function. If the insulating layer 130 is formed to a thickness greater than 1 nm, Type conductivity of the second-conductivity-type third semiconductor layer 116 can be affected.

According to the embodiment, the insulating layer 130 is formed in a V-pit structure (V), and a p-type dopant such as Mg and an insulating layer material, for example Si, forms a complex structure, The ESD characteristics are improved and the V-pit structure (V) is generated in the portion where the dislocation is present, so that the leakage characteristic is improved and the yield is increased.

Hereinafter, a method of manufacturing a light emitting device according to an embodiment will be described with reference to FIGS. 2 to 5. FIG.

First, the substrate 102 is prepared as shown in FIG. The substrate 102 may be formed of a material having excellent thermal conductivity, or may be a conductive substrate or an insulating substrate.

For example, the substrate 102 may use at least one of sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge and Ga ₂ O ₃ . A concavo-convex structure (not shown) may be formed on the substrate 102, but the present invention is not limited thereto.

At this time, a buffer layer (not shown) may be formed on the substrate 102. The buffer layer may mitigate the lattice mismatch between the material of the light emitting structure 110 to be formed and the substrate 102 and the material of the buffer layer may be a group III-V compound semiconductor such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN.

Next, a first conductive type first semiconductor layer 112, an active layer 114, and an Al _p Ga _q In _1-pq N layer (where 0 < _{p? 1} , 0? 1) 122 and a second conductive type second semiconductor layer 115 may be formed.

The first conductive type first semiconductor layer 112 may be formed of a compound semiconductor such as a Group III-V-V, Group-VI-VI, or the like, and may be doped with a first conductive type dopant . When the first conductive type first semiconductor layer 112 is an n-type semiconductor layer, the first conductive type dopant may include Si, Ge, Sn, Se, and Te as n-type dopants, but is not limited thereto .

The first conductive type first semiconductor layer 112 may include a semiconductor material having a composition formula of In _d Al _e Ga _1-de N ( _{0? D} ? 1, 0? E? 1, 0? D + . For example, the first conductive type first semiconductor layer 112 may include at least one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP, As shown in FIG.

The active layer 114 may be formed of at least one of a single quantum well structure, a multi quantum well (MQW) structure, a quantum-wire structure, or a quantum dot structure.

For example, the active layer 114 may be formed with a multiple quantum well structure by injecting trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and trimethyl indium gas (TMIn) But is not limited thereto.

InGaN / InGaN, InGaN / AlGaN, InGaN / AlGaN, InAlGaN / GaN, GaAs / AlGaAs, InGaAs / AlGaAs, InGaN / AlGaN, InGaN / , GaP / AlGaP, and InGaP / AlGaP. However, the present invention is not limited thereto.

Next, the Al _p Ga _q In _1-pq N layer (where 0 < _{p? 1} , 0? Q? 1) 122 is formed to have an energy band gap higher than the energy band gap of the active layer 114 So that electron blocking and cladding of the active layer (MQW cladding) can be performed to improve the light emitting efficiency.

In the embodiment, the Al _p Ga _q In _1-pq N layer (0 < _{p? 1} , 0? Q? 1 ) 122 to increase the luminous efficiency through the electron blocking function.

Next, a second conductive type second semiconductor layer 115 having a predetermined inclined surface on the Al _p Ga _q In _1-pq N layer (where 0 < _{p? 1} , 0? Q? 1) May be formed.

Also, in the embodiment, the second conductive type second semiconductor layer 115 may include a V-pit structure V having the inclined surface.

In addition, in the embodiment, the Al _p Ga _q In _1-pq N layer (0 < _{p? 1} , 0? Q? 1) 122 is formed on the second conductive type semiconductor layer 115 -pit structure V is prevented from being transferred to the active layer 114, thereby improving the crystal quality of the active layer 114 and improving the luminous efficiency.

The V-pit structure (V) is formed in the second conductive type second semiconductor layer 115, which is a p-type semiconductor layer, and the second conductive type second semiconductor layer 115 is formed in the active layer 114, And the V-pit structure V and the active layer 114 are separated from each other by being disposed on the upper side of the active layer 114 and spaced apart from the active layer 114, thereby improving the crystal quality of the active layer 114.

In order to form the V-pit structure (V) in the second conductive type second semiconductor layer 115 in the embodiment, N ₂ and NH ₃ or N ₂ , H ₂ , NH ₃ to form a second conductivity type second semiconductor layer 115 in the growth atmosphere of the mixed gas, but the embodiment is not limited thereto.

Next, as shown in FIG. 3, an insulating layer 130 may be formed on the V-pit structure (V).

The insulating layer 130 may include nitride or oxide. For example, the insulating layer 130 may be a SiN mask, but is not limited thereto. The insulating layer 130 may be formed to cover the inclined surface, but the present invention is not limited thereto.

The insulating layer 130 may be grown in a V-pit structure (V) region and the growth temperature of the insulating layer 130 may be about 900 ° C. to 1000 ° C. and a mixture of N ₂ , H ₂ , and NH ₃ (Si) source such as SiH ₄ or Si ₂ H ₆ or Si ₅ H ₁₂ in a gas growth atmosphere. The insulating layer 130 may be formed by bending or blocking a dislocation, It is possible to improve the property.

According to the embodiment, when the insulating layer 130 is formed in the V-pit structure (V), the p-type dopant, for example, Mg and the material of the insulating layer 130, As a result, the ESD characteristics are improved and the V-pit structure (V) is generated in the portion where the dislocation is present. Thus, the leakage characteristic is improved and the yield is increased.

Next, a second conductive type third semiconductor layer 116 may be formed on the second conductive type second semiconductor layer 115 and the insulating layer 130.

The second conductive type third semiconductor layer 116 may include a semiconductor material having a composition formula of In _d Al _e Ga _1-de N ( _{0? D} ? 1, 0? E? 1, 0? D + . When the second conductive type third semiconductor layer 116 is a p-type semiconductor layer, the second conductive type dopant may include Mg, Zn, Ca, Sr, and Ba as a p-type dopant.

The second conductive type third semiconductor layer 116 may be grown in a mixed gas atmosphere of N ₂ , H ₂ , and NH ₃ at a temperature of about 950 ° C. to about 1050 ° C.

According to the embodiment, the second conductive type third semiconductor layer 116 fills the vacant space of the V-pit structure (V) in which the insulating layer 130 is formed and can form a flat surface through 2D growth. have.

In the embodiment, the light emitting structure 110 may have any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure.

A light transmitting electrode 140 may be formed on the second conductive type third semiconductor layer 116.

For example, the light-transmitting electrode 140 may include an ohmic layer. The light-transmitting electrode 140 may be formed by laminating a single metal, a metal alloy, a metal oxide, or the like in a single layer or multiple layers so as to efficiently perform hole injection .

For example, the transmissive electrode 140 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (ZnO), indium gallium tin oxide (AZO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZON nitride, AGZO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Ni, IrOx / Au, and Ni / IrOx / , Au, and Hf, and is not limited to these materials.

Next, as shown in FIG. 4, the light-transmitting electrode 140, the second conductive type third semiconductor layer 116, the second conductive type second semiconductor layer 115, and the second conductive type semiconductor layer 115 are formed to expose the first conductive type first semiconductor layer 112, , A part of the Al _p Ga _q In _1-pq N layer (where 0 < _{p? 1} , 0? Q? 1) 122 and the active layer 114 may be removed to form the mesa etching region H .

5, a second electrode 152 is formed on the transparent electrode 140, and a first electrode 151 is formed on the exposed first conductive semiconductor layer 112. In this embodiment, The light emitting device can be formed.

A through hole (not shown) is formed in a part of the transmissive electrode 140 so that the second electrode 152 formed on the transmissive electrode 140 contacts the second conductive type third semiconductor layer 116 But are not limited to. A concavo-convex shape (not shown) may be formed on the upper surface of the transmissive electrode 140 or the upper surface of the second conductive type third semiconductor layer 116 to improve the extraction efficiency of light emitted from the active layer 114, I never do that.

Embodiments can provide a light emitting device having excellent ESD characteristics and excellent internal light emitting efficiency, a method of manufacturing the same, a light emitting device package, and an illumination system.

A plurality of light emitting devices according to embodiments may be arrayed on a substrate in the form of a package, and a light guide plate, a prism sheet, a diffusion sheet, a fluorescent sheet, or the like may be disposed on a path of light emitted from the light emitting device package.

For example, FIG. 6 is a view illustrating a light emitting device package having the light emitting device according to the embodiments.

The light emitting device package according to the embodiment includes a package body 205, a third electrode layer 213 and a fourth electrode layer 214 provided on the package body 205, The light emitting device 100 may include a light emitting device 100 electrically connected to the third electrode layer 213 and the fourth electrode layer 214 and a molding member 230 surrounding the light emitting device 100, 230 may include a phosphor 232. The upper surface of the molding member 230 may be flat, concave or convex, but is not limited thereto.

The third electrode layer 213 and the fourth electrode layer 214 are electrically isolated from each other and provide power to the light emitting device 100. The third electrode layer 213 and the fourth electrode layer 214 may function to increase light efficiency by reflecting the light generated from the light emitting device 100, And may serve to discharge heat to the outside.

The light emitting device 100 may be electrically connected to the third electrode layer 213 and / or the fourth electrode layer 214 by a wire, flip chip, or die bonding method.

The light emitting device according to the embodiment may be applied to a backlight unit, a lighting unit, a display device, a pointing device, a lamp, a streetlight, a vehicle lighting device, a vehicle display device, a smart watch, but is not limited thereto.

For example, Figure 7 is an exploded perspective view of an illumination system according to an embodiment.

The lighting apparatus according to the embodiment may include a cover 2100, a light source module 2200, a heat discharger 2400, a power supply unit 2600, an inner case 2700, and a socket 2800. Further, the illumination device according to the embodiment may further include at least one of the member 2300 and the holder 2500. The light source module 2200 may include a light emitting device or a light emitting device package according to the embodiment.

The light source module 2200 may include a light source unit 2210, a connection plate 2230, and a connector 2250. The member 2300 is disposed on the upper surface of the heat discharging body 2400 and has guide grooves 2310 through which the plurality of light source portions 2210 and the connector 2250 are inserted.

The holder 2500 blocks the receiving groove 2719 of the insulating portion 2710 of the inner case 2700. Therefore, the power supply unit 2600 housed in the insulating portion 2710 of the inner case 2700 is sealed. The holder 2500 has a guide protrusion 2510.

The power supply unit 2600 may include a protrusion 2610, a guide 2630, a base 2650, and an extension 2670. The inner case 2700 may include a molding part together with the power supply part 2600. The molding part is a hardened portion of the molding liquid so that the power supply unit 2600 can be fixed inside the inner case 2700.

The features, structures, effects and the like described in the embodiments are included in at least one embodiment and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects and the like illustrated in the embodiments can be combined and modified by other persons skilled in the art to which the embodiments belong. Accordingly, the contents of such combinations and modifications should be construed as being included in the scope of the embodiments.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. It can be seen that the modification and application of branches are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that the present invention may be embodied in many other specific forms without departing from the spirit or essential characteristics thereof.

The substrate 102, the first conductive type first semiconductor layer 112, the active layer 114,
The second conductive type second semiconductor layer 115, the insulating layer 130,
The electron blocking layer 122, the second conductive type third semiconductor layer 116, the light transmitting electrode 140,
The first electrode 151, the second electrode 152,

Claims (6)

A first conductive type first semiconductor layer;
An active layer on the first conductive type semiconductor layer;
A second conductive type second semiconductor layer having a predetermined inclined surface and disposed on the active layer;
An insulating layer disposed on an inclined surface of the second conductive type second semiconductor layer; And
And a second conductive type third semiconductor layer disposed on the insulating layer and the second conductive type second semiconductor layer. The method according to claim 1,
The insulating layer
And the light emitting element covers the inclined surface. The method according to claim 1,
Wherein the insulating layer is formed by including a SiN mask. The method according to claim 1,
And the second conductive type second semiconductor layer is disposed on the upper side of the active layer and spaced apart from the active layer. The method according to claim 1,
Further comprising an electron blocking layer between the active layer and the second conductive semiconductor layer,
Wherein the total lower single layer comprises an Al _p Ga _q In _1-pq N layer (with 0 < _{p? 1} , 0? Q? 1). An illumination system comprising a light-emitting unit comprising the light-emitting element according to any one of claims 1 to 5.

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