KR20160055457A - Substrate having an embedded thermoelectric module, semiconductor package and method of manufacturing the same - Google Patents

Abstract

Disclosed are a substrate having an insulation layer and a thermoelectric module and a semiconductor package. The thermoelectric module is embedded in the insulation layer. Therefore, the substrate can maximize a heat dissipation effect within a short time.

Description

TECHNICAL FIELD [0001] The present invention relates to a substrate having a thermoelectric module, a semiconductor package, and a method of manufacturing the same.

A semiconductor package having a thermoelectric module, and a method of manufacturing the same.

Recently, an intense heat of a CPU core due to a high performance of a mobile AP (application processor) is required to effectively solve a thermal issue.

U.S. Published Patent Application No. 2010/0140790

And a substrate having a thermoelectric module capable of maximizing a heat radiation effect in a short time by moving heat by using electric energy.

Another aspect of the present invention is to provide a printed circuit board on which a thermoelectric module of a Peltier principle, which generates heat when a current is applied, is implemented on a printed circuit board.

Another aspect is to provide a substrate having a thermoelectric module applicable as a flexible substrate for wearable devices.

Another aspect is to provide a method of manufacturing a substrate having a thermoelectric module capable of forming a thermoelectric module during a process of manufacturing a printed circuit board material or a printed circuit board.

Another aspect is to provide a semiconductor package using the substrate having the thermoelectric module.

A substrate having a thermoelectric module according to one embodiment comprises a plurality of pairs of N-type semiconductor devices and P-type semiconductor devices alternately arranged and impregnated in a glass fiber fabric; A circuit layer formed on both sides of the glass fiber fabric impregnated with the plurality of pairs of semiconductor elements; And a core insulation layer filled in the void space of the glass fiber fabric in which the circuit layer is formed.

A method of manufacturing a substrate having a thermoelectric module according to an exemplary embodiment includes printing an N-type semiconductor material and a P-type semiconductor material on a glass fiber fabric and alternately arranging the N-type semiconductor element and the P- ≪ / RTI > Forming a circuit layer including a plurality of electrode patterns connecting an N-type semiconductor element and a P-type semiconductor element adjacent to each other on both sides of a glass fiber fabric impregnated with a plurality of pairs of semiconductor elements; And filling the core insulating layer in the void space of the glass fiber fabric in which the circuit layer is formed.

1 is a cross-sectional view of a substrate having a thermoelectric module according to an embodiment of the present invention.
2 is a cross-sectional view of a substrate having a thermoelectric module according to another embodiment of the present invention.
3 is a cross-sectional view of a substrate having a thermoelectric module according to another embodiment of the present invention.
4 is a cross-sectional view of a substrate having a thermoelectric module according to another embodiment of the present invention.
5 is a flowchart illustrating a method of manufacturing a substrate having a thermoelectric module according to an embodiment of the present invention.
6 to 9 are process sectional views showing a method of manufacturing a substrate having a thermoelectric module according to an embodiment of the present invention in order of process.
10 is a flowchart illustrating a method of manufacturing a substrate having a thermoelectric module according to another embodiment of the present invention.
11 to 13 are process sectional views showing a method of manufacturing a substrate having a thermoelectric module according to another embodiment of the present invention in the order of process.
14 is a flowchart illustrating a method of manufacturing a substrate having a thermoelectric module according to another embodiment of the present invention.
15 to 17 are process sectional views showing a method of manufacturing a substrate having a thermoelectric module according to another embodiment of the present invention in order of process.
18 is a cross-sectional view illustrating a semiconductor package according to an embodiment of the present invention.
19 is a cross-sectional view of a semiconductor package according to another embodiment of the present invention.
20 is a cross-sectional view illustrating a semiconductor package according to another embodiment of the present invention.

The features and advantages of the present invention will become more apparent from the following detailed description based on the accompanying drawings.

Prior to that, terms and words used in the present specification and claims should not be construed in a conventional and dictionary sense, and the inventor can properly define the concept of a term to describe its invention in the best possible way It should be construed as meaning and concept consistent with the technical idea of the present invention.

It should be noted that, in the present specification, the reference numerals are added to the constituent elements of the drawings, and the same constituent elements are assigned the same number as much as possible even if they are displayed on different drawings. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. In this specification, the terms first, second, etc. are used to distinguish one element from another, and the element is not limited by the terms. In the accompanying drawings, some of the elements are exaggerated, omitted or schematically shown, and the size of each element does not entirely reflect the actual size.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

A substrate having a thermoelectric module

1 is a cross-sectional view of a substrate having a thermoelectric module according to an embodiment of the present invention.

1, a substrate 1000 having the thermoelectric module includes a plurality of pairs of an N-type semiconductor element 501 and a P-type semiconductor element 502 alternately arranged and embedded in a glass fiber fabric 101, A circuit layer including a plurality of electrode patterns 513 connecting the N-type semiconductor element 501 and the P-type semiconductor element 502 which are adjacent to each other and a plurality of electrode patterns 513 which are filled in the empty space of the glass fiber fabric 101 in which the circuit layer is formed Includes a core insulating layer (102).

The core insulating layer 102 may further include a metal layer 123a formed on the core insulating layer 102 and extending outside the glass fiber fabric 101 to cover the circuit layer. have. The substrate 1000 thus formed can be used as a printed circuit board material in various fields.

The glass fiber fabric 101 is a glass fabric woven with glass fiber excellent in heat resistance, dimensional stability, and electrical characteristics, and can be used without any particular limitation as long as it is known in the art as a substrate for a printed wiring board. For example, one-directional glass fiber fabrics, glass-fiber fabrics having one-sided combination structure, double-weave glass fiber fabrics, and the like, but are not limited thereto.

The thermoelectric module applied to the substrate 1000 is a cooling device using a Peltier effect and includes an N type semiconductor element 501 and a P type semiconductor element 502 alternately arranged, And the P-type semiconductor element 502 are connected to the electrode pattern 513. The N-type semiconductor element 501 and the P-type semiconductor element 502 are alternately connected to the electrode pattern 513 on the upper side and the lower side. When power is supplied to the thermoelectric module, the entire elements 501 and 502 are connected in series Respectively. Although not shown, a lead wire may be connected to the thermoelectric module so as to be electrically connected to the outside.

A plurality of pairs of the N-type semiconductor element 501 and the P-type semiconductor element 502 may be arranged, for example, 50 to 200, or 100 to 150.

On the other hand, the semiconductor elements 501 and 502 are impregnated in the glass fiber fabric 101, and the hollow space of the glass fiber fabric 101 including the space between the semiconductor elements 501 and 502 is provided with core insulation Layer (102).

Thermoelectric efficiency is proportional to electrical conductivity and inversely proportional to thermal conductivity. According to this embodiment, since the semiconductor device is constituted by being impregnated with the glass fiber cloth, the glass fiber is present in the thermoelectric module and the thermal conductivity is lowered, so that the thermoelectric efficiency can be further increased.

The electrode pattern 513 guides the flow of the power when the power is applied to the thermoelectric module. The electrode pattern 513 and the semiconductor elements 501 and 502 are connected in surface contact, .

The electrode pattern 513 used in the thermoelectric module may be formed of a material having high electrical conductivity in order to minimize the loss of power supplied to the thermoelectric module. For example, a material having excellent conductivity including at least one of copper (Cu), copper-molybdenum (Cu-Mo), silver (Ag), gold (Au), and platinum (Pt).

The electrode pattern 513 may be formed at the same time in a conventional circuit pattern forming process. The circuit layer including the electrode pattern 513 may be formed of a conductive metal paste, a metal plating, or a combination thereof.

As the semiconductor element used in the thermoelectric module, for example, a semiconductor containing at least two elements selected from the group consisting of a transition metal, a rare earth element, a group 13 element, a group 14 element, a group 15 element and a group 16 element, Can be used. As the rare earth element, Y, Ce, La and the like can be used. As the transition metal, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Fe, Co, Ni, And Re, and at least one of B, Al, Ga and In may be used as the Group 13 element, and at least one of C, Si, Ge, Sn and Pb may be used as the Group 14 element. At least one of P, As, Sb and Bi may be used as the Group 15 element, and at least one of S, Se and Te may be used as the Group 16 element. Examples of the semiconductor containing such an element include Bi-Te semiconductor, Co-Sb semiconductor, Pb-Te semiconductor, Si-Ge semiconductor, Fe-Si semiconductor, or Sb-Te semiconductor.

These semiconductors may include at least one element selected from the group consisting of transition metals, rare earth elements, Group 13 elements, Group 14 elements, Group 15 elements, and Group 16 elements as dopants to improve electrical characteristics and the like. (Bi, Sb) ₂ (Te, Se) ₃ semiconductors in which Sb and Se are used as a dopant can be exemplified as the Bi-Te semiconductor, and a CoSb ₃ semiconductor can be exemplified as the Co-Sb semiconductor AgSbTe ₂ and CuSbTe ₂ may be exemplified as the Sb-Te-based semiconductor, and PbTe and (PbTe) mAgSbTe ₂ may be exemplified as the Pb-Te-based semiconductor.

For example, when a direct current (DC) voltage is applied to both ends of the lead wire of the thermoelectric module, the N-type semiconductor element 501 can be electrically connected to the thermoelectric module In the P-type semiconductor device 502, as the electrons flow, the heat moves from the cooling portion to the heating portion according to the flow of holes. As time passes, the temperature of the cooling portion becomes lower and the temperature of the heating portion becomes lower Rise. At this time, if the polarity of the applied voltage is changed, the positions of the cooling part and the heating part are changed and the heat flow is reversed. This phenomenon is caused by the difference in the potential energy of the electrons in the metal. In other words, in order to move electrons from a metal having a low potential energy to a metal having a high potential energy, it is necessary to bring energy from the outside so that heat energy is taken away from the contact point, and in the opposite case, heat energy is released. The heat absorption (cooling) is proportional to the flow of current and the number of semiconductor element couples (one pair of N-type and P-type semiconductor elements).

In the substrate 1000 having the thermoelectric module, for example, the upper surface of the thermoelectric module is a "cold surface ", i.e., a cooling portion, which absorbs heat, and a lower surface, have.

On the other hand, the core insulating layer 102 fixes the semiconductor elements 501 and 502 impregnated in the glass fiber fabric 101 and also functions as an insulator.

The core insulating layer 102 may be formed of a thermosetting, thermoplastic, or a combination thereof, typically used as an insulating material in a printed circuit board. For example, the insulating layer may be formed of a resin such as prepreg, Ajinomoto Build-up Film (ABF), FR-4, BT (bismaleimide triazine), polyimide, or the like.

The metal layer 123a is not particularly limited as long as it is usually used as a circuit layer as a conductive metal.

On the other hand, when the core insulating layer 102 is formed of a flexible resin such as polyimide, it can be used as a flexible substrate for a wearable device.

When the substrate having the thermoelectric module according to the present embodiment is applied to a wearable device, it is preferable that the thermoelectric module is placed near the human body It can be used as an auxiliary power source of a mobile device by converting electric energy into electric energy using a thermoelectric module by using a thermoelectric module.

2 is a cross-sectional view of a substrate having a thermoelectric module according to another embodiment of the present invention, and a description of the overlapping configuration is omitted.

2, the substrate 2000 having the thermoelectric module includes a plurality of pairs of the N-type semiconductor device 601 and the P-type semiconductor device 602 which are alternately arranged and impregnated in the glass fiber fabric 201, And a core insulating layer 202 filled in the void space of the glass fiber fabric 201.

The N-type semiconductor device 601 and the P-type semiconductor device 602, which are adjacent to each other, are electrically connected to the build-up insulating layer 212 via the via insulation layer 212, A plurality of electrode patterns 613 connecting through the plurality of electrode patterns 613 are formed.

The electrode pattern 613 may be formed of a material having high electrical conductivity to minimize the loss of power supplied to the thermoelectric module. For example, a material having excellent conductivity including at least one of copper (Cu), copper-molybdenum (Cu-Mo), silver (Ag), gold (Au), and platinum (Pt).

The electrode pattern 613 may be formed at the same time in a conventional circuit pattern forming process, and the circuit layer including the electrode pattern 613 may be formed of metal plating, for example.

The core insulating layer 102 and the build-up insulating layer 212 may be formed of a thermosetting, thermoplastic, or a combination thereof, which is typically used as an insulating material in a printed circuit board. For example, the insulating layer may be formed of a resin such as prepreg, Ajinomoto Build-up Film (ABF), FR-4, BT (bismaleimide triazine), polyimide, or the like. When the insulating layer is formed of a flexible resin such as polyimide, it can be used as a flexible substrate for a wearable device.

On the build-up insulating layer 212, a metal layer 223a is formed.

The metal layer 223a is not particularly limited as long as it is usually used as a circuit layer as a conductive metal.

In the substrate 2000 having the thermoelectric module, for example, the upper surface of the thermoelectric module is a "cold surface ", that is, a cooling portion, which absorbs heat, and a lower surface, have.

The substrate 2000 thus formed can be used as a printed circuit board material in various fields.

FIG. 3 is a cross-sectional view of a substrate having a thermoelectric module according to another embodiment of the present invention.

3, the substrate 3000 having the thermoelectric module includes a plurality of pairs of the N-type semiconductor element 701 and the P-type semiconductor element 702 alternately arranged and impregnated in the glass fiber fabric 301, A circuit layer including a plurality of electrode patterns 713 for connecting the N-type semiconductor element 701 and the P-type semiconductor element 702 which are adjacent to each other and a void space of the glass fiber fabric 301 in which the circuit layer is formed Includes a core insulating layer (302).

A buildup layer including a plurality of build-up insulating layers 312 and 322 and a plurality of build-up circuit layers 323 and 333 is stacked on the core insulating layer 302 as a protective layer of the outermost circuit layer , And a solder resist layer 330 exposing the connection pad are formed.

The electrode pattern 713 may be simultaneously formed in the process of forming a circuit pattern, and the circuit layer including the electrode pattern 713 may be formed of, for example, a conductive metal paste, a metal plating, or a combination thereof .

The build-up circuit layer also includes a plurality of heat-dissipating vias 724a, 724b connected to the electrode pattern 713 and extending outermost of the build-up layer.

The heat radiation vias 724a and 724b may be formed of a metal such as copper or aluminum having a high thermal conductivity, and may be formed of the same material as the circuit layer.

In addition, the build-up circuit layer includes signal vias 324 for electrical wiring.

Here, the heat radiation vias 724a and 724b and the signal vias 324 may be formed by the same process and may be made of the same material.

The core insulation layer 302 and the build-up insulation layers 312 and 322 may be formed of a thermosetting, thermoplastic or a combination thereof, typically used as an insulating material in a printed circuit board. For example, when the insulating layer is formed of a flexible resin such as polyimide, it can be used as a flexible substrate.

In the substrate 3000 having the thermoelectric module, for example, the upper surface of the thermoelectric module is a "cold surface" or cooling portion for absorbing heat and a lower surface is a & The heat absorbed by the cooling part of the thermoelectric module via the upper heat radiation vias 724a is efficiently generated from the substrate 3000 through the lower heat radiation vias 724b formed in the heat generation part and extending to the lower outside of the substrate 3000 .

As described above, the heat radiation via can be maximized by disposing the heat radiation vias on the upper and lower surfaces of the substrate.

4 is a cross-sectional view of a substrate having a thermoelectric module according to another embodiment of the present invention, and a description of the overlapping configuration is omitted.

4, the substrate 4000 having the thermoelectric module includes a plurality of pairs of the N-type semiconductor device 801 and the P-type semiconductor device 802, which are alternately arranged and embedded in the glass fiber fabric 401, A circuit layer including a plurality of electrode patterns 813 connecting the N-type semiconductor element 801 and the P-type semiconductor element 802 which are adjacent to each other; Includes a core insulating layer (402).

A build-up layer including a plurality of build-up insulating layers 452 and a plurality of build-up circuit layers is laminated on the core insulating layer 402. As a protective layer of the outermost circuit layer, A resist layer 450 is formed.

The electrode pattern 813 may be formed at the same time in a conventional circuit pattern formation process, and the circuit layer including the electrode pattern 813 may be formed of, for example, a conductive metal paste, a metal plating, or a combination thereof .

The build-up circuit layer also includes stacked heat sink vias 854a and 854b connected to the electrode pattern 813 and extending to the outermost side of the buildup layer and connected to the entire layer.

The laminated heat sink vias 854a and 854b may be formed of a metal such as copper or aluminum having a high thermal conductivity, and may be formed of the same material as the circuit layer.

In addition, the build-up circuit layer includes stacked signal vias 454 for electrical wiring.

Here, the laminated vias 854a and 854b and the laminated signal vias 454 may be formed by the same process and made of the same material.

The core insulating layer 402 and the build-up insulating layer 452 may be formed of a thermosetting, thermoplastic, or a combination thereof, which is typically used as an insulating material in a printed circuit board. For example, when the insulating layer is formed of a flexible resin such as polyimide, it can be used as a flexible substrate.

In the substrate 4000 having the thermoelectric module, for example, the upper surface of the thermoelectric module is a "cold surface" or a cooling portion for absorbing heat and a lower surface is a & The heat absorbed by the cooling portion of the thermoelectric module via the upper laminated via vias 854a is formed in the heat generating portion and is transferred to the substrate 4000 through the lower laminated via 854b extending outside the lower portion of the substrate 4000. [ .

Thus, the upper and lower surfaces of the substrate can be connected to the entire layer through the laminated via holes, thereby maximizing the heat radiating effect.

Method for manufacturing a substrate having a thermoelectric module

FIG. 5 is a flowchart showing a method of manufacturing a substrate having a thermoelectric module according to an embodiment of the present invention, and FIGS. 6 to 9 are process cross-sectional views illustrating the method of manufacturing the substrate.

Referring to FIG. 5, a method of manufacturing a substrate having a thermoelectric module according to an exemplary embodiment of the present invention includes preparing a glass fiber cloth (S110); Printing (S120) an N-type semiconductor material and a P-type semiconductor material on the glass fiber fabric; Forming a circuit layer on both sides of the glass cloth (S130); (S140) filling the core insulating layer in the void space of the glass fiber fabric in which the circuit layer is formed.

Hereinafter, each step will be described with reference to the process sectional views shown in Figs. 6 to 9. Fig.

First, referring to Fig. 6, a glass fiber fabric 101 is prepared.

The glass fiber fabric 101 is a glass fabric woven with glass fiber excellent in heat resistance, dimensional stability, and electrical characteristics, and can be used without any particular limitation as long as it is known in the art as a substrate for a printed wiring board.

Next, referring to FIG. 7, a paste-like N-type semiconductor material and a P-type semiconductor material are printed on the glass fiber fabric 101 and patterned.

As the semiconductor material used for the thermoelectric module, a semiconductor paste containing two or more elements selected from the group consisting of transition metals, rare earth elements, Group 13 elements, Group 14 elements, Group 15 elements and Group 16 elements, You can use more than one. As the rare earth element, Y, Ce, La and the like can be used. As the transition metal, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Fe, Co, Ni, And Re, and at least one of B, Al, Ga and In may be used as the Group 13 element, and at least one of C, Si, Ge, Sn and Pb may be used as the Group 14 element. At least one of P, As, Sb and Bi may be used as the Group 15 element, and at least one of S, Se and Te may be used as the Group 16 element. Examples of the semiconductor containing such an element include Bi-Te semiconductor, Co-Sb semiconductor, Pb-Te semiconductor, Si-Ge semiconductor, Fe-Si semiconductor, or Sb-Te semiconductor.

These semiconductors may include at least one element selected from the group consisting of transition metals, rare earth elements, Group 13 elements, Group 14 elements, Group 15 elements, and Group 16 elements as dopants to improve electrical characteristics and the like. (Bi, Sb) ₂ (Te, Se) ₃ semiconductors in which Sb and Se are used as a dopant can be exemplified as the Bi-Te semiconductor, and a CoSb ₃ semiconductor can be exemplified as the Co-Sb semiconductor AgSbTe ₂ and CuSbTe ₂ may be exemplified as the Sb-Te-based semiconductor, and PbTe and (PbTe) mAgSbTe ₂ may be exemplified as the Pb-Te-based semiconductor.

As described above, the N-type semiconductor material and the P-type semiconductor material patterned by screen printing on the glass fiber fabric 101 are fired at a predetermined temperature to form the N-type semiconductor element Type semiconductor element 501 and a plurality of pairs of P-type semiconductor elements 502 are formed.

It is also possible that such a baking process is carried out once after the circuit layer is formed according to the material of the circuit layer to be formed later.

Next, referring to FIG. 8, an N-type semiconductor element 501 and a P-type semiconductor element 502 which are adjacent to each other on both sides of a glass fiber fabric 101 in which a plurality of pairs of the semiconductor elements 501 and 502 are impregnated A plurality of electrode patterns 513 are formed by patterning.

The method of patterning the circuit layer including the electrode pattern 513 may use any conventionally known patterning method. For example, a screen printing method, a plating method, a direct bonding method, a deposition method such as an e-beam coating method, a method using a bonding agent such as AgPd, or the like can be used .

If necessary, a separate bonding material such as solder may be applied between the semiconductor elements 501 and 502 and the electrode pattern 513.

Next, referring to FIG. 9, the core insulating layer 102 is filled in the empty space of the glass fiber fabric 101 in which the circuit layer is formed.

The core insulating layer 102 is formed by laminating an insulating resin on the glass fiber fabric 101 to fill the void space of the glass fiber fabric 101 and to cover the circuit layer on the outer side of the glass fiber fabric 101 As shown in FIG. In addition, the metal layer 123a may be further formed on the core insulating layer 102 formed outside the glass fiber fabric 101.

Further, it is also possible to perform additional lamination through a normal build-up layer formation process.

The substrate thus formed can be used in various fields as a printed circuit board material.

10 is a flowchart illustrating a method of manufacturing a substrate having a thermoelectric module according to another embodiment of the present invention, and FIGS. 11 to 13 are process cross-sectional views illustrating the method of manufacturing the substrate.

Referring to FIG. 10, a method of manufacturing a substrate having a thermoelectric module according to another embodiment of the present invention includes preparing a glass fiber cloth (S210); Printing (S220) an N-type semiconductor material and a P-type semiconductor material on the glass fiber fabric; Filling the hollow space of the glass fiber fabric with a core insulating layer (S230); And forming a circuit layer including vias on both sides of the core insulating layer (S240).

Hereinafter, each step will be described with reference to the process sectional views shown in Figs. 11 to 13. Fig.

11, an N-type semiconductor material and a P-type semiconductor material are printed on a glass fiber fabric 201, and the N-type semiconductor element 601 and P Type semiconductor element 602, and then filling the void space of the glass fiber fabric 201 with the core insulating layer 202.

The core insulating layer 202 is formed by laminating an insulating resin on the glass fiber fabric 201 to fill the void space of the glass fiber fabric 201 and to extend outside the glass fiber fabric 201 .

The process of forming the semiconductor device by the printing / firing of the semiconductor material and the process of forming the core insulating layer are as described above.

Next, referring to FIG. 12, a plurality of electrode patterns 613 connecting the N-type semiconductor element 601 and the P-type semiconductor element 602, which are adjacent to each other in the core insulating layer 202, To form a circuit layer.

The circuit layer forming process may include, for example, forming a via hole in an insulating layer, and forming a circuit layer including a via and a circuit pattern (electrode pattern) by plating, in a circuit forming process of a conventional printed circuit board ≪ / RTI >

13, a build-up insulating layer 212 is laminated on the core insulating layer 202 on which the circuit layer is formed, and a metal layer 223a is further formed on the build-up insulating layer 212 do.

Further, it is also possible to perform additional lamination through a normal build-up layer formation process.

The substrate thus formed can be used in various fields as a printed circuit board material.

FIG. 14 is a flowchart showing a method of manufacturing a substrate having a thermoelectric module according to another embodiment of the present invention, and FIGS. 15 to 17 are process sectional views showing the manufacturing method thereof in order of process.

Referring to FIG. 14, a method of manufacturing a substrate having a thermoelectric module according to another embodiment of the present invention includes the steps of preparing a glass fiber cloth (S310); Printing (S320) an N-type semiconductor material and a P-type semiconductor material on the glass fiber fabric; Filling the hollow space of the glass fiber fabric with a core insulating layer (S330); And forming a circuit layer on both sides of the glass fiber fabric (S340).

Hereinafter, each step will be described with reference to the process sectional views shown in Figs. 15 to 17. Fig.

15, an N-type semiconductor material and a P-type semiconductor material are printed on a glass fiber fabric 301, and the N-type semiconductor element 701 and P Type semiconductor element 702 and then fill the core insulating layer 302 in the void space of the glass fiber fabric 301. [

The process of forming the semiconductor device by printing / firing the semiconductor material is as described above.

The process of planarizing the core insulating layer 302 such that the surfaces of the N-type semiconductor element 701 and the P-type semiconductor element 702 impregnated in the core insulating layer 302 are exposed may be further performed .

Next, referring to FIG. 16, a plurality of electrode patterns (not shown) for connecting the N-type semiconductor element 701 and the P-type semiconductor element 702, which are adjacent to each other on both sides of the glass fiber fabric 301 filled with the core insulating layer 301, (713) is formed by patterning.

The method of patterning the circuit layer including the electrode pattern 713 can use any conventionally known patterning method. For example, a screen printing method, a plating method, a direct bonding method, a deposition method such as an e-beam coating method, a method using a bonding agent such as AgPd, or the like can be used .

If necessary, a separate bonding material such as solder may be applied between the semiconductor devices 701 and 702 and the electrode pattern 713.

17, a build-up insulating layer 312 is laminated on the core insulating layer 302 on which the circuit layer is formed, and a metal layer 323a is further formed on the build-up insulating layer 312 do.

Further, it is also possible to perform additional lamination through a normal build-up layer formation process.

The substrate thus formed can be used in various fields as a printed circuit board material.

Semiconductor package

FIG. 18 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention, and a description of the overlapped structure is omitted.

18, the semiconductor package 5000 includes a plurality of pairs of N-type semiconductor elements 501 and P-type semiconductor elements 502 alternately arranged and impregnated in a glass fiber fabric 101, A plurality of electrode patterns 513 formed on both sides of the glass fiber fabric 101 impregnated with a plurality of pairs and including a plurality of electrode patterns 513 connecting the N-type semiconductor element 501 and the P- A substrate having a thermoelectric module including a core insulating layer 102 and a core insulating layer 102 filled in a space of a glass fiber fabric 101 on which the circuit layer is formed and an electronic component 910 mounted on the substrate do.

A build-up layer including a build-up insulation layer 112 and a build-up circuit layer is further stacked on the core insulation layer 102 on which the circuit layer 113 is formed. In the build-up insulation layer 112, A build-up circuit layer is formed which includes a plurality of heat radiation vias 524a and 524b connected to the pattern 513 and extending outermost of the build-up layer.

The electronic component 910 (e.g., AP) is mounted on the upper heat-dissipating via 524a by flip-chip bonding via a solder bump 911, and for connection to another upper and lower package (not shown) External connection terminals 150 and 160 are formed on the upper and lower connection pads, respectively.

In the substrate having the thermoelectric module, for example, the upper surface of the thermoelectric module is a "cold side ", i.e., a cooling part for absorbing heat and a lower surface is a & The heat generated in the thermoelectric module 910 is absorbed by the cooling portion of the thermoelectric module via the upper heat radiation vias 524a, and the heat thus absorbed is formed in the heat generating portion of the thermoelectric module, And is efficiently discharged from the substrate through the via 524b.

FIG. 19 is a cross-sectional view of a semiconductor package according to another embodiment of the present invention, and a description of overlapping configurations is omitted.

19, the semiconductor package 6000 includes a plurality of pairs of N-type semiconductor element 501 and P-type semiconductor element 502 alternately arranged and impregnated in a glass fiber fabric 101, A plurality of electrode patterns 513 formed on both sides of the glass fiber fabric 101 impregnated with a plurality of pairs and including a plurality of electrode patterns 513 connecting the N-type semiconductor element 501 and the P- A substrate having a thermoelectric module including a core insulating layer 102 and a core insulating layer 102 filled in an empty space of the glass fiber fabric 101 on which the circuit layer is formed and an electronic component 920 mounted on the substrate do.

A build-up layer including a build-up insulation layer 112 and a build-up circuit layer is further stacked on the core insulation layer 102 on which the circuit layer 113 is formed. In the build-up insulation layer 112, A build-up circuit layer is formed which includes a plurality of heat radiation vias 524a and 524b connected to the pattern 513 and extending outermost of the build-up layer.

The electronic component 920 (for example, a memory) is wire-bonded to the connection pad 115 through a wire 921 and connected to an external connection terminal (not shown) for connection to another lower package 160 are formed.

In the substrate having the thermoelectric module, for example, the upper surface of the thermoelectric module is a "cold side ", i.e., a cooling part for absorbing heat and a lower surface is a & The heat generated in the thermoelectric module 920 is absorbed by the cooling portion of the thermoelectric module via the upper heat radiation vias 524a, and the heat thus absorbed is formed in the heat generating portion of the thermoelectric module, And is efficiently discharged from the substrate through the via 524b.

FIG. 20 is a cross-sectional view of a semiconductor package according to another embodiment of the present invention, and a description of overlapping configurations is omitted.

18, the semiconductor package 5000 as described above is mounted on the upper end of the mother board 7000 using the external connection terminal 160 as a connection member, and the lower end of the mother board 7000 A thermal pad 930 and a heat-radiating metal frame 940 are sequentially formed.

The heat generated from the electronic component 910 is absorbed through the cooling part of the thermoelectric module via the upper heat radiation vias 524a and the heat thus absorbed is discharged from the package 5000 through the lower heat radiation vias 524b And is efficiently released. Further, heat generated from the electronic component 910 is diffused in the horizontal direction through the upper and lower heat radiation vias 524a and 524b, and secondarily, the heat generated in the laminated heat radiation vias 554, thirdarily through the thermal pad 930, and finally fourtharily through the heat-radiating metal frame 940 to the opposite side.

The thermal pad 930 and the heat-radiating metal frame 940 may be formed of a metal such as copper or aluminum having high thermal conductivity.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the same is by way of illustration and example only and is not to be construed as limiting the present invention. It is obvious that the modification or improvement is possible.

It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

1000, 2000, 3000, 4000: substrate with thermoelectric module
5000, 6000: semiconductor package
7000: Motherboard
101, 201, 301, 401: Glass fiber fabric
102, 202, 302, 402: core insulation layer
113: Circuit layer
112, 212, 312, 322, 452: build-up insulation layer
323, 333: build-up circuit layer
115: connection pad
123a, 223a, and 323a: metal layers
150, 160: External connection terminal
324, 454: Signal vias
330, 450: solder resist layer
501, 601, 701 and 801: N-type semiconductor elements
502, 602, 702, 802: P-type semiconductor element
513, 613, 713, 813: electrode patterns
614: Via
524a, 524b, 554, 724a, 724b, 854a, 854b:
910, 920: Electronic parts
911: Solder bump
921: Wire
930: Thermal pad
940: Heat-resisting metal frame

Claims (23)

Glass fiber fabric;
A plurality of pairs of N-type semiconductor elements and P-type semiconductor elements alternately arranged and impregnated in said glass fiber fabric;
A circuit layer formed on both sides of the glass fiber fabric impregnated with the plurality of pairs of semiconductor elements; And
A core insulating layer filled in a void space of the glass fiber fabric in which the circuit layer is formed;
And a thermoelectric module.
The method according to claim 1,
Wherein the circuit layer has a thermoelectric module including a plurality of electrode patterns connecting an N-type semiconductor element and a P-type semiconductor element adjacent to each other.
The method according to claim 1,
Wherein the core insulating layer has a thermoelectric module extending outwardly of the glass fiber fabric to cover the circuit layer.
The method of claim 3,
And a thermally conductive module further comprising a metal layer formed on the core insulating layer.
The method of claim 2,
And a thermoelectric module further comprising a via for connecting the plurality of electrode patterns and the semiconductor elements.
The method according to claim 1,
Wherein the circuit layer comprises a thermoelectric module consisting of a conductive metal paste, a metal plating or a combination thereof.
The method according to claim 1,
And a build-up layer comprising a build-up insulation layer and a build-up circuit layer formed on the core insulation layer.
The method of claim 7,
Wherein the build-up layer further comprises a plurality of thermally conductive vias connected to the electrode pattern and extending outwardly of the build-up layer.
The method of claim 8,
Wherein the thermally conductive vias are stacked vias.
The method of claim 7,
Wherein the core insulation layer and the build-up insulation layer have a thermoelectric module selected from a thermosetting resin, a thermoplastic resin or a combination thereof.
The method of claim 7,
Wherein the core insulation layer and the build-up insulation layer have a thermoelectric module comprising a polyimide resin.
Preparing a glass fiber fabric;
Printing an N-type semiconductor material and a P-type semiconductor material on the glass fiber fabric to form a plurality of pairs of N-type semiconductor elements and P-type semiconductor elements that are alternately arranged and imprinted on the glass fiber fabric;
Forming a circuit layer including a plurality of electrode patterns connecting an N-type semiconductor element and a P-type semiconductor element adjacent to each other on both sides of a glass fiber fabric impregnated with a plurality of pairs of semiconductor elements; And
Filling a core insulating layer in a void space of the glass fiber fabric in which the circuit layer is formed;
And a thermoelectric module including the thermoelectric module.
The method of claim 12,
Further comprising firing the thermoelectric module prior to the post-printing circuit layer forming step or after the step of filling the core insulating layer after forming the circuit layer.
Preparing a glass fiber fabric;
Printing an N-type semiconductor material and a P-type semiconductor material on the glass fiber fabric to form a plurality of pairs of N-type semiconductor elements and P-type semiconductor elements that are alternately arranged and imprinted on the glass fiber fabric;
Stacking an insulating resin on a glass fiber fabric formed of a plurality of pairs of semiconductor elements to fill a void space of the glass fiber fabric and form a core insulating layer to extend outside the glass fiber fabric; And
Forming a circuit layer including a plurality of electrode patterns connecting the N-type semiconductor element and the P-type semiconductor element adjacent to each other in the core insulating layer via vias;
And a thermoelectric module including the thermoelectric module.
15. The method of claim 14,
Wherein the forming of the plurality of pairs of semiconductor elements comprises a post-printing firing step.
Preparing a glass fiber fabric;
Printing an N-type semiconductor material and a P-type semiconductor material on the glass fiber fabric to form a plurality of pairs of N-type semiconductor elements and P-type semiconductor elements that are alternately arranged and imprinted on the glass fiber fabric;
Filling a core insulating layer in a void space of a glass fiber fabric formed with a plurality of pairs of semiconductor elements; And
Forming a circuit layer including a plurality of electrode patterns connecting the N-type semiconductor element and the P-type semiconductor element adjacent to each other on both sides of the glass fiber fabric filled with the core insulating layer;
And a thermoelectric module including the thermoelectric module.
18. The method of claim 16,
Wherein the forming of the plurality of pairs of semiconductor elements comprises a post-printing firing step.
18. The method of claim 16,
Further comprising the step of planarizing the core insulating layer such that the surface of the N-type semiconductor element and the P-type semiconductor element are exposed after the step of filling the core insulating layer.
18. The method of claim 16,
Further comprising the step of forming a build-up layer on the circuit layer, the build-up layer including a build-up insulation layer and a build-up circuit layer.
A plurality of pairs of N-type semiconductor elements and P-type semiconductor elements alternately arranged and impregnated in said glass fiber fabric, and a plurality of pairs of said semiconductor element pairs are formed on both sides of a glass fiber fabric impregnated with a pair of said semiconductor elements, A substrate having a thermoelectric module including a circuit layer including a plurality of electrode patterns connecting an adjacent N-type semiconductor element and a P-type semiconductor element, and a core insulating layer filled in an empty space of the glass fiber fabric in which the circuit layer is formed; And
An electronic component mounted on the substrate;
/ RTI >
Wherein the electronic component is connected to and mounted on a cooling part of the thermoelectric module.
The method of claim 20,
Wherein the substrate further comprises a buildup layer including a buildup insulation layer and a buildup circuit layer formed on the core insulation layer and a plurality of heat radiation vias connected to the electrode pattern and extending outermost of the buildup layer, package.
23. The method of claim 21,
Wherein the heat dissipation via is interposed between the electrode pattern and the electronic component.
23. The method of claim 21,
Wherein the core insulating layer and the build-up insulating layer comprise a polyimide resin.

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