KR20160046506A - Light emitting device and light emitting device package - Google Patents

Abstract

Provided are a light emitting device and a light emitting device package. The light emitting device disclosed in embodiments includes: a first conductive semiconductor layer; a second conductive semiconductor layer disposed on the first conductive semiconductor layer; an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer and including a plurality of quantum well layers and quantum barrier layers; and a superlattice layer disposed between the first conductive semiconductor layer and the active layer. The superlattice layer includes at least three superlattice layers between the first conductive layer and the active layer. Each of the at least three superlattice layers is periodically arranged with at least two different layers. At least one layer of the at least two different layers has a composition of aluminum, and a superlattice layer adjacent to the active layer among the at least three superlattice layers has a composition of aluminum higher than the composition of aluminum of the other superlattice layers and has a period of 50% or more based on a total period of the superlattice layers.

Description

[0001] LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE [0002]

Embodiments relate to a light emitting device and a light emitting device package.

A light emitting diode (LED) is a light emitting element that converts current into light. Recently, light emitting diodes have been increasingly used as a light source for displays, a light source for automobiles, and a light source for illumination because the luminance gradually increases.

A high output light emitting chip capable of realizing full color by generating short wavelength light such as blue or green has been developed. By applying a phosphor that absorbs a part of the light output from the light emitting chip and outputs a wavelength different from the wavelength of the light, the light emitting diodes of various colors can be combined and a light emitting diode emitting white light can be realized Do.

The embodiment provides a light emitting device having a plurality of superlattice layers in an area adjacent to the active layer.

The embodiment provides a light emitting device having at least three superlattice layers between an active layer and a first conductivity type semiconductor layer.

Embodiments provide a light emitting device capable of improving current diffusion and strain by disposing at least three superlattice layers having different periods under the active layer.

A light emitting device according to an embodiment includes: a first conductive semiconductor layer; A second conductive semiconductor layer disposed on the first conductive semiconductor layer; An active layer including a plurality of quantum well layers and a plurality of quantum barrier layers between the first conductive semiconductor layer and the second conductive semiconductor layer; And a superlattice layer disposed between the first conductive semiconductor layer and the active layer, wherein the superlattice layer includes at least three superlattice layers between the first conductivity type semiconductor layer and the active layer, Wherein at least two of the at least three superlattice layers are periodically arranged, and at least one of the at least two different layers has a composition of aluminum, and of the at least three superlattice layers, Has a composition of aluminum higher than that of other superlattice layers and a period of 50% or more of the entire period of the superlattice layer.

In the embodiment, a plurality of superlattice layers may be disposed under the active layer to block the propagated potential.

The embodiment can diffuse the supplied current.

The embodiment can improve the strain transferred to the active layer.

Embodiments can improve the brightness and yield.

The embodiment can improve the internal quantum efficiency of the active layer.

Embodiments can improve the reliability of the light emitting device and the light emitting device package having the same.

1 is a cross-sectional view of a light emitting device according to a first embodiment.
2 is a detailed configuration diagram of an active layer and a superlattice layer of the light emitting device of FIG.
3 is an energy band diagram of the superlattice layer and the active layer of FIG.
4 is a cross-sectional view of a light emitting device according to a second embodiment.
FIG. 5 is an energy band diagram of the superlattice layer, the first semiconductor layer, and the active layer in FIG.
6 is an example in which electrodes are arranged in the light emitting device of Fig.
7 is another example in which electrodes are arranged in the light emitting element of Fig.
8 is a light emitting device package having the light emitting element of Fig.
FIG. 9 is a table comparing the currents, voltages, outputs, and peak wavelengths of the light emitting device according to the comparative example and the first embodiment.

Hereinafter, a light emitting device according to an embodiment will be described in detail with reference to the accompanying drawings. In the description of the embodiments, it is to be understood that each layer (film), region, pattern or structure may be formed "on" or "under" a substrate, each layer The terms " on "and " under " include both being formed" directly "or" indirectly " Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings.

FIG. 1 is a cross-sectional view of a light emitting device according to an embodiment, FIG. 2 is a detailed structural view of an active layer and a superlattice layer of the light emitting device of FIG. 1, and FIG. 3 is an energy band diagram of the superlattice layer and the active layer of FIG.

1 to 3, a light emitting device 100 includes a substrate 111, a buffer layer 113, a low conductivity layer 115, a first conductive semiconductor layer 117, a plurality of superlattice layers 120, 118, 119 and 121, an active layer 123, and a second conductive semiconductor layer 124.

The substrate 111 may be made of a light-transmitting, insulating, or conductive substrate. For example, the substrate 111 may be made of a material such as sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, Ga ₂ O ₃ , At least one of LiGaO ₃ may be used. A plurality of protrusions 112 may be formed on the upper surface of the substrate 111. The plurality of protrusions 112 may be formed by etching the substrate 111 or may be formed of a different material. The protrusion 112 may include a stripe shape, a hemispherical shape, or a dome shape.

A plurality of compound semiconductor layers may be grown on the substrate 111. The plurality of compound semiconductor layers may be grown using an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD) A dual-type thermal evaporator, a sputtering method, a metal organic chemical vapor deposition (MOCVD) method, and the like.

The buffer layer 113 may be disposed on the substrate 111. The buffer layer 113 may be formed of at least one layer using Group II to VI compound semiconductors. The buffer layer 113 includes a semiconductor layer using a Group III-V compound semiconductor, for example, In _x Al _y Ga _1-xy N (0? _X? 1, 0? Y? 1), and includes at least one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. The buffer layer 113 may have a superlattice structure in which different semiconductor layers are alternately arranged.

The buffer layer 113 is a layer for reducing the difference in lattice constant between the substrate 111 and the nitride-based semiconductor layer, and may be defined as a defect control layer. The lattice constant of the buffer layer 113 may have a value between the lattice constant of the substrate 111 and the lattice constant of the nitride semiconductor layer. The buffer layer 113 may be formed of an oxide-based material such as a ZnO layer, but is not limited thereto.

The low conductivity layer 115 may be disposed on the buffer layer 113. The low conductivity layer 115 is an undoped semiconductor layer having conductivity lower than that of the first conductivity type semiconductor layer 117. The low conductivity layer 115 may be formed of a Group III-V compound semiconductor, and the undoped semiconductor layer may have a first conductivity type property without intentionally doping a conductive dopant. Either or both of the buffer layer 113 and the low-conductivity layer 115 may not be formed, but the present invention is not limited thereto.

The first conductive semiconductor layer 117 may be disposed on the low conductivity layer 115, the buffer layer 113, or the substrate 111. The first conductive type semiconductor layer 117 includes a Group III-V compound semiconductor doped with a first conductive type dopant. For example, In _x Al _y Ga _1-xy N (0? X? 1, 0? _Y 1, 0? X + y? 1). When the first conductivity type semiconductor layer 117 is an n-type semiconductor layer, the first conductivity type dopant is an n-type dopant including Si, Ge, Sn, Se, and Te. The first conductive semiconductor layer 117 may be an electrode contact layer contacting the electrode.

The superlattice layer 120 may be disposed on the first conductive semiconductor layer 117. The superlattice layer 120 may be disposed between the first conductive semiconductor layer 117 and the active layer 123. The superlattice layer 120 may be in contact with the first conductive semiconductor layer 117 and the active layer 123. The superlattice layer 120 may include a plurality of, for example, at least three superlattice layers. The at least three superlattice layers may comprise superlattice layers having different periods. Adjacent ones of the at least three superlattice layers may be disposed in contact with each other. The adjacent superlattice layers may be continuously arranged on the first conductive semiconductor layer 117. The period of the superlattice layer 121 adjacent to the active layer 123 among the at least three superlattice layers may be disposed at 50% or more of the entire period of the superlattice layer 120. It is possible to prevent the forward voltage from rising due to the period of the superlattice layer 120 and improve the injection efficiency of the carrier. Also, the superlattice layer adjacent to the active layer 123 among the at least three superlattice layers may have a greater number of periods. The super lattice layer 123 adjacent to the active layer 123 among the at least three super lattice layers may have a higher composition of aluminum.

The superlattice layer 120 includes, for example, first, second and third superlattice layers 118, 119 and 121. The first superlattice layer 118 is disposed between the first conductive semiconductor layer 117 and the active layer 123 and the second superlattice layer 119 is disposed between the first superlattice layer 118 and the active layer 123. [ 123, and the third superlattice layer 121 is disposed between the second superlattice layer 119 and the active layer 123. The first superlattice layer 118 is disposed adjacent to the first conductive semiconductor layer 117 and the third superlattice layer 121 is disposed adjacent to the active layer 123.

At least two layers 51 / 53,61 / 63,71 / 73 are periodically arranged in the first through third super lattice layers 118, 119 and 121, respectively. The first superlattice layer 118 may have one period of at least two layers 51 and 53 different from each other and the second superlattice layer 119 may include at least two layers 61 and 63, And the third superlattice layer 121 may be a period of at least two layers 71 and 73 different from each other. For example, the first superlattice layer 118 may be periodically repeated, for example, a pair of first and second layers 51 and 53, and the second superlattice layer 119 may be formed, for example, The pair of fourth layers 61 and 63 is periodically repeated, and the third superlattice layer 121 is periodically repeated, for example, the pair of the fifth and sixth layers 71 and 73.

The period of the second superlattice layer 119 may be greater than the period of the first superlattice layer 118 and the period of the third superlattice layer 121 may be greater than the period of the second superlattice layer 119 . In other words, the third superlattice layer 121 adjacent to the active layer 123 may have a larger number of periods than the first to third superlattice layers 118, 119, and 121, The first superlattice layer 118 may have a smaller periodicity. The period of the third superlattice layer 121 may be greater than the sum of the periods of the first and second superlattice layers 118 and 119.

The third superlattice layer 121 may include at least 50% of the period of the superlattice layer 120, for example, 50% to 80% of the period of the superlattice layer 120, When the period of the grating layer 120 exceeds 80%, there is a problem that the forward voltage increases. When the period of the grating layer 120 is less than 50%, the carrier injection efficiency may decrease. The period of the third superlattice layer 121 may be 15 or more and 18 or less in consideration of the forward voltage and the carrier injection efficiency. By setting the period of the third superlattice layer 121 to 50% or more of the period of the superlattice layer 120, the injection efficiency of the carrier can be improved and the effect of preventing the forward voltage from rising can be obtained .

At least one of the two layers 51/53, 61/63, 71/73 may be formed of AlGaN in each of the first to third superlattice layers 118, 119 and 121. As the third superlattice layer 121 adjacent to the active layer 123 among the first through third super lattice layers 118, 119, and 121, the composition of aluminum of the AlGaN may be higher.

The first layer 51 of the first superlattice layer 118 comprises AlGaN and the second layer 53 comprises one of InGaN, InAlGaN, and GaN. The third layer 61 of the second superlattice layer 119 includes AlGaN and the fourth layer 63 includes one of InGaN, InAlGaN, and GaN. The fifth layer 71 of the third superlattice layer 121 includes AlGaN and the sixth layer 73 includes any one of InGaN, InAlGaN, and GaN. Each of the first through third superlattice layers 118, 119, and 121 may include, for example, a pair of AlGaN / InGaN.

The aluminum composition of the first layer 51, the third layer 61 and the fifth layer 71 includes different compositions. For example, the composition of the aluminum of the fifth layer 71 adjacent to the active layer 123 is Can be formed higher than the other layers (51, 61). Wherein the aluminum composition of the third layer (61), (Al _c) is the first aluminum composition of the first layer 51, the aluminum composition of (Al _a), the fifth layer 71 is higher than that of (Al _c) is the third Layer 61 may be formed higher than the aluminum composition of the layer 61. That is, the composition of aluminum has a relationship of 0 <Al _a <Al _b <Al _c , and the composition (Al _c ) of aluminum in the fifth layer 71 is the same as that of the quantum barrier layer 83 of the active layer 123 In the case of an AlGaN-based semiconductor, it may be formed to be lower than the aluminum composition of the quantum barrier layer 83. The aluminum composition of the first through third superlattice layers 118, 119, and 121 may be lower than the aluminum composition of the quantum barrier layer 83 for electron injection efficiency. By providing the aluminum composition of the third superlattice layer 121 adjacent to the active layer 123 at a high level, resistance due to high current can be enhanced and defects due to the difference in lattice constant can be blocked.

Each of the first to third superlattice layers 118, 119 and 121 may include at least one of the two layers doped with an n-type dopant and the other layer may be an undoped layer. The layer doped with the n-type dopant may include AlGaN. For example, the first, third and fifth layers (51, 61, 71) comprise a first conductive dopant such as an n-type dopant and the second, fourth and sixth layers The n-type and p-type dopants may be undoped or doped at a dopant concentration lower than the dopant concentration of the first, third, and fifth layers (51, 61, 71). Accordingly, the current input to the superlattice layer 120 may be diffused by the second, fourth, and sixth layers 53, 63, and 73, and electrons may be diffused by the second, fourth, and sixth layers 53, ). &Lt; / RTI &gt; The first to third superlattice layers 118, 119, and 121 may alternately arrange two different layers 51/53, 61/63, and 71/73 having different dopant concentrations to diffuse the current, Voltage and yield can be improved.

Each of the first to sixth layers 51/53, 61/63 and 71/73 may be arranged to have a thickness ranging from 1 nm to 5 nm, for example, a thickness ranging from 2 nm to 2.5 nm, When the thickness of the layer 51/53, 61/63, 71/73 is less than 1 nm, current diffusion and strain control are difficult, and when the thickness is more than 5 nm, electrons may not be tunneled and carrier injection efficiency may be lowered. The thickness of the superlattice layer 120 may be set in a range of 80 to 150 nm considering the thickness of each layer 51, 53, 61, 63, 71, and 73. If the thickness is less than the above range, Strain control is difficult, and when the thickness is exceeded, the injection efficiency of the carrier may be lowered.

Referring to FIGS. 2 and 3, the third layer 61 of the second superlattice layer 119 has an energy band gap B4 that is greater than the energy band gap B4 of the first layer 51 of the first superlattice layer 118 And the energy band gap B5 of the fifth layer 61 of the third superlattice layer 121 may be greater than the energy band gap B3 of the first layer 51 and the third layer 61 Can be wider than the energy bandgap (B3, B4). The second, fourth, and sixth layers 53, 63, and 73 of the first through third superlattice layers 118, 119, and 121 may have the same energy band gap B6, but are not limited thereto. The first, third and fifth layers 51, 61 and 71 are provided with a wide energy bandgap in the layer 71 adjacent to the active layer 123, thereby reducing strain and improving current diffusion, Lt; / RTI &gt;

The last sixth layer 73A adjacent to the active layer 123 among the plurality of sixth layers 73 of the third superlattice layer 121 may be a sixth layer 73 having different thicknesses, 51, 53, 61, 63, 71, respectively. This allows the thickness of the last sixth layer 73A to be thicker than that of the other layers, so that the distance between the quantum well layer 81 and the fifth layer 71 having a dopant can be spaced apart, . As the layer 71 doped with the n-type dopant is adjacent to the quantum well layer 81, the injection efficiency of the carrier is increased to improve the luminous intensity and the forward voltage, but a leakage current can be generated, Degradation and lowering of yield due to low current.

The active layer 123 is disposed between the superlattice layer 120 and the second conductive semiconductor layer 124. The bottom surface of the active layer 123 may be in contact with the superlattice layer 120, for example, in contact with the third superlattice layer 121. The active layer 123 may be formed of multiple quantum wells (MQW), and may include at least one of a quantum wire structure and a quantum dot structure. The quantum well layer 81 and the quantum barrier layer 83 are alternately arranged in the active layer 123 and the pair of the quantum well layer 81 and the quantum barrier layer 83 are formed in two to 30 cycles . The quantum well layer 81 may be formed of a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0? X? 1, 0? _Y? 1, 0? _X + y? 1) have. 3, the quantum barrier layer 83 is a semiconductor layer having an energy band gap B1 that is wider than the energy band gap B2 of the quantum well layer 81, for example, In _x Al _y Ga _1-xy N (0? X? 1, 0? Y? 1, 0? X + y? 1). The pair of the quantum well layer 81 and the quantum barrier layer 83 includes at least one of InGaN / GaN, GaN / AlGaN, InGaN / AlGaN, InGaN / InGaN, InAlGaN / InAlGaN and InGaN / InAlGaN. The pair of the quantum well layer 81 and the quantum barrier layer 83 may be formed of an InGaN / AlGaN pair for the superlattice layer 120.

The active layer 123 may include an intermediate barrier layer 82 between the quantum well layer 81 and the quantum barrier layer 83. The intermediate barrier layer 82 has an energy band gap that is wider than the energy band gap B2 of the quantum well layer 81 and has an energy band gap narrower than the energy band gap B1 of the quantum barrier layer 83 . The intermediate barrier layer 82 may or may not be formed of GaN.

The active layer 123 may selectively emit light within a wavelength range of an ultraviolet band to a visible light band, and may include at least one of an ultraviolet wavelength, a blue wavelength, a green wavelength, and a red wavelength.

An electron blocking layer may further be disposed between the active layer 123 and the second conductive semiconductor layer 124, but the present invention is not limited thereto.

The second conductive semiconductor layer 124 may be disposed on the active layer 123. The second conductive semiconductor layer 124 may include a dopant of a second conductivity type. The second conductive semiconductor layer 124 may be formed of any one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. When the second conductive semiconductor layer 124 is a p-type semiconductor layer, the second conductive dopant may include Mg, Zn, Ca, Sr, and Ba as p-type dopants.

The semiconductor structure from the first conductive semiconductor layer 117 to the second conductive semiconductor layer 124 may be defined as a light emitting structure 150. Also, the conductive type of the layers of the light emitting structure 150 may be reversely formed, and the light emitting structure 150 may be formed of any one of an np junction structure, a pn junction structure, an npn junction structure, and a pnp junction structure. In the np and pn junctions, an active layer is disposed between two layers, and an npn junction or a pnp junction includes at least one active layer between three layers.

4 and 5 are views showing a second embodiment. FIG. 4 is a view showing a light emitting device according to a second embodiment, and FIG. 5 is an energy band diagram of the superlattice layer and the active layer of FIG. In describing the second embodiment, the same configuration as that of the first embodiment will be described with reference to the description of the first embodiment.

4 and 5, the light emitting device includes a substrate 111, a buffer layer 113, a low conductive layer 115, a first conductive semiconductor layer 117, a plurality of superlattice layers 120, 118, 119, and 121, A first semiconductor layer 122, an active layer 123, and a second conductivity type semiconductor layer 124.

The first semiconductor layer 122 is disposed between the superlattice layer 120 and the active layer 123. The first semiconductor layer 122 may be in contact with the last sixth layer 73A of the superlattice layer 120 and the quantum well layer 81 of the active layer 123. [ The first semiconductor layer 122 satisfies a composition formula of an undoped semiconductor, for example, In _x Al _y Ga _(1-xy) N, where x and y satisfy the following formula: 0? X <Qw and 0? Respectively. Qw is the indium composition of the quantum well layer 81, and Qb is the aluminum composition of the quantum barrier layer 83. The first semiconductor layer 122 may include AlGaN and the Al composition of the AlGaN may be lower than the Al composition of the AlGaN of the superlattice layer adjacent to the active layer 123, have. The undoped first semiconductor layer 122 is disposed between the superlattice layer 120 and the quantum well layer 81 of the active layer 123 to form the quantum well layer 81 of the active layer 123 and the n- And the distance between the fifth layer 71 doped with the dopant may be spaced apart. Accordingly, the generation of leakage current can be suppressed, and the yield by the output of the light emitting element and the low current can be improved.

The first semiconductor layer 122 may be formed of a different material from the final sixth layer 73A of the third superlattice layer 121. [ The energy band gap B7 of the first semiconductor layer 122 may be wider than the energy band gap B6 of the last sixth layer 73A and narrower than the energy band gap B6 of the fifth layer 71 have. The first semiconductor layer 122 may be disposed between the superlattice layer 120 and the active layer 123 to suppress the generation of a leakage current.

Meanwhile, FIG. 9 compares the current, voltage, output, and peak wavelength of the light emitting device according to the first embodiment described above.

Referring to FIG. 9, the comparative example is an example in which a super lattice layer having 30 pairs of GaN / InGaN pairs is disposed between the active layer and the first conductivity type semiconductor layer. Comparing the first embodiment (Example 1) and the comparative example as shown in Fig. 9, the reverse current Ir is lowered, the reverse voltage Vr is increased, and the forward voltage Vf1 , Vf2 and Vf3 are decreased and the output Po and the peak wavelength Wp are increased. That is, it can be seen that the above experimental data of Example 1 is improved as compared with Comparative Example. In particular, it can be seen that the output Po of the embodiment 1 is improved by 17% or more as compared with the comparative example.

6 is an example of a light emitting device having a horizontal electrode structure using the light emitting device of FIG.

6, the light emitting device 101 includes an electrode layer 141 and a second electrode 145 formed on a light emitting structure 150. A first electrode 143 is formed on the first conductive semiconductor layer 117, .

The electrode layer 141 may be formed of a material having permeability and electrical conductivity as a current diffusion layer. The electrode layer 141 may have a refractive index lower than the refractive index of the compound semiconductor layer.

The electrode layer 141 is formed on the upper surface of the second conductivity type semiconductor layer 124, and the material includes at least one of a metal oxide, a metal nitride, and a metal. The electrode layer 141 may be formed of a metal such as ITO (indium tin oxide), IZO (indium zinc oxide), IZTO (indium zinc tin oxide), IAZO (indium aluminum zinc oxide), IGZO tin oxide, AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), ZnO, IrOx, RuOx, NiO and the like. The electrode layer 141 may be formed of a reflective electrode layer, for example, Al, Ag, Pd, Rh, Pt, Ir, or an alloy of two or more thereof.

The second electrode 145 may be formed on the second conductive semiconductor layer 124 and / or the electrode layer 141, and may include an electrode pad. The second electrode 145 may further have a current diffusion pattern of an arm structure or a finger structure. The second electrode 145 may be made of a metal having the characteristics of an ohmic contact, an adhesive layer, and a bonding layer, but is not limited thereto.

A first electrode (143) is formed on a part of the first conductive type semiconductor layer (117). The first electrode 143 and the second electrode 145 may be formed of a metal such as Ti, Ru, Rh, Ir, Mg, Zn, Al, In, Ta, Pd, Co, Ni, Si, Can be selected from among the optional alloys.

An insulating layer may further be formed on the surface of the light emitting device 101. The insulating layer may prevent a short between layers of the light emitting structure 150 and prevent moisture penetration.

FIG. 7 shows an example of a light emitting device 102 having a vertical electrode structure using the light emitting device of FIG.

Referring to FIG. 7, a current blocking layer 161, a channel layer 163, and a second electrode 170 are disposed under the light emitting structure 150. The current blocking layer 161 may include at least one of a metal oxide or a metal nitride such as SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO ₂ , (163).

The current blocking layer 161 is disposed to correspond to the first electrode 181 disposed on the light emitting structure 117 and the thickness direction of the light emitting structure 150. The current blocking layer 161 may cut off current supplied from the second electrode 170 and diffuse the current blocking layer 161 to another path.

The channel layer 163 is formed along the bottom edge of the second conductive semiconductor layer 124, and may be formed in a ring shape, a loop shape, or a frame shape. The channel layer 163 is an ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, SiO 2, SiO x, SiO x N y, Si 3 N 4, Al 2 O 3, TiO at least one of the ₂ . The inner side of the channel layer 163 is disposed below the second conductive semiconductor layer 124 and the outer side of the channel layer 163 is located further outward than the side surface of the light emitting structure 150.

A second electrode 170 may be formed under the second conductive semiconductor layer 124. The second electrode 170 may include a plurality of conductive layers 165, 167, and 169.

The second electrode 170 includes a contact layer 165, a reflective layer 167, and a bonding layer 169. The contact layer 165 may be a low-conductivity material or a transparent material. The contact layer 15 may be made of a material such as ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, or Ni or Ag. A reflective layer 167 is formed under the contact layer 165 and the reflective layer 167 is formed of a metal such as Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, And at least one layer made of a material selected from the group consisting of combinations. The reflective layer 167 may be in contact with the second conductive semiconductor layer 124, and may be in ohmic contact with a metal or ohmic contact with a conductive material such as ITO. However, the reflective layer 167 is not limited thereto.

A bonding layer 169 is formed under the reflection layer 167 and the bonding layer 169 may be used as a barrier metal or a bonding metal. The material may be Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, and Ta and an optional alloy.

A support member 173 is formed under the bonding layer 169 and the support member 173 may include a conductive member such as copper-copper, gold-gold, nickel (Ni-nickel), molybdenum (Mo), copper-tungsten (Cu-W), and carrier wafers (e.g., Si, Ge, GaAs, ZnO, SiC and the like). As another example, the support member 173 may be embodied as a conductive sheet or an insulating member. The outer side of the bonding layer 169 may contact the lower surface of the channel layer 163, but the present invention is not limited thereto.

Here, the substrate of FIG. 1 is removed. The growth substrate may be removed by a physical method such as laser lift off or chemical method such as wet etching to expose the first conductivity type semiconductor layer 117. The first electrode 181 is formed on the first conductive type semiconductor layer 117 by performing the isolation etching through the direction in which the substrate is removed.

The upper surface of the first conductive semiconductor layer 117 may be formed with a light extraction structure 117A such as a roughness. The outer side of the channel layer 163 may be exposed outside the sidewalls of the light emitting structure 150 and the inner side of the channel layer 163 may contact the bottom surface of the second conductive semiconductor layer 124.

The light emitting device 102 having the vertical electrode structure having the first electrode 181 and the lower supporting member 173 on the light emitting structure 150 can be manufactured.

8 is a view showing a light emitting device package having the light emitting device of FIG.

8, the light emitting device package 200 includes a body 210, a first lead electrode 211 and a second lead electrode 212 at least partially disposed on the body 210, The light emitting device 101 described above is electrically connected to the first lead electrode 211 and the second lead electrode 212 on the substrate 210. The light emitting device 101 surrounds the light emitting device 101 on the body 210, (Not shown).

The body 210 may be formed of a silicon material, a synthetic resin material, or a metal material. The body 210 includes a reflective portion 215 having a cavity and an inclined surface around the body.

The first lead electrode 211 and the second lead electrode 212 are electrically separated from each other and may be formed to penetrate the inside of the body 210. That is, some of the first lead electrode 211 and the second lead electrode 212 may be disposed inside the cavity, and other portions may be disposed outside the body 210.

The first lead electrode 211 and the second lead electrode 212 may supply power to the light emitting device 101 and may reflect light generated from the light emitting device 101 to increase light efficiency, And may also function to discharge heat generated in the light emitting device 101 to the outside.

The light emitting device 101 may be mounted on the body 210 or on the first lead electrode 211 and / or the second lead electrode 212.

The wire 216 of the light emitting device 101 may be electrically connected to any one of the first lead electrode 211 and the second lead electrode 212, but is not limited thereto.

The molding member 220 surrounds the light emitting device 101 to protect the light emitting device 101. In addition, the molding member 220 may include a phosphor, and the wavelength of the light emitted from the light emitting device 101 may be changed by the phosphor.

The light emitting device or the light emitting device package according to the embodiment can be applied to a light unit. The light unit includes a structure in which a plurality of light emitting devices or light emitting device packages are arrayed, and may include an illumination light, a traffic light, a vehicle headlight, an electric signboard, and the like.

The features, structures, effects and the like described in the embodiments are included in at least one embodiment of the present invention and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects and the like illustrated in the embodiments can be combined and modified by other persons skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of illustration, It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

111: substrate 113: buffer layer
115: Low conduction layer 117: First conduction type semiconductor layer
118: first superlattice layer 119: second superlattice layer
120: superlattice layer 121: third superlattice layer
122: first semiconductor layer 123: active layer
124: second conductive type semiconductor layer

Claims (15)

A first conductive semiconductor layer;
A second conductive semiconductor layer disposed on the first conductive semiconductor layer;
An active layer including a plurality of quantum well layers and a plurality of quantum barrier layers between the first conductive semiconductor layer and the second conductive semiconductor layer; And
And a superlattice layer disposed between the first conductive semiconductor layer and the active layer,
Wherein the superlattice layer includes at least three superlattice layers between the first conductive semiconductor layer and the active layer,
Wherein at least two superlattice layers of at least three different layers are periodically arranged,
Wherein at least one of the at least two different layers has a composition of aluminum,
Wherein the superlattice layer adjacent to the active layer among the at least three superlattice layers has a composition of aluminum higher than that of other superlattice layers and a period of at least 50% of the entire period of the superlattice layer. The method according to claim 1,
Wherein the superlattice layer comprises first through third superlattice layers successively arranged with different periods. 3. The method of claim 2,
Wherein the first to third superlattice layers have a higher periodicity as the superlattice layer adjacent to the active layer. 3. The method of claim 2,
Wherein each of the first through third superlattice layers includes AlGaN having different compositions of aluminum. 5. The method of claim 4,
Wherein the first to third superlattice layers have a higher aluminum composition of AlGaN as the superlattice layer adjacent to the active layer. 6. The method according to any one of claims 2 to 5,
And each of the first through third superlattice layers has a pair of AlGaN / InGaN. 6. The method according to any one of claims 2 to 5,
Wherein each of the first through third superlattice layers has an n-type dopant in any one of the at least two layers. 8. The method of claim 7,
And the first to third superlattice layers are undoped layers of any one of the at least two layers. 9. The method of claim 8,
Wherein one layer having the n-type dopant is AlGaN. The method according to claim 4 or 5,
Wherein a composition of aluminum of AlGaN of the third superlattice layer is smaller than a composition of aluminum of the quantum barrier layer. The method according to claim 4 or 5,
And the third superlattice layer adjacent to the active layer is undoped, wherein at least two of the layers adjacent to the active layer have a thickness greater than that of the other layers. 6. The method according to any one of claims 1 to 5,
And a first semiconductor layer undoped between the active layer and the superlattice layer. 13. The method of claim 12,
Wherein the first semiconductor layer has a composition formula of In _x Al _y Ga _(1-xy) N, x is smaller than an indium composition value of a quantum well layer of the active layer, y is a composition value of aluminum of the quantum barrier layer Lt; / RTI &gt; 13. The method of claim 12,
Wherein the first semiconductor layer comprises AlGaN,
Wherein an aluminum composition of the first semiconductor layer is lower than a composition of aluminum of a superlattice layer adjacent to the active layer. 6. The method according to any one of claims 1 to 5,
Wherein the superlattice layer adjacent to the active layer has a period of 15 to 18 periods.

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