KR102175346B1 - Light emitting device and light emitting device package - Google Patents

Abstract

The light emitting device disclosed in the embodiment includes a first conductive type semiconductor layer; A second conductive type semiconductor layer disposed on the first conductive type semiconductor layer; An active layer including a plurality of quantum well layers and a plurality of quantum barrier layers between the first conductive type semiconductor layer and the second conductive type semiconductor layer; And a superlattice layer disposed between the first conductive semiconductor layer and the active layer, wherein the superlattice layer includes at least three superlattice layers between the first conductive semiconductor layer and the active layer, the Each of the at least three superlattice layers has at least two different layers periodically arranged, at least one of the different at least two layers has a composition of aluminum, and a superlattice layer adjacent to the active layer among the at least three superlattice layers The composition of silver aluminum is higher than that of other super lattice layers and has a period of 50% or more of the total period of the super lattice layer.

Description

Light emitting device and light emitting device package {LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE}

The embodiment relates to a light emitting device and a light emitting device package.

Light Emitting Diode (LED) is a light emitting device that converts current into light. Recently, light emitting diodes have been increasingly used as light sources for display, light sources for automobiles, and light sources for lighting as the luminance gradually increases.

A high-power light emitting chip capable of realizing full color by generating short wavelength light such as blue or green has been developed. Accordingly, by applying a phosphor that absorbs a part of the light output from the light-emitting chip and outputs a wavelength different from that of the light on the light-emitting chip, light-emitting diodes of various colors can be combined and light-emitting diodes emitting white light can also be implemented. Do.

The embodiment provides a light emitting device having a plurality of superlattice layers in a region adjacent to an active layer.

The embodiment provides a light emitting device having at least three superlattice layers between an active layer and a first conductive semiconductor layer.

The embodiment provides a light emitting device capable of improving current diffusion and strain by disposing at least three superlattice layers having different periods under an active layer.

A light emitting device according to an embodiment includes: a first conductive type semiconductor layer; A second conductive type semiconductor layer disposed on the first conductive type semiconductor layer; An active layer including a plurality of quantum well layers and a plurality of quantum barrier layers between the first conductive type semiconductor layer and the second conductive type semiconductor layer; And a superlattice layer disposed between the first conductive semiconductor layer and the active layer, wherein the superlattice layer includes at least three superlattice layers between the first conductive semiconductor layer and the active layer, the Each of the at least three superlattice layers has at least two different layers periodically arranged, at least one of the different at least two layers has a composition of aluminum, and a superlattice layer adjacent to the active layer among the at least three superlattice layers The composition of silver aluminum is higher than that of other super lattice layers and has a period of 50% or more of the total period of the super lattice layer.

According to the embodiment, a plurality of superlattice layers may be disposed under the active layer to block propagating potential.

The embodiment may diffuse the supplied current.

The embodiment may improve the strain transmitted to the active layer.

Embodiments can improve light intensity and yield.

The embodiment may improve the internal quantum efficiency of the active layer.

The embodiment may improve the reliability of a light emitting device and a light emitting device package including the same.

1 is a cross-sectional view of a light emitting device according to a first embodiment.
2 is a detailed configuration diagram of an active layer and a super lattice layer of the light emitting device of FIG. 1.
3 is an energy band diagram of the superlattice layer and the active layer of FIG. 1.
4 is a cross-sectional view of a light emitting device according to a second embodiment.
5 is an energy band diagram of the superlattice layer, the first semiconductor layer, and the active layer of FIG. 4.
6 is an example in which electrodes are disposed in the light emitting device of FIG. 1.
7 is another example of disposing electrodes in the light emitting device of FIG. 1.
8 is a light emitting device package having the light emitting device of FIG. 7.
9 is a table comparing the relationship between current, voltage, output, and peak wavelength of the light emitting device according to the comparative example and the first embodiment.

Hereinafter, a light emitting device according to an embodiment will be described in detail with reference to the accompanying drawings. In the description of the embodiment, each layer (film), region, pattern, or structure is formed in "on" or "under" of the substrate, each layer (film), region, pad or patterns When described as being "on" and "under", both "directly" or "indirectly" are formed. In addition, standards for the top/top or bottom of each layer will be described based on the drawings.

1 is a cross-sectional view of a light emitting device according to an embodiment, FIG. 2 is a detailed configuration diagram of an active layer and a superlattice layer of the light emitting device of FIG. 1, and FIG. 3 is an energy band diagram of the superlattice layer and the active layer of FIG. 1.

1 to 3, the light emitting device 100 includes a substrate 111, a buffer layer 113, a low conductivity layer 115, a first conductive semiconductor layer 117, a plurality of superlattice layers 120: 118, 119, 121), an active layer 123, and a second conductive type semiconductor layer 124.

The substrate 111 may be a light transmitting, insulating or conductive substrate, for example, sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, Ga ₂ O ₃ , At least one of LiGaO ₃ may be used. A plurality of protrusions 112 may be formed on the upper surface of the substrate 111, and the plurality of protrusions 112 may be formed through etching of the substrate 111 or may be formed of a separate material. The protrusion 112 may have a stripe shape, a hemispherical shape, or a dome shape.

A plurality of compound semiconductor layers may be grown on the substrate 111, and equipment for growing the plurality of compound semiconductor layers includes an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), and plasma laser deposition (PLD). , Dual-type thermal evaporator (dual-type thermal evaporator) sputtering (sputtering), MOCVD (metal organic chemical vapor deposition) can be formed by, but not limited to such equipment.

The buffer layer 113 may be disposed on the substrate 111. The buffer layer 113 may be formed of at least one layer using a group II to VI compound semiconductor. The buffer layer 113 includes a semiconductor layer using a group III-V compound semiconductor, for example, In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y) A semiconductor having a composition formula of? The buffer layer 113 may be formed in a super lattice structure in which different semiconductor layers are alternately arranged.

The buffer layer 113 is a layer for mitigating a difference in lattice constant between the substrate 111 and a nitride-based semiconductor layer, and may be defined as a defect control layer. The lattice constant of the buffer layer 113 may have a value between the lattice constant of the substrate 111 and the lattice constant of the nitride-based semiconductor layer. The buffer layer 113 may be formed of an oxide-based material such as a ZnO layer, but is not limited thereto.

The low conductivity layer 115 may be disposed on the buffer layer 113. The low conductivity layer 115 is an undoped semiconductor layer and has a conductivity lower than that of the first conductivity type semiconductor layer 117. The low-conductivity layer 115 may be implemented as a group III-V compound semiconductor, and the undoped semiconductor layer has first conductivity type characteristics even if it is not intentionally doped with a conductive type dopant. Any one or both of the buffer layer 113 and the low conductivity layer 115 may not be formed, but is not limited thereto.

The first conductivity type semiconductor layer 117 may be disposed on the low conductivity layer 115, the buffer layer 113, or the substrate 111. The first conductive type semiconductor layer 117 includes a group III-V compound semiconductor doped with a first conductive type dopant, for example, In _x Al _y Ga _1-xy N (0≦x≦1, 0≦y It may be formed of a semiconductor having a composition formula of ≤1, 0≤x+y≤1). When the first conductive type semiconductor layer 117 is an n-type semiconductor layer, the first conductive type dopant is an n-type dopant and includes Si, Ge, Sn, Se, and Te. The first conductive semiconductor layer 117 may be an electrode contact layer in contact with an electrode.

The super lattice layer 120 may be disposed on the first conductive type semiconductor layer 117. The super lattice layer 120 may be disposed between the first conductive semiconductor layer 117 and the active layer 123. The super lattice layer 120 may contact the first conductive semiconductor layer 117 and the active layer 123. The super-lattice layer 120 may include a plurality of, for example, at least three super-lattice layers. The at least three super-lattice layers may include super-lattice layers having different periods. Adjacent super lattice layers among the at least three super lattice layers may be disposed in contact with each other. The adjacent superlattice layers may be continuously arranged on the first conductive type semiconductor layer 117. Among the at least three super-lattice layers, a period of the super-lattice layer 121 adjacent to the active layer 123 may be disposed at 50% or more of the total period of the super-lattice layer 120. It is possible to prevent an increase in the forward voltage due to the period of the superlattice layer 120 and improve carrier injection efficiency. In addition, among the at least three super-lattice layers, a super-lattice layer adjacent to the active layer 123 may have a larger number of cycles. In addition, among the at least three super-lattice layers, the higher the super-lattice layer 123 adjacent to the active layer 123, the higher the composition of aluminum may be.

The super lattice layer 120 includes, for example, first, second, and third super lattice layers 118, 119, and 121. The first super-lattice layer 118 is disposed between the first conductive semiconductor layer 117 and the active layer 123, and the second super-lattice layer 119 is a first super-lattice layer 118 and an active layer ( 123), and the third super-lattice layer 121 is disposed between the second super-lattice layer 119 and the active layer 123. The first super lattice layer 118 is disposed adjacent to the first conductive type semiconductor layer 117, and the third super lattice layer 121 is disposed adjacent to the active layer 123.

Each of the first to third super lattice layers 118, 119, and 121 has at least two different layers 51/53, 61/63, and 71/73 periodically disposed. The first super lattice layer 118 may have at least two layers 51 and 53 different from each other in one period, and the second super lattice layer 119 may have at least two layers 61 and 63 different from each other. The third super-lattice layer 121 may have at least two different layers 71 and 73 as one period. For example, in the first super lattice layer 118, for example, a pair of first and second layers 51 and 53 is periodically repeated, and the second super lattice layer 119 is, for example, a third and The pairs of the fourth layers 61 and 63 are periodically repeated, and the third super-lattice layer 121 is, for example, a pair of the fifth and sixth layers 71 and 73 periodically repeated.

The period of the second super lattice layer 119 may be more than the period of the first super lattice layer 118, and the period of the third super lattice layer 121 may be greater than that of the second super lattice layer 119 . That is, among the first to third super-lattice layers 118, 119, and 121, the third super-lattice layer 121 adjacent to the active layer 123 may have more periods, and conversely, the first conductive type semiconductor layer 117 The period of the first super lattice layer 118 may be smaller. The period of the third super lattice layer 121 may be greater than the sum of the periods of the first and second super lattice layers 118 and 119.

The third super-lattice layer 121 may include at least 50% of the period of the super-lattice layer 120, for example, 50% to 80%, and the period of the third super-lattice layer 121 is When it exceeds 80% of the period of the lattice layer 120, there is a problem that the forward voltage increases, and when it is less than 50%, the carrier injection efficiency may decrease. The third superlattice layer 121 may have a period of 15 or more and 18 or less in consideration of the forward voltage and carrier injection efficiency. According to the embodiment, by setting the period of the third superlattice layer 121 to 50% or more of the period of the superlattice layer 120, the injection efficiency of the carrier may be improved, and there is an effect of preventing an increase in the forward voltage. .

In addition, in each of the first to third superlattice layers 118, 119, and 121, at least one of the two layers 51/53, 61/63, and 71/73 may be formed of AlGaN. Among the first to third super-lattice layers 118, 119, and 121, the third super-lattice layer 121 adjacent to the active layer 123 may have a higher aluminum composition of AlGaN.

The first layer 51 of the first superlattice layer 118 includes AlGaN, and the second layer 53 includes any one of InGaN, InAlGaN, and GaN. The third layer 61 of the second superlattice layer 119 includes AlGaN, and the fourth layer 63 includes any one of InGaN, InAlGaN, and GaN. The fifth layer 71 of the third superlattice layer 121 includes AlGaN, and the sixth layer 73 includes any one of InGaN, InAlGaN, and GaN. Each of the first to third superlattice layers 118, 119, and 121 may include, for example, a pair of AlGaN/InGaN.

The aluminum composition of the first layer 51, the third layer 61, and the fifth layer 71 is different from each other. For example, the composition of aluminum of the fifth layer 71 adjacent to the active layer 123 is It may be formed higher than the other layers 51 and 61. The aluminum composition (Al _c ) of the third layer 61 is higher than that of the first layer 51 (Al _a ), and the aluminum composition (Al _c ) of the fifth layer 71 is the third It may be formed higher than the aluminum composition of the layer 61. That is, the composition of aluminum has a relationship of 0<Al _a <Al _b <Al _c , and the composition of aluminum (Al _c ) of the fifth layer 71 is the quantum barrier layer 83 of the active layer 123 In the case of an AlGaN-based semiconductor, it may be formed lower than the aluminum composition of the quantum barrier layer 83. The aluminum composition of the first to third superlattice layers 118, 119, and 121 may be formed lower than that of the quantum barrier layer 83 for electron injection efficiency. By providing a high aluminum composition of the third superlattice layer 121 adjacent to the active layer 123, resistance due to high current may be enhanced, and defects due to differences in lattice constants may be blocked.

Each of the first to third superlattice layers 118, 119, and 121 may include at least one of the two layers doped with an n-type dopant and the other layer having an undoped layer. The layer doped with the n-type dopant may include AlGaN. For example, the first, third, and fifth layers 51, 61, and 71 include a first conductive type dopant, for example, an n-type dopant, and the second, fourth and sixth layers 53, 63, 73 The n-type and p-type dopants may be undoped or may be doped with a dopant concentration lower than that of the first, third, and fifth layers 51, 61, and 71. Accordingly, the current input to the super lattice layer 120 can be diffused by the second, fourth, and sixth layers 53,63,73, and electrons are ) Through. These first to third superlattice layers 118, 119, 121 are alternately arranged with two different layers 51/53, 61/63, and 71/73 having a difference in dopant concentration, so that current can be diffused and reverse direction. It can improve voltage and yield.

Each of the first to sixth layers 51/53, 61/63, and 71/73 may be disposed to have a thickness in the range of 1 nm to 5 nm, for example, in the range of 2 nm to 2.5 nm, and each of the first to sixth layers When the thickness of the layers 51/53, 61/63, and 71/73 is less than 1 nm, it is difficult to control current diffusion and strain, and when the thickness is more than 5 nm, electrons may not be tunneled, so carrier injection efficiency may decrease. The thickness of the super lattice layer 120 may be arranged in a range of 80 nm to 150 nm in consideration of the thickness of each layer 51, 53, 61, 63, 71, 73, and when the thickness is less than the above range, current diffusion and It is difficult to control the strain, and when the thickness is exceeded, the injection efficiency of the carrier may decrease.

2 and 3, the third layer 61 of the second super lattice layer 119 has an energy band gap B4 of the first layer 51 of the first super lattice layer 118. The energy band gap B5 may be wider than the energy band gap B3, and the energy band gap B5 of the fifth layer 61 of the third superlattice layer 121 is between the first layer 51 and the third layer 61. It may be wider than the energy band gaps B3 and B4. The second, fourth, and sixth layers 53, 63 and 73 of the first to third superlattice layers 118, 119, and 121 may have the same energy band gap B6, but the embodiment is not limited thereto. The first, third, and fifth layers 51, 61, and 71 provide an energy band gap wider as the layer 71 adjacent to the active layer 123 reduces strain and improves current diffusion, and dislocation defects Can be blocked.

Among the plurality of sixth layers 73 of the third superlattice layer 121, the last sixth layer 73A adjacent to the active layer 123 is the sixth layer 73 or the first to fifth layers having different thicknesses. It may be formed thicker than each of (51, 53, 61, 63, 71). This provides a thicker thickness of the last sixth layer 73A compared to other layers, thereby allowing the distance between the quantum well layer 81 and the fifth layer 71 with a dopant to be separated, thereby improving carrier injection efficiency. I can do it. If the n-type dopant-doped layer 71 is adjacent to the quantum well layer 81, the carrier injection efficiency is increased to improve the luminous intensity and forward voltage, but a leakage current may occur, and the output of the light emitting device. It may cause a decrease in yield and a decrease in yield due to a low current.

The active layer 123 is disposed between the superlattice layer 120 and the second conductive semiconductor layer 124. The lower surface of the active layer 123 may be in contact with the super lattice layer 120, for example, the third super lattice layer 121. The active layer 123 is formed of a multiple quantum well MQW, and may include at least one of a quantum line or a quantum dot structure therein. In the active layer 123, a quantum well layer 81 and a quantum barrier layer 83 are alternately disposed, and a pair of the quantum well layer 81 and the quantum barrier layer 83 may be formed in 2 to 30 cycles. I can. The quantum well layer 81 may be formed of, for example, a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). have. As shown in FIG. 3, the quantum barrier layer 83 is a semiconductor layer having an energy band gap B1 wider than the energy band gap B2 of the quantum well layer 81. For example, In _x Al _y Ga _1-xy N It may be formed of a semiconductor material having a composition formula of (0≤x≤1, 0≤y≤1, 0≤x+y≤1). The pair of the quantum well layer 81 and the quantum barrier layer 83 includes, for example, at least one of InGaN/GaN, GaN/AlGaN, InGaN/AlGaN, InGaN/InGaN, InAlGaN/InAlGaN, InGaN/InAlGaN. The pair of the quantum well layer 81 and the quantum barrier layer 83 may be formed of an InGaN/AlGaN pair for the superlattice layer 120.

The active layer 123 may include an intermediate barrier layer 82 between the quantum well layer 81 and the quantum barrier layer 83. The intermediate barrier layer 82 has an energy band gap wider than the energy band gap B2 of the quantum well layer 81, and has an energy band gap narrower than the energy band gap B1 of the quantum barrier layer 83. Can be formed. The intermediate barrier layer 82 may or may not be formed of GaN.

The active layer 123 may selectively emit light within a wavelength range from an ultraviolet band to a visible light band, and may include, for example, at least one of an ultraviolet wavelength, a blue wavelength, a green wavelength, and a red wavelength.

An electron blocking layer may be further disposed between the active layer 123 and the second conductive semiconductor layer 124, but the embodiment is not limited thereto.

The second conductive semiconductor layer 124 may be disposed on the active layer 123. The second conductivity type semiconductor layer 124 includes a second conductivity type dopant. The second conductive semiconductor layer 124 may be formed of any one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, and the like. When the second conductive semiconductor layer 124 is a p-type semiconductor layer, the second conductive dopant is a p-type dopant and may include Mg, Zn, Ca, Sr, Ba, and the like.

The semiconductor structure from the first conductive type semiconductor layer 117 to the second conductive type semiconductor layer 124 may be defined as a light emitting structure 150. In addition, the conductive type of the layers of the light emitting structure 150 may be formed in the opposite direction, and the light emitting structure 150 may be implemented in any one of an np junction structure, a pn junction structure, an npn junction structure, and a pnp junction structure. In the np and pn junction, an active layer is disposed between two layers, and the npn junction or pnp junction includes at least one active layer between the three layers.

4 and 5 are diagrams showing a second embodiment. 4 is a diagram illustrating a light emitting device according to a second embodiment, and FIG. 5 is an energy band diagram of the superlattice layer and the active layer of FIG. 4. In describing the second embodiment, the same configuration as the first embodiment will be described with reference to the description of the first embodiment.

4 and 5, the light emitting device includes a substrate 111, a buffer layer 113, a low conductivity layer 115, a first conductivity type semiconductor layer 117, a plurality of superlattice layers 120 (118, 119, 121), It includes a first semiconductor layer 122, an active layer 123, and a second conductive semiconductor layer 124.

The first semiconductor layer 122 is disposed between the superlattice layer 120 and the active layer 123. The first semiconductor layer 122 may contact the last sixth layer 73A of the superlattice layer 120 and the quantum well layer 81 of the active layer 123. The first semiconductor layer 122 satisfies a composition formula of an undoped semiconductor, such as In _x Al _y Ga _(1-xy) N, wherein x and y are 0≦x<Qw and 0≦y<Qb Has. Qw is the indium composition of the quantum well layer 81, and Qb is the aluminum composition of the quantum barrier layer 83. The first semiconductor layer 122 may include AlGaN, and the aluminum composition of the AlGaN may be lower than that of the AlGaN of the superlattice layer adjacent to the active layer 123, for example, the third superlattice layer 121. have. By disposing the undoped first semiconductor layer 122 between the superlattice layer 120 and the quantum well layer 81 of the active layer 123, the quantum well layer 81 of the active layer 123 and the n-type A distance between the dopant-doped fifth layers 71 may be separated. Accordingly, it is possible to suppress the occurrence of leakage current and improve the output of the light emitting device and the yield due to the low current.

The first semiconductor layer 122 may be formed of a material different from the last sixth layer 73A of the third superlattice layer 121. The energy band gap B7 of the first semiconductor layer 122 may be wider than the energy band gap B6 of the last sixth layer 73A and narrower than the energy band gap B6 of the fifth layer 71. have. The first semiconductor layer 122 is disposed between the superlattice layer 120 and the active layer 123 to suppress the occurrence of leakage current.

Meanwhile, FIG. 9 compares the current, voltage, output, and peak wavelength of the light emitting device according to the first embodiment disclosed above.

Referring to FIG. 9, in the comparative example, a superlattice layer having 30 pairs of GaN/InGaN is disposed between the active layer and the first conductive semiconductor layer. As shown in FIG. 9, when comparing the first embodiment (Example 1) and the comparative example, in Example 1, compared to the comparative example, the reverse current Ir was lowered, the reverse voltage Vr was increased, and the forward voltage Vf1 , Vf2, Vf3) decreased, and the output (Po) and peak wavelength (Wp) increased. That is, it can be seen that the experimental data of Example 1 are improved compared to the comparative example. In particular, it can be seen that the output Po of the first embodiment is improved by more than 17% compared to the comparative example.

6 is an example of a light emitting device having a horizontal electrode structure using the light emitting device of FIG. 1.

Referring to FIG. 6, in the light emitting device 101, an electrode layer 141 and a second electrode 145 are formed on a light emitting structure 150, and a first electrode 143 is formed on the first conductive semiconductor layer 117. Is formed.

The electrode layer 141 is a current diffusion layer and may be formed of a material having transmittance and electrical conductivity. The electrode layer 141 may be formed with a refractive index lower than that of the compound semiconductor layer.

The electrode layer 141 is formed on the upper surface of the second conductive semiconductor layer 124, and the material includes at least one of a metal oxide, a metal nitride, and a metal. The electrode layer 141 is, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium (IGTO). tin oxide), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), ZnO, IrOx, RuOx, NiO, etc., and may be formed in at least one layer. The electrode layer 141 may be formed as a reflective electrode layer, and the material may be selectively formed from, for example, Al, Ag, Pd, Rh, Pt, Ir, and two or more alloys thereof.

The second electrode 145 may be formed on the second conductive semiconductor layer 124 and/or the electrode layer 141, and may include an electrode pad. The second electrode 145 may further include a current diffusion pattern having an arm structure or a finger structure. The second electrode 145 may be made of a metal having characteristics of ohmic contact, an adhesive layer, and a bonding layer, and may be non-transmitting, but is not limited thereto.

A first electrode 143 is formed on a part of the first conductive semiconductor layer 117. The first electrode 143 and the second electrode 145 are Ti, Ru, Rh, Ir, Mg, Zn, Al, In, Ta, Pd, Co, Ni, Si, Ge, Ag, and Au, and their It can be selected among optional alloys.

An insulating layer may be further formed on the surface of the light emitting device 101, and the insulating layer may prevent interlayer shorts of the light emitting structure 150 and prevent moisture penetration.

FIG. 7 is an example of a light emitting device 102 having a vertical electrode structure using the light emitting device of FIG. 1.

Referring to FIG. 7, a current blocking layer 161, a channel layer 163, and a second electrode 170 are disposed under the light emitting structure 150. The current blocking layer 161 may include at least one of a metal oxide or a metal nitride such as SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO ₂ , and the channel layer At least one may be formed between (163).

The current blocking layer 161 is disposed to correspond to the first electrode 181 disposed on the light emitting structure 117 and the light emitting structure 150 in a thickness direction. The current blocking layer 161 may block the current supplied from the second electrode 170 and diffuse it to another path.

The channel layer 163 is formed along a lower surface edge of the second conductive semiconductor layer 124 and may be formed in a ring shape, a loop shape, or a frame shape. The channel layer 163 is at least one of ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO ₂ Can include. An inner portion of the channel layer 163 is disposed under the second conductive type semiconductor layer 124, and an outer portion is disposed further outside a side surface of the light emitting structure 150.

A second electrode 170 may be formed under the second conductive semiconductor layer 124. The second electrode 170 may include a plurality of conductive layers 165, 167, and 169.

The second electrode 170 includes a contact layer 165, a reflective layer 167, and a bonding layer 169. The contact layer 165 may be a low conductive material or a transparent material. The contact layer 15 may be a material such as ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, or a metal of Ni or Ag. A reflective layer 167 is formed under the contact layer 165, and the reflective layer 167 includes metals such as Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, and It may be formed in a structure including at least one layer made of a material selected from the group consisting of combinations. The reflective layer 167 may be in contact under the second conductive semiconductor layer 124 and may be in ohmic contact with a metal or a low-conducting material such as ITO, but is not limited thereto.

A bonding layer 169 is formed under the reflective layer 167, and the bonding layer 169 may be used as a barrier metal or a bonding metal, and the material may be, for example, Ti, Au, Sn, Ni, Cr, It may contain at least one of Ga, In, Bi, Cu, Ag, and Ta and an optional alloy.

A support member 173 is formed under the bonding layer 169, and the support member 173 may include a conductive member, and the material is copper (Cu-copper), gold (Au-gold), nickel It may be formed of a conductive material such as (Ni-nickel), molybdenum (Mo), copper-tungsten (Cu-W), or a carrier wafer (eg, Si, Ge, GaAs, ZnO, SiC, etc.). As another example, the support member 173 may be implemented as a conductive sheet or an insulating member. The outer portion of the bonding layer 169 may contact the lower surface of the channel layer 163, but the embodiment is not limited thereto.

Here, the substrate of FIG. 1 is removed. The removal method of the growth substrate may be removed by a physical method (eg, laser lift off) or/or a chemical method (such as wet etching), and exposes the first conductive type semiconductor layer 117. Isolation etching is performed through the direction in which the substrate is removed to form a first electrode 181 on the first conductive semiconductor layer 117.

A light extraction structure 117A such as roughness may be formed on an upper surface of the first conductive semiconductor layer 117. An outer portion of the channel layer 163 is exposed outside a sidewall of the light emitting structure 150, and an inner portion of the channel layer 163 may contact a lower surface of the second conductive semiconductor layer 124.

Accordingly, the light emitting device 102 having a vertical electrode structure having a first electrode 181 on the light emitting structure 150 and a support member 173 below it may be manufactured.

8 is a view showing a light emitting device package having the light emitting device of FIG. 6.

Referring to FIG. 8, the light emitting device package 200 includes a body 210, a first lead electrode 211 and a second lead electrode 212 at least partially disposed on the body 210, and the body ( The light emitting device 101 disclosed above is electrically connected to the first lead electrode 211 and the second lead electrode 212 on the 210, and the light emitting device 101 is surrounded on the body 210 It includes a molding member 220 to.

The body 210 may be formed of a silicon material, a synthetic resin material, or a metal material. The body 210 includes a reflective part 215 having a cavity inside and an inclined surface around it when viewed from above.

The first lead electrode 211 and the second lead electrode 212 are electrically separated from each other, and may be formed to penetrate the inside of the body 210. That is, some of the first lead electrode 211 and the second lead electrode 212 may be disposed inside the cavity, and another part may be disposed outside the body 210.

The first lead electrode 211 and the second lead electrode 212 may supply power to the light emitting element 101 and reflect light generated from the light emitting element 101 to increase light efficiency, The heat generated by the light emitting device 101 may be discharged to the outside.

The light emitting device 101 may be installed on the body 210 or on the first lead electrode 211 or/and the second lead electrode 212.

The wire 216 of the light emitting device 101 may be electrically connected to either the first lead electrode 211 or the second lead electrode 212, but is not limited thereto.

The molding member 220 may surround the light-emitting element 101 to protect the light-emitting element 101. In addition, the molding member 220 includes a phosphor, and the wavelength of light emitted from the light emitting device 101 may be changed by the phosphor.

The light emitting device or the light emitting device package according to the embodiment may be applied to a light unit. The light unit includes a structure in which a plurality of light emitting devices or light emitting device packages are arrayed, and may include a lighting lamp, a traffic light, a vehicle headlight, an electric sign, and the like.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in each embodiment can be implemented by combining or modifying other embodiments by a person having ordinary knowledge in the field to which the embodiments belong. Accordingly, contents related to such combinations and modifications should be interpreted as being included in the scope of the present invention.

In addition, although the embodiments have been described above, these are only examples and do not limit the present invention, and those of ordinary skill in the field to which the present invention belongs are illustrated above within the scope not departing from the essential characteristics of the present embodiment. It will be seen that various modifications and applications that are not available are possible. For example, each component specifically shown in the embodiment can be modified and implemented. And differences related to these modifications and applications should be construed as being included in the scope of the present invention defined in the appended claims.

111: substrate 113: buffer layer
115: low conductivity layer 117: first conductivity type semiconductor layer
118: first super lattice layer 119: second super lattice layer
120: super lattice layer 121: third super lattice layer
122: first semiconductor layer 123: active layer
124: second conductive type semiconductor layer

Claims (15)

A first conductive type semiconductor layer;
A second conductive type semiconductor layer disposed on the first conductive type semiconductor layer;
An active layer including a plurality of quantum well layers and a plurality of quantum barrier layers between the first conductive type semiconductor layer and the second conductive type semiconductor layer;
A super lattice layer disposed between the first conductive semiconductor layer and the active layer; And
And a first semiconductor layer undoped between the active layer and the super lattice layer,
The super lattice layer includes at least three super lattice layers between the first conductive semiconductor layer and the active layer,
The at least three super-lattice layers include first to third super-lattice layers in which at least two different layers are periodically arranged,
The first super lattice layer is disposed between the first conductivity type semiconductor layer and the active layer,
The second super lattice layer is disposed between the first super lattice layer and the active layer,
The third super lattice layer is disposed between the second super lattice layer and the active layer,
Among the first to third super lattice layers, a period of the first super lattice layer adjacent to the first conductive type semiconductor layer is lower than that of the second and third super lattice layers, The period of the super lattice layer is higher than that of the first and second super lattice layers,
The third super lattice layer has a period of 50% or more of the total period of the super lattice layer,
Each of the first to third superlattice layers includes AlGaN having a different composition of aluminum,
The first to third superlattice layers have a higher composition of AlGaN aluminum as the superlattice layer adjacent to the active layer,
The composition of aluminum of AlGaN in the third superlattice layer is smaller than that of aluminum in the quantum barrier layer,
The first semiconductor layer includes AlGaN, and the aluminum composition of the first semiconductor layer is lower than that of the aluminum of the third superlattice layer adjacent to the active layer. delete delete delete delete delete delete delete delete delete delete delete delete delete delete

Images