KR20160030915A - Silicon wafer and method of processing the same - Google Patents

Abstract

The present invention relates to a silicon wafer having gettering capability. More specifically, the purpose of the present invention is to provide a method for producing a silicon wafer, which does not create resistance variations when producing an epitaxial wafer and a bonded wafer using the silicon wafer. The method for producing the silicon wafer of the present invention comprises a step of forming a gettering layer by dissolving hydrogen ions after injection of hydrogen ions from a front side of the silicon wafer with a dose of 1.0×10^13-3.0×10^16 atoms/cm^2.

Description

TECHNICAL FIELD [0001] The present invention relates to a silicon wafer,

The present invention relates to a silicon wafer and a method of manufacturing the same. The present invention also relates to an epitaxial wafer using the silicon wafer and a method of manufacturing the same. The present invention also relates to a bonded wafer using the silicon wafer and a method of manufacturing the same.

Metal contamination is a factor that deteriorates the characteristics of the semiconductor device. The incorporation of the metal into the semiconductor wafer mainly occurs in the manufacturing process of the semiconductor wafer and the device manufacturing process. For example, an epitaxial wafer as a semiconductor wafer is obtained by forming an epitaxial layer on a silicon wafer. Here, the epitaxial layer may be a single-crystal layer continuous with a single crystal of a silicon wafer serving as a substrate, and may have a layer of an impurity concentration different from that of the substrate. By using this epitaxial layer as a device region, epitaxial wafers are used in a wide range of applications such as memory devices, logic devices, image pickup devices, and the like.

Metal contamination in the manufacturing process of the epitaxial wafer can be considered to be caused by heavy metal particles from the constituent material of the epitaxial growth furnace. Or, since chlorine-based gas is used as the furnace gas in the epitaxial growth, metal contamination may be caused by heavy metal particles generated by metal corrosion of the piping material. For example, when a heavy metal such as copper or nickel is mixed in the wafer, a significant adverse effect is brought about on device characteristics such as a pause time failure, a retention failure, a junction leak failure, and an insulation breakdown of an oxide film.

In addition, in the field of high-integrated CMOS devices, high-breakdown-voltage devices, and image sensors, SOI wafers having a SOI (silicon on insulator) structure are attracting attention as semiconductor wafers. This SOI wafer has a structure in which an insulating film such as silicon oxide (SiO ₂ ) and a single crystal silicon layer used as a device active layer are sequentially formed on a supporting substrate. The parasitic capacitance generated between the device and the substrate is reduced as compared with the case where a normal silicon wafer is used as the substrate. Therefore, the SOI wafer can realize speeding up of devices, higher voltage reduction, lower power consumption, and the like .

This SOI wafer is obtained by, for example, a bonding method. In this bonding method, an insulating film such as an oxide film (SiO ₂ ) is formed on at least one of the wafer for a support substrate and the wafer for an active layer, and then these wafers are bonded via an insulating film and then subjected to a heat treatment at a high temperature of about 1200 ° C (Hereinafter, an SOI wafer manufactured by a bonding method is referred to as a " bonded wafer ").

The bonded wafers thus obtained have advantages such as being able to form a uniform silicon layer from the viewpoint of electrical characteristics, and metal contamination is deteriorating the characteristics of the semiconductor device.

Metal contamination in the manufacturing process of the bonded wafer may be caused by heavy metal particles from the constituent material of the heat treatment apparatus in the heat treatment after bonding or contamination by grinding or polishing in order to reduce the thickness of the bonded wafer .

In addition to the metal contamination in the semiconductor wafer fabrication process, heavy metal contamination of the semiconductor wafer during each process such as ion implantation, diffusion, and oxidation heat treatment in device fabrication processes such as imaging devices and highly integrated CMOS devices I am concerned.

Therefore, it is common to form a gettering sink for trapping a metal on a silicon wafer, an epitaxial wafer, and a bonded wafer, thereby avoiding metal contamination on the device formation surface.

As a method for forming a gettering sink, there is known an intrinsic gettering (IG) method of forming an oxide precipitate (also referred to as BMD: bulk micro defect) and a dislocation in the semiconductor wafer, which are crystal defects . Further, an extrinsic gettering (EG) method of forming a gettering sink on the back surface of a semiconductor wafer is also common.

Here, as a method of gettering the heavy metal, there is a technique of forming a gettering site by implanting carbon into the semiconductor wafer. Patent Document 1 describes a manufacturing method of implanting carbon ions from one surface of a silicon wafer to form a carbon ion implantation region and then forming a silicon epitaxial layer on the surface to form a silicon epitaxial wafer. In this technique, the carbon ion implantation region functions as a gettering site, and the dosage thereof is suitably 5 × 10 ^{13 to} 5 × 10 ¹⁵ atoms / cm 2.

Japanese Patent Application Laid-Open No. 6-338507

As described in Patent Document 1, in the case of carbon ion implantation into a conventional silicon wafer, a suitable dose amount is preferably 5 × 10 ^{13 to} 5 × 10 ¹⁵ atoms / cm 2. However, it is expected that a higher quality silicon wafer will be required in the future, and a silicon wafer having a stronger gettering capability is required.

Therefore, in order to obtain a silicon wafer having a more powerful gettering capability, the present inventors set the dose amount of carbon ions to 5.0 x 10 ¹⁴ atoms / cm 2 or more in the carbon ion implantation, and as a result, It has been confirmed that it has a turling capability. Hereinafter, the surface of the silicon wafer on which the ion implantation is performed will be referred to as the " front surface " of the silicon wafer and the surface on the opposite side thereof will be referred to as the " back surface "

It has been confirmed that this epitaxial wafer maintains sufficient gettering ability by forming an epitaxial layer on the front surface of the silicon wafer using this silicon wafer and fabricating the epitaxial wafer. If this silicon wafer is used as a wafer for an active layer and a wafer for a support substrate having an insulating film is bonded to the wafer for an active layer via an insulating film to form a bonded wafer, . In the bonded wafer, the front surface of the side to which carbon ions are implanted is located on the insulating film side.

It has been found that the epitaxial wafers and the bonded wafers thus obtained are excessively injected with carbon, and as a result, the oxygen donor is excessively generated in the carbon injection region. As a result, in the epitaxial wafer, a region where the resistivity is remarkably lowered compared to the respective resistivities of the epitaxial layer and the silicon wafer in the vicinity of the interface between the epitaxial layer and the silicon wafer as the base substrate (See Figs. 11 (B) and 11 (C) which will be described in detail later in the embodiment). Such an area is not present in an epitaxial wafer in which carbon ions are implanted at a low concentration or in an epitaxial wafer in which an epitaxial layer is simply formed in a silicon wafer without implanting carbon ions (See Fig. 11 (C)). It has also been found that, in the bonded wafer, a region where the resistivity is remarkably lowered compared with the resistivity of the active layer wafer and the insulating film is generated in the vicinity of the interface between the active layer wafer and the insulating film. Hereinafter, in the present specification, a region in which the resistivity is remarkably lowered in the vicinity of the interface (simply referred to as " resistance variation region ") is referred to as " resistance variation "

Therefore, the present invention provides a silicon wafer having gettering capability and a silicon wafer which does not cause resistance fluctuation while maintaining the gettering ability when the epitaxial wafer or the bonded wafer is manufactured using the silicon wafer The present invention provides a method for providing a plurality of data streams.

In view of the above problems, the present inventors have studied excellently a method of obtaining a silicon wafer which does not cause resistance fluctuation in epitaxial wafers and bonded wafers while maintaining gettering capability even when high-concentration ion implantation is performed on the silicon wafers. As a result, the inventors of the present invention have focused on injecting hydrogen ions having a small atomic radius, which have not attracted much attention as injection elements for imparting gettering capability to the prior art, instead of injection of carbon ions having a large atomic radius . In the case of hydrogen ion implantation, the present inventor has found that no oxygen donor is generated because no oxygen is trapped in the hydrogen implanted region, which is a gettering site, even at a high concentration. It has also been found that hydrogen ion implantation can impart sufficient gettering capability to a silicon wafer. The present inventors have also found that when an epitaxial wafer is formed by implanting hydrogen ions into a silicon wafer and forming an epitaxial layer on the silicon wafer, an epitaxial wafer in which resistance fluctuation does not occur while maintaining gettering capability can be obtained found. Further, the inventors of the present invention have found that even when a bonded wafer using this silicon wafer as the active layer wafer is produced, a bonded wafer in which resistance fluctuation does not occur can be obtained while maintaining the gettering ability.

That is, the structure of the present invention is as follows.

A method of manufacturing a silicon wafer according to the present invention is a method of implanting hydrogen ions at a dose of 1.0 × 10 ^{13 to} 3.0 × 10 ¹⁶ atoms / cm 2 from the front surface of a silicon wafer to solidify the hydrogen ions Forming layer is formed.

In the method of manufacturing a silicon wafer according to the present invention, it is preferable that the hydrogen ion is injected such that the peak of the hydrogen concentration profile in the depth direction of the silicon wafer is located within a range of less than 1.0 mu m from the front surface desirable.

The method for manufacturing an epitaxial wafer according to the present invention is characterized in that an epitaxial layer is formed on the front surface of a silicon wafer obtained by the above method.

The method for manufacturing a bonded wafer according to the present invention is characterized in that the front face of the silicon wafer obtained by the above method is bonded to a wafer for a support substrate via an insulating film.

In this case, it is preferable that the insulating film is formed on the support substrate wafer prior to the bonding.

The silicon wafer according to the present invention is a silicon wafer formed on the front surface side of a silicon wafer and having a gettering layer in which hydrogen is dissolved in the silicon wafer,

And the peak concentration of the hydrogen concentration profile in the depth direction of the silicon wafer is 1.0 x 10 ^{18 to} 1.0 x 10 ²¹ atoms / cm 3.

The silicon wafer according to the present invention preferably has a peak of the concentration profile of hydrogen within a range of 1.0 mu m or less in depth from the front surface of the silicon wafer.

The epitaxial wafer according to the present invention is an epitaxial wafer formed by forming an epitaxial layer on the front surface of the silicon wafer,

A peak concentration of the concentration profile of hydrogen after the formation of the epitaxial layer is 7.0 x 10 ¹⁷ atoms / cm 3 or less and crystal defects which trap metal impurities in the gettering layer.

The bonded wafer according to the present invention is a bonded wafer in which the front face of the silicon wafer is bonded to a supporting substrate wafer via an insulating film,

After the bonding, the peak concentration of the hydrogen concentration profile is 7.0 x 10 ¹⁷ atoms / cm 3 or less and crystal defects that trap metal impurities in the gettering layer.

According to the present invention, since hydrogen ions are implanted into a silicon wafer, even if an epitaxial wafer or a bonded wafer is manufactured using this silicon wafer as a silicon wafer having gettering capability, Silicon wafers can be produced.

1 is a schematic cross-sectional view illustrating a method of manufacturing a silicon wafer according to a first embodiment of the present invention.
2 is a schematic view of a plasma ionizing apparatus used in an embodiment of the present invention.
3 is a schematic cross-sectional view illustrating a method of manufacturing an epitaxial wafer according to a second embodiment of the present invention.
4 is a schematic cross-sectional view illustrating a method of manufacturing a bonded wafer according to a third embodiment of the present invention.
5 (A) is a graph of Inventive Example 1-1, and FIG. 5 (B) is a graph of a concentration profile of a silicon wafer in Comparative Example 1-1 .
FIG. 6A is a graph of Inventive Example 2-1, FIG. 6B is a graph of the gettering ability of the epitaxial wafer of Example 2, to be.
Fig. 7 is an optical microscope photograph of the surface of the epitaxial layer of the epitaxial wafer. Fig. 7 (A) is a micrograph of Inventive Example 2-1, Fig. 7 (B) is a micrograph of Comparative Example 2-1, 7 (C) is a micrograph of a conventional example.
8 is a graph in which crystal defects of an epitaxial wafer according to Inventive Example 2-1 are evaluated by the DLTS method.
9 is a graph in which crystal defects of the epitaxial wafer according to Inventive Example 2-1 are evaluated by CL spectral method.
10 is an LPD map showing surface defects of an epitaxial wafer.
FIG. 11A is a graph of Inventive Example 2-1, FIG. 11B is a graph of Comparative Example 2-1, and FIG. 11B is a graph of Comparative Example 2-1. 11 (C) is a graph of a conventional example.

(Mode for carrying out the invention)

Hereinafter, the present invention will be described in detail with reference to the drawings. In FIGS. 1 to 4, wafer thickness and layer thickness are exaggerated for the sake of convenience in description, unlike the actual thickness ratio. The same reference numerals are attached to the same constituent elements in principle, and a description thereof will be omitted.

(First Embodiment: Manufacturing Method of Silicon Wafer)

First, a method of manufacturing a silicon wafer according to a first embodiment of the present invention will be described in detail with reference to Fig. The method for producing a silicon wafer according to the first embodiment of the present invention is characterized in that hydrogen ions 20 are implanted from the front surface 10A of the silicon wafer 10 at a dose amount of 1.0 × 10 ^{13 to} 3.0 × 10 ¹⁶ atoms / Thereby forming the gettering layer 11 made of the hydrogen ions 20 dissolved therein. 1 (C) is a schematic cross-sectional view of the silicon wafer 100 obtained as a result of this manufacturing method.

First, as shown in Fig. 1 (A), a silicon wafer 10 is prepared. As the silicon wafer 10, a single crystal silicon wafer made of a silicon single crystal is used. As the single crystal silicon wafer, a single crystal silicon ingot grown by a Czochralski method (CZ method) or a floating band region melting method (FZ method) can be used. Further, an arbitrary impurity dopant element may be added to form n-type or p-type.

1 (B), hydrogen ions 20 are implanted from the front surface 10A of the silicon wafer 10 at a dose of 1.0 × 10 ^{13 to} 3.0 × 10 ¹⁶ atoms / cm 2. 1 (C), the gettering layer 11 in which the hydrogen ions 20 are dissolved is formed on the silicon wafer 10 by implanting the hydrogen ions 20 in the dose amount in this range And the silicon wafer 100 having the gettering layer 11 can be manufactured. The concentration of hydrogen in the concentration profile of the hydrogen in the thickness direction of the silicon wafer 100 is set to 1.0 × 10 ^{18 to} 1.0 × 10 ²¹ atoms / Cm < 3 >.

Here, the dose amount of the hydrogen ions 20 is set to 1.0 x 10 ^{13 to} 3.0 x 10 ¹⁶ atoms / cm 2 for the following reasons. That is, when the dose amount is 1.0 x 10 ¹³ atoms / cm 2 or more, the silicon wafer 100 has a sufficient gettering capability. On the other hand, when the dose amount is 3.0 x 10 ¹⁶ atoms / cm 2 or less, the crystallinity disorder of the front surface 10A of the silicon wafer can be suppressed. In addition, it is also possible to prevent the amount of warping of the silicon wafer 100 from becoming excessive. When the dose amount of the hydrogen ions is 3.0 x 10 ¹⁶ atoms / cm 2 or less, the epitaxial wafers and the bonded wafers to be described later can be manufactured by using the silicon wafers 100. At this point, if the dose exceeds 5.0 x 10 < ¹⁶ > atoms / cm < 2 >, a microbubble layer (embrittled region) is formed in the silicon wafer and is performed in the subsequent process of manufacturing the epitaxial layer or the bonded wafer The surface layer portion of the silicon wafer is peeled off with the microbubble layer as a cleaved surface by the heat treatment, and the product itself of the epitaxial wafer or the bonded wafer can not be produced.

Further, in order to obtain a higher gettering capability, the dose amount is preferably 5.0 x 10 ^{14 to} 3.0 x 10 ¹⁶ atoms / cm 2, more preferably 5.0 x 10 ^{15 to} 3.0 x 10 ¹⁶ atoms / cm 2 .

The silicon wafer 100 thus obtained has the gettering ability because it has the gettering layer 11 on the surface layer portion on the front surface 10A side. In the second embodiment described below in detail, the silicon wafer 100 is suitable as a silicon wafer for a base substrate in an epitaxial wafer. In the third embodiment described below in detail, the silicon wafer 100 is also suitable as a wafer for an active layer in a bonded wafer. The epitaxial wafers and the bonded wafers manufactured using this silicon wafer 100 do not cause resistance fluctuation while maintaining the gettering ability.

Here, in the implantation of the hydrogen ions 20 into the silicon wafer 10, any ion implantation method can be used. For example, the hydrogen ions 20 can be implanted into the silicon wafer 10 by a monomer ion implantation method using a conventionally known ion implantation apparatus. In this case, when the acceleration voltage of the hydrogen ion is about 10 to 300 keV / atom, the depth position from the front face 10A of the gettering layer 11 is determined depending on the acceleration voltage of the hydrogen ion.

The term " monomer ion " refers to an ion that is different from the following " cluster ion " The term " cluster ion " means ionization by applying a static charge or a negative charge to a cluster in which a plurality of atoms or molecules are aggregated to form a cluster. A cluster is a cluster of masses in which a plurality of (usually about 2 to about 2000) atoms or molecules are bonded together.

In the present embodiment, the depth position from the front surface 10A of the gettering layer 11 can be appropriately determined as a depth position that can prevent heavy metal contamination on the device formation surface. The peak position of the hydrogen concentration profile in the depth direction of the silicon wafer 100 is used as an index of the depth position from the front surface 10A of the gettering layer 11. [ The acceleration voltage of the hydrogen ions 20 is appropriately adjusted within the above range such that the depth from the front surface 10A of the silicon wafer 100 is within a range of 3 mu m or less, for example, You can set it.

However, it is more preferable to implant the hydrogen ions 20 so that the peak of the hydrogen concentration profile is located within the range of the depth from the front surface 10A of the silicon wafer 10 to less than 1.0 mu m. This is because the gettering layer 11 is formed at a position closer to the front surface 10A in the case where the front surface 10A side becomes the device formation region, thereby enhancing the gettering ability of the metal impurities. If the depth from the front surface 10A is within the range of less than 0.5 mu m, the above effect is further obtained, and if the depth is less than 0.3 mu m, the above effect is further obtained.

In the first embodiment, when the concentration profile of hydrogen in the depth direction of the silicon wafer is measured by secondary ion mass spectrometry (SIMS), the gettering layer 11 has a hydrogen Is detected as a range in which more than background is detected.

The hydrogen ion implantation may be performed by a cluster ion implantation method. As already described, a cluster ion is a cluster of clusters in which a plurality of atoms or molecules are bonded to each other. The gettering layer 11 can be formed on the side closer to the front surface 10A than the surface layer on the front surface 10A side of the silicon wafer 10 as compared with the monomer ion implantation. Further, hydrogen may be injected more locally and at a high concentration. In the case of cluster ion implantation, since the energy per one atom or molecule can be reduced, the acceleration voltage is about 0.1 to 100 KeV / Cluster, and the depth from the front surface 10A of the silicon wafer 10 is 1.0 mu m The hydrogen ions 20 can be injected so that the peak of the concentration profile in the depth direction of hydrogen in the gettering layer 11 is located. In addition, because the cluster ions are irradiated with low energy, the disorder of the crystallinity of the front face 10A of the silicon wafer 100 can be suppressed.

In the case of implanting cluster ions of hydrogen, cluster ions can be generated by a known method, for example, as described in the following literatures. (1) Charged Particle Beam Engineering: Ishikawa Junsu: (1) Japanese Unexamined Patent Publication No. 9-41138, (2) Japanese Unexamined Patent Publication No. 4-354865, ISBN 978-4-339-00734-3: Corona, (2) Electron and ion beam engineering: Institute of Electrical Engineers: ISBN4-88686-217-9: Oumba, (3) Cluster ion beam foundation and application: ISBN4-526- 05765-7: Daily industrial newspaper company. Generally, a Nielsen type ion source or a Kaufman type ion source is used for generation of cluster ions under static electricity, and a large current source using a volume generation method is used for generation of cluster ions under negation.

Further, as one embodiment of the present invention, hydrogen ions 20 may be implanted by plasma ion implantation. The plasma ion implantation method can be performed, for example, by using the plasma ion implantation apparatus 50 shown in Fig. The plasma ion implanter 50 includes a plasma chamber 51, a gas inlet 52, a vacuum pump 53, a pulse voltage applying means 54, and a wafer holder 55 Respectively. Hydrogen ions contained in the generated plasma can be injected into the silicon wafer 10 provided on the wafer holding table 55 by generating plasma of a gas containing hydrogen by the plasma ion implantation apparatus 50 have.

Further, the generation of the plasma of the gas containing hydrogen can be specifically performed as follows. The inside of the plasma chamber 51 is evacuated to a vacuum by the vacuum pump 53 and then hydrogen gas is introduced into the chamber 51 from the gas inlet 52 to be supplied to the pulse voltage applying means 54 A plasma containing hydrogen can be generated by applying a negative pulse in a pulse manner to the wafer holding table 55 (silicon wafer 10). The frequency of the pulse voltage may be about 10 Hz to 10 kHz, and the pulse width of the pulse voltage may be appropriately set to about 1 μsec to 1000 μsec. The degree of vacuum in the plasma chamber 51 after introduction of the gas may be 1.0 x 10 ^-1 Pa or less in order to maintain the plasma state. The hydrogen ions thus produced are a mixture of monomer ions and cluster ions.

When the hydrogen ions 20 are implanted into the silicon wafer 10 by the plasma ion implantation method, the depth position of the gettering layer 11 is set to be larger than that of the ion implantation by the above-described monomer ion implantation method and cluster ion implantation method, (10A) side. The depth position of the gettering layer 11 depends on the magnitude of the applied pulse voltage, and may be suitably determined in the range of about 20 V to 20 kV. The hydrogen ions 20 may be implanted such that the peak of the hydrogen concentration profile is located within the range of the depth from the front surface 10A of the silicon wafer 10 to less than 0.1 mu m. In the case of the plasma ion implantation method, depending on the pulse voltage, the position where the maximum concentration of hydrogen appears may be the most surface on the side of the front surface 10A of the silicon wafer 10. [ In such a case, although different from the "peak" in the strict sense, in this specification, the top surface of the silicon wafer 10 is set to the peak position of the hydrogen concentration. In this case, the injection depth is zero, but the gettering layer 11 is a range in which hydrogen is detected more than the background as described above.

(Second Embodiment: Method of Manufacturing an Epitaxial Wafer)

Next, a method of manufacturing the epitaxial wafer 200 according to the second embodiment of the present invention will be described with reference to FIG. The method for manufacturing the epitaxial wafer 200 is characterized in that the epitaxial layer 12 is formed on the front surface 10A of the silicon wafer 100 obtained by the first embodiment.

First, as shown in Fig. 3 (A), a silicon wafer 100 is manufactured by the method already described in the first embodiment. This silicon wafer 100 has the gettering layer 11 already described.

Subsequently, as shown in Fig. 3 (B), when the epitaxial layer 12 is formed on the front surface 10A of the silicon wafer 100, an epitaxial wafer 200 is obtained. As the epitaxial layer 12 formed on the front surface 10A of the silicon wafer 100, a silicon epitaxial layer can be exemplified and can be formed under general conditions. For example, when hydrogen is used as a carrier gas and a source gas such as dichlorosilane or trichlorosilane is introduced into the chamber and the growth temperature is different depending on the source gas to be used, The silicon wafer 100 can be epitaxially grown. The thickness of the epitaxial layer 12 may be about 1 to 15 mu m, and more preferably about 4 to 8 mu m.

Here, if an epitaxial layer is formed on a silicon wafer on which a gettering layer is formed by implanting carbon ions at a dose of 5.0 x 10 ¹⁴ atoms / cm 3 or more, for example, at a high concentration, the epitaxial wafer The above-described resistance fluctuation occurs (for example, see Fig. 11 (B), which will be described later). On the other hand, according to the second embodiment of the present invention, the epitaxial wafer 200 in which the epitaxial layer 12 is formed on the silicon wafer 100 having the gettering layer 11 formed by the hydrogen ion implantation, The present inventor has found that the resistance variation does not occur while maintaining the gettering ability of the silicon wafer 100 (see, for example, Fig. 11 (A) which will be described later).

In the case where the epitaxial layer 12 is formed on the silicon wafer 100 having the gettering layer 11 in which the hydrogen ions are dissolved to form the epitaxial wafer 200, The present inventor considers as follows.

The silicon wafer 100 before hydrogen ion implantation into the silicon wafer 10 at a dosage of 1.0 × 10 ^{13 to} 3.0 × 10 ¹⁶ atoms / cm 2 and before the epitaxial layer 12 is formed is subjected to SIMS , The following points were found. That is, when the concentration profile of hydrogen in the depth direction of the silicon wafer is measured on the silicon wafer 100, there is a range in which hydrogen is detected more than the background, and the area becomes the gettering layer 11 5 (A), which will be described later). In this specification, in the concentration profile of hydrogen, 7.0 x 10 ¹⁷ atoms / cm 3 is defined as the detection limit of hydrogen by SIMS.

On the other hand, when the epitaxial wafer 200 is formed by forming the epitaxial layer 12 on the silicon wafer 100 and then the hydrogen concentration is measured on the epitaxial wafer 200 by SIMS, The point has turned out. That is, in the region of the gettering layer 11 in the silicon wafer 100, there is no range in which hydrogen is detected more than the background. However, it was confirmed that the epitaxial wafer 200 had a gettering capability (details will be described later in Embodiment 2). As a result of further investigation by the present inventors, the epitaxial wafers were analyzed by the DLTS method, and the following points were found. That is, according to the analysis using the DLTS method, it is confirmed in the gettering layer 12 of the epitaxial wafer 200 that crystal defects estimated as defects (VO) due to vacancies and oxygen are generated (See Fig. 8 which will be described later in detail in the embodiment). From this result, it is considered that in the epitaxial wafer 200, the gettering layer 11, which is a hydrogen ion implanted region, has a high density of pores, and this pore serves as a gettering sink. In the formation of the epitaxial layer, it is considered that hydrogen remains in the hydrogen ion implanted region as a result of dissociation of the bond with silicon (Si) and diffusion outward. For this reason, the epitaxial wafer 200 can have gettering capability. Further, unlike the carbon ion implantation, in the case of the hydrogen ion implantation, the generation of the oxygen donor in the hydrogen implantation region that becomes the gettering layer is suppressed, and the resistance variation hardly occurs due to the oxygen donor. This is presumably because the hydrogen implanted into the silicon wafer 100 diffuses outwardly when the epitaxial layer is formed, and oxygen is hardly present in the implanted region.

Although the present invention is not limited to the theory, according to the second embodiment of the present invention, it is possible to obtain a remarkable effect that an epitaxial wafer 200 having gettering capability and which does not cause resistance fluctuation can be obtained .

In the present embodiment, it is preferable that implantation of the hydrogen ions 20 into the silicon wafer 10 is performed by a monomer ion implantation method or a cluster ion implantation method. The concentration peak position of hydrogen is preferably as close to the outermost surface as possible from the viewpoint of proximity gettering. However, from the viewpoint of facilitating the formation of the epitaxial layer 12, it is preferable to set the peak position of hydrogen to the deep layer side (about 0.1 m to 1 m) from the outermost surface.

As described above, in the second embodiment, the hydrogen concentration in the gettering layer 11 of the epitaxial wafer 200 after the formation of the epitaxial layer 12 is lower than the detection limit Or less. Therefore, in the present embodiment, the gettering layer 11 in the epitaxial wafer 200 is specified as satisfying the following (1) and (2).

(1) The hydrogen concentration by SIMS is below the detection limit (the hydrogen concentration is 7.0 × 10 ¹⁷ atoms / cm 3 or less).

(2) There exists a crystal defect trapping metal impurities in the portion where the gettering layer 11 was located before the epitaxial layer 12 was formed.

(Third Embodiment: Method of manufacturing bonded wafer)

Next, a method of manufacturing the bonded wafer 300 according to the third embodiment of the present invention will be described with reference to FIG. The method for manufacturing the bonded wafer 300 is characterized in that the front face 10A of the silicon wafer 100 obtained by the first embodiment is bonded to the supporting substrate wafer 30 via the insulating film 31 .

First, as shown in Fig. 4 (A), a silicon wafer 100 is manufactured by the method already described in the first embodiment. This silicon wafer 100 has the gettering layer 11 already described. Further, as will be described later, the silicon wafer 100 becomes an active layer in the bonded wafer 300 and is used as a device region of the SOI wafer.

Further, as shown in Fig. 4 (B), a wafer 30 for a support substrate is prepared separately from the silicon wafer 100 described above. The support substrate wafer 30 is a wafer used as a support substrate of the bonded wafer 300. As this support substrate wafer 30, any wafer can be used.

Next, as shown in Fig. 4 (C), an insulating film 31 is formed on the support substrate wafer 30 by, for example, heat treatment in an oxidizing atmosphere. The insulating film 31 may be formed on both sides of the wafer 30 for supporting substrate, or only the side to be bonded may be used. 4 (C) is a view showing the case where the insulating film 31 is formed on both surfaces of the wafer 30 for a support substrate.

4 (D), the front face 10A of the silicon wafer 100 is bonded to the support substrate wafer 30 via the insulating film 31 to obtain a bonded wafer 300 . This bonding can be performed using any wafer bonding apparatus. In this bonded wafer 300, the silicon wafer 100 becomes an active layer (SOI layer). More specifically, the back surface 10B of the silicon wafer 100 is used as a device region.

This bonded wafer 300, like the epitaxial wafer 200 in the second embodiment, is a bonded wafer having gettering capability and without causing resistance fluctuation.

Here, in the above embodiment, as shown in Fig. 4 (C), the insulating film 31 is formed on the wafer 30 for the support substrate. The opportunity to heat the silicon wafer 100 into the gettering layer 11 and the heating time can be suppressed as compared with the case where the insulating film is formed on the silicon wafer 100. Therefore, It is easy to maintain. The insulating film 31 may be made of, for example, a silicon oxide film (SiO ₂ ), and can be manufactured using a commonly used thermal oxide film producing apparatus. The thickness of the insulating film 31 can be appropriately set within a range in which the silicon wafer 100 can be used as the SOI in the bonded wafer. Though not limited, the thickness of the insulating film between the silicon wafer 100 and the wafer 30 for a support substrate may be, for example, 0.1 to 10 占 퐉, and may be 10 to 30 占 퐉.

However, the insulating film 31 may be formed on the front surface 10A of the silicon wafer 100. [ In this case, the insulating film 31 may be formed before the gettering layer 11 is formed, or the insulating film 31 may be formed after the gettering layer 11 is formed. It is preferable to form the insulating film 31 before forming the gettering layer 11 from the viewpoint of suppressing the heating opportunity and heating time of the gettering layer 11 of the silicon wafer 100.

4 (D), after the bonding of the silicon wafer 100 and the wafer 30 for a support substrate, heat treatment is performed to strengthen the bonding, so that the silicon wafer 100 and the support substrate 30 The bonding of the bonding surfaces between the wafer 30 and the substrate 30 may be strengthened. The bonding strengthening heat treatment can be performed under conditions of, for example, 800 DEG C or higher and 1200 DEG C or lower for 10 minutes or longer and 6 hours or lower in an oxidizing gas or an inert gas atmosphere.

Further, as shown in Fig. 4 (E), the thickness of the silicon wafer 100 which becomes the active layer (SOI) region may be thinned by thinning treatment. Thus, a bonded wafer 300 'having an active layer (SOI) having a desired thickness can be obtained. In this thinning step, for example, well-known plane grinding and mirror-surface polishing can be suitably used. Further, the thinning treatment may be performed using other thinning techniques such as the well-known smart cut method. Further, the support substrate wafer 30 may be made thin, or the insulating film on the surface other than the bonding surface may be ground and polished when the thin film is formed.

As in the second embodiment, in this third embodiment, the hydrogen concentration in the gettering layer 11 of the bonded wafer 300 is below the detection limit by SIMS measurement. Therefore, in the present embodiment, the gettering layer 11 in the bonded wafer 300 is specified to satisfy the following (1) and (2).

(1) The hydrogen concentration by SIMS is below the detection limit (the hydrogen concentration is 7.0 × 10 ¹⁷ atoms / cm 3 or less).

(2) There exist crystal defects that trap metal impurities in the portion where the gettering layer 11 was located before the bonding.

Next, the silicon wafer 100, the epitaxial wafer 200, and the bonded wafer 300 obtained by the manufacturing method according to the first, second, and third embodiments will be described, respectively.

(Silicon wafer)

1C, the silicon wafer 100 according to the present invention includes a gettering layer (not shown) formed on the front surface 10A side of the silicon wafer 10, in which hydrogen is dissolved in the silicon wafer 10 11), wherein the peak concentration of the concentration profile of hydrogen in the depth direction of the silicon wafer is 1.0 × 10 ^{18 to} 1.0 × 10 ²¹ atoms / cm 3.

In other words, the silicon wafer 100 can have a gettering capability by the above-described method of manufacturing a silicon wafer according to the first embodiment of the present invention. The silicon wafer 100 is also suitable as a silicon wafer for an underlying substrate in an epitaxial wafer. The silicon wafer 100 is also suitable as a wafer for an active layer in a bonded wafer. This is because epitaxial wafers and bonded wafers manufactured using this silicon wafer 100 do not cause resistance fluctuation while maintaining the gettering ability.

In order to obtain a higher gettering capability, the peak concentration of the concentration profile of hydrogen is preferably set to 1.0 x 10 ^{19 to} 1.0 x 10 ²¹ atoms / cm 3, more preferably 1.0 x 10 ^{20 to} 1.0 x 10 ²¹ atoms / cm 3 .

In order to obtain a higher gettering ability, it is preferable to form the gettering layer 11 in the vicinity of the surface of the silicon wafer 10, and it is preferable that the depth from the front surface 10A of the silicon wafer 10 is less than 1.0 mu m It is preferable that a peak of the concentration profile of hydrogen is located.

(Epitaxial wafer)

An epitaxial wafer 200 according to the present invention is shown in Fig. 3 (B). The epitaxial wafer 200 is obtained by forming the epitaxial layer 12 as an epitaxial wafer in which the epitaxial layer 12 is formed on the front surface 10A of the silicon wafer 100 , The peak concentration of the concentration profile of hydrogen in the depth direction of the silicon wafer 100 is 7.0 x 10 ¹⁷ atoms / cm 3 or less, and the semiconductor wafer 10 has crystal defects that trap metal impurities in the gettering layer 11 do.

This epitaxial wafer 200 has a remarkable feature that it has gettering capability and does not cause resistance fluctuation.

It is also preferable that the metal impurity with relatively low diffusion speed such as Co can be sufficiently gettered by locating the peak of the hydrogen concentration profile within the range of 1.0 mu m or less from the front surface 10A of the silicon wafer.

(Bonded wafer)

Fig. 4 (D) shows the bonded wafer 300 according to the present invention. This bonded wafer 300 is a bonded wafer in which the front face 10A of the above-described silicon wafer 100 is bonded to the supporting substrate wafer 30 via the insulating film 31. After the bonding, The peak concentration of the concentration profile of hydrogen in the depth direction of the wafer is 7.0 x 10 ¹⁷ atoms / cm 3 or less and crystal defects that trap metal impurities in the gettering layer 11 are characterized.

This bonded wafer 300 has a remarkable feature that it has a gettering capability and does not cause resistance fluctuation.

Hereinafter, the present invention will be described in more detail with reference to examples, but the present invention is not limited to the following examples.

[Example 1]

(Silicon wafer: Inventive example 1-1)

An n-type silicon wafer (diameter: 300 mm, thickness: 775 탆, dopant type: phosphorus, resistivity: 15 Ω · cm, oxygen concentration: 1.2 × 10 ¹⁸ atoms / cm 3) obtained from CZ single crystal was prepared. Subsequently, monomer ions of hydrogen were implanted into the surface of the silicon wafer at a dose amount of 5.0 × 10 ¹⁵ atoms / cm 2 and an acceleration voltage of 17 keV / atom using a current flow type ion implantation apparatus to produce a silicon wafer.

(Comparative Example 1-1)

A silicon wafer was produced in the same manner as in Example 1-1 except that carbon ions were implanted at an acceleration voltage of 60 keV / atom instead of hydrogen ion implantation.

(Evaluation 1-1: SIMS measurement)

Silicon wafers of Example 1-1 and Comparative Example 1-1 were subjected to SIMS measurement to obtain hydrogen and carbon concentration profiles, respectively. The results are shown in Fig. 5 (A) and Fig. 5 (B), respectively. In addition, the depth of the horizontal axis represents the front face (the face on the ion-implanted side) of the silicon wafer. 5 (A) and 5 (B), it can be seen that, in Inventive Examples 1-1 and 1-1, a peak concentration of implantation ions is generated at a depth of about 0.2 μm.

(Evaluation 1-2: Evaluation of gettering ability)

The surfaces of the silicon wafers of Examples 1-1 and 1-1 were intentionally contaminated with a Ni contaminated solution (1.0 x 10 ¹³ / cm 2) using a spin coating contamination method, Followed by heat treatment for 30 minutes.

Thereafter, the concentration of Ni in the silicon wafer was measured by SIMS, and the gettering performance of each silicon wafer was evaluated. As a result, the silicon wafers of the inventive example 1-1 and comparative example 1-1 together included 1.0 10 ¹⁷ atoms / Cm < 3 > or more was observed, confirming that it had a sufficient gettering capability.

[Example 2]

(Epitaxial wafer: Inventive Example 2-1)

A silicon wafer was produced as a base substrate of an epitaxial wafer in the same manner as in Inventive Example 1-1 of Example 1. [ Subsequently, the silicon wafer was transferred into an epitaxial growth apparatus (manufactured by Applied Materials Co.), hydrogen baking treatment was carried out at a temperature of 1120 DEG C for 30 seconds, hydrogen was supplied as a carrier gas, trichlorosilane as a source gas, An epitaxial layer of silicon (target thickness: 8 mu m, dopant type: phosphorus, target resistivity: 65 [Omega] .cm) was formed on the silicon wafer at a growth temperature of 1000 to 1150 DEG C using a phosphine as a dopant gas Epitaxial growth was performed to produce an epitaxial wafer according to the present invention.

(Comparative Example 2-1)

An epitaxial wafer was produced in the same manner as in Production Example 2-1 except that carbon ions were implanted into a silicon wafer at an acceleration voltage of 60 keV / atom instead of hydrogen ion implantation.

(Conventional example)

An epitaxial wafer was produced in the same manner as in Production Example 2-1 except that hydrogen ions were not implanted into the silicon wafer. That is, in the conventional epitaxial wafer, an ion implantation region is not formed.

(Evaluation 2-1: Evaluation of gettering ability by SIMS measurement)

The surface of the epitaxial layer of the epitaxial wafer of Inventive Example 2-1 and Comparative Example 2-1 was intentionally contaminated by a spin coating contamination method using a Ni contaminated liquid (1.0 x 10 ¹³ atoms / cm 2) Heat treatment was performed at 900 占 폚 for 30 minutes in a nitrogen atmosphere. Thereafter, the concentration of Ni in the epitaxial wafer was measured by SIMS, and the gettering performance of each epitaxial wafer was evaluated. The results are shown in Figs. 6 (A) and 6 (B). The depth of the abscissa indicates the surface of the epitaxial layer as zero.

(Evaluation 2-2: Evaluation of gettering ability by optical microscope)

The contamination of the Ni by the evaluation 2-1 was evaluated for the epitaxial wafers produced in the Examples 2-1 and 2-1 and the conventional example and immersed in the light solution for 3 minutes, The surface of the epitaxial layer was observed with an optical microscope, and the presence or absence of occurrence of pits (surface pit in the form of nickel suicide: Ni pits) observed on the surface of the epitaxial layer was examined. The results are shown in Figs. 7 (A) to 7 (C).

(Evaluation 2-3: evaluation of ground substrate by SIMS measurement)

The epitaxial wafers of Example 2-1 and Comparative Example 2-1 were subjected to SIMS measurement and the profiles of hydrogen concentration and carbon concentration of the substrate were measured.

In Inventive Example 2-1, the hydrogen concentration of the silicon substrate was below the detection limit (7.0 × 10 ¹⁷ atoms / cm 3), and the hydrogen concentration could not be measured in the hydrogen ion implanted region. On the other hand, in Comparative Example 2-1, the presence of a peak of carbon concentration was confirmed in a region where carbon ions were implanted into the silicon substrate, and the peak concentration of carbon was 3.0 x 10 ²⁰ atoms / cm 3.

(Evaluation 2-4: Evaluation of gettering layer according to DLTS method)

Deep Level Transient Spectroscopy ("deep level transient spectroscopy") was performed on the epitaxial wafers produced in Example 2-1. As a measurement condition, an area of about 0 to 1 mu m in depth direction from the interface between the epitaxial layer and the front surface of the silicon wafer toward the silicon substrate was measured with a reverse voltage of 4 V and a pulse voltage of 8 V. The results are shown in Fig. DLTS measurement is a method of measuring a change in capacitance (capacitance) when an applied voltage is changed by applying a reverse voltage to a Schottky junction or a pn junction to widen the depletion layer of the junction. Deep level (trap) can be measured based on the temperature dependence of the capacitance change, and as a result, crystal defects can be measured.

(Evaluation 2-5: evaluation of gettering layer by CL method)

CL (Cathode Luminescence, cathode luminescence) method was performed on a sample obtained by subjecting the epitaxial wafer produced in Example 2-1 to an oblique polishing process to obtain a CL spectrum. As measurement conditions, an electron beam was irradiated at 20 keV under 33K. The results are shown in Fig. The CL method is a method of detecting light emitted when a sample is irradiated with an electron beam and is a method of detecting a transition from the vicinity of the bottom of the conduction band to the vicinity of the vicinity of the valence electron band to measure crystal defects.

(Evaluation 2-6: Surface defect evaluation)

The epitaxial wafers manufactured in Examples 2-1 and 2-1 and the conventional example were measured for the size 0.16 (thickness) observed on the surface of the epitaxial layer using a wafer surface inspection apparatus (SP-1 manufactured by KLA Tencor Corporation) (LPD: Light Point Defect) was evaluated. The detected LPD map is shown in Fig.

(Evaluation 2-7: Evaluation of Resistivity)

The resistivity distributions of the epitaxial wafers manufactured in Inventive Example 2-1, Comparative Example 2-1 and Conventional Example in the depth direction were measured with a resistivity measuring device (model number: SSM2000, manufactured by Nippon SMA, Inc.) ) Was measured by the SR method (Spreading Resistance Analysis). The results are shown in Figs. 11 (A) to 11 (C). The depth of the abscissa in Fig. 11 indicates the surface of the epitaxial layer as zero.

(Evaluation results)

6A and 6B based on Evaluation 2-1 and the epitaxial wafer of Inventive Example 2-1 as well as the epitaxial wafer of Comparative Example 2-1 were also evaluated after the formation of the epitaxial layer, It can be seen that the peak concentration of Ni of high concentration is observed in the silicon wafer of the base substrate and the sufficient gettering ability for Ni is maintained. As can be seen from Figs. 7A and 7B according to Evaluation 2-2, Ni pits were not observed in Inventive Example 2-1 and Comparative Example 2-1, And has a turling capability. On the other hand, as can be seen from Fig. 7 (C), in the conventional example, a large number of Ni pits are observed and the gettering ability is low.

As described in Evaluation 2-3, in the epitaxial wafer of Inventive Example 2-1, the hydrogen implantation region as a gettering sink was not observed in the SIMS measurement with a detection limit of 7.0 × 10 ¹⁷ atoms / cm 3. On the other hand, from Fig. 8 based on Evaluation 2-4, in Inventive Example 2-1, the position 90K corresponding to the level at which defects (VO) due to vacancies and oxygen are generated and the defects ) Was observed at the position 220K corresponding to the level at which the defect (VO) occurred, and crystal defects estimated to be defects (VO) and crystal defects (PO) estimated to be defects (PO) were observed. It is also confirmed from FIG. 9 by Evaluation 2-5 that crystal defects exist in the hydrogen ion implantation region at a wavelength range of 1400 to 1500 nm. From these results, it is considered that, in the epitaxial wafer of Inventive Example 2-1, the vacancies are present at a high density in the hydrogen ion implanted region to the base substrate, and this vacancy functions as a gettering sink. (Hydrogen ion implantation region) exists before the formation of the epitaxial layer, and hydrogen can not be detected after the epitaxial layer is formed. However, defects due to vacancies and oxygen, defects due to vacancies and defects (VP) Lt; / RTI > Considering this point, it is considered that hydrogen diffuses outwardly from the silicon (Si) in the hydrogen ion implanted region at the time of forming the epitaxial layer, and as a result, the vacancy remains.

10, the surface defect (LPD) of the surface of the epitaxial layer of the epitaxial wafer of Inventive Example 2-1 in which the hydrogen ions are implanted is the same as in Comparative Example 2-1 and the conventional example , Comparative Example 2-1 and Conventional Example. That is, the effect of surface defects on the epitaxial layer by the hydrogen ion implantation was not confirmed.

11 (A) and 11 (C) of Evaluation 2-7, the resistivity distribution in the depth direction in Inventive Example 2-1 and the conventional example exhibited the same distribution. The resistivity in the region near the interface between the epitaxial layer and the silicon substrate was gradually increased from the resistivity of the silicon substrate toward the target resistivity of the epitaxial layer. Thus, in Inventive Example 2-1 and the conventional example, there was no region (resistance fluctuation region) in which the resistivity was remarkably lowered in the vicinity of the interface between the epitaxial layer and the silicon substrate. That is, in Inventive Example 2-1 and Conventional Example, no resistance fluctuation occurred. On the other hand, as is clear from Fig. 11 (B), in Comparative Example 2-1 in which a high concentration of carbon ions was implanted, in a region near the interface between the epitaxial layer and the silicon substrate, . This region is a region in which the resistivity is 15 Ω · cm and the target resistivity of the epitaxial layer is 65 Ω · cm. From these results, it can be seen that resistance fluctuation did not occur in Example 2-1 and the conventional epitaxial wafer, but resistance fluctuation occurred in the epitaxial wafer of Comparative Example 2-1.

From the above, it was found that the epitaxial wafer of Inventive Example 2-1 had the same gettering ability as that of Comparative Example 2-1 in which carbon ions were implanted. In addition, in Comparative Example 2-1 in which carbon ions were implanted at a dose amount of 5.0 x 10 ¹⁵ atoms / cm 2 and a high concentration, although the occurrence of resistance fluctuation was inevitable, the epitaxial growth of the hydrogen ion- It was found that resistance fluctuation did not occur in the case of the positive wafer. That is, the epitaxial wafer of Inventive Example 2-1 has a high gettering ability and does not cause resistance fluctuation.

[Example 3]

(Epitaxial wafer)

In addition, in order to confirm the influence of the change in the ion species and dose, the ion implantation conditions for the silicon wafer were set to the conditions described in Table 1, The epitaxial wafers of Inventive Examples 2-2 and 2-3 and Comparative Examples 2-2 to 2-6 were produced. And the epitaxial wafers manufactured in Inventive Example 2-1 and Comparative Example 2-1.

(Evaluation 3-1: Evaluation of gettering ability by SIMS measurement)

In the same manner as in Evaluation 2-1, the epitaxial wafers according to Inventive Examples 2-2 and 2-3 and Comparative Examples 2-2 to 2-4 were subjected to the contamination with Ni of 1 x 10 < ¹³ > atoms / To evaluate the gettering ability. The results are shown in Table 1. 6 (A) and 6 (B), which have already been described, as representative examples. With respect to Inventive Examples 2-2 and 2-3 and Comparative Examples 2-2 to 2-4, the peak concentrations of the concentration profiles of Ni were classified as follows and used as evaluation criteria.

?: 1.0 x 10 ¹⁷ atoms / cm 3 or more

?: 1.0 × 10 ¹⁶ atoms / cm 3 or more and less than 1.0 × 10 ¹⁷ atoms / cm 3

×: less than 1.0 × 10 ¹⁶ atoms / cm 3

Here, when Ni is trapped at 1 x 10 < ¹¹ > atoms / cm < 2 >, the peak concentration of Ni becomes 1.0 x 10 < ¹⁶ > atoms / cm < 3 > or more.

(Evaluation 3-2: surface defect evaluation)

As a result of evaluating the surface defects (LPD) of the epitaxial wafers according to Inventive Examples 2-2 and 2-3 and Comparative Examples 2-2 to 2-4 in the same manner as Evaluation 2-6, And no increase in the number of LPDs due to ion implantation was observed.

(Evaluation 3-3: Evaluation of Resistivity)

The resistivity distribution in the depth direction of the epitaxial wafer according to Inventive Samples 2-2 and 2-3 and Comparative Examples 2-2 to 2-4 was measured by the enlargement resistance method in the same manner as in Evaluation 2-7 I appreciated. The results are shown in Table 1. 11 (A) and 11 (B) already described are shown as representative examples. With respect to Inventive Examples 2-2 and 2-3 and Comparative Examples 2-2 to 2-4, the resistivity at the interface between the epitaxial layer and the silicon wafer of the ground substrate was 65 Ω · Cm < 2 > (i.e., the resistance variation ratio) were classified as follows and used as evaluation criteria.

?: Not more than 70%

○: more than 70% to less than 80%

×: more than 80%

In this embodiment, it is judged that the resistance variation does not occur if the resistance variation ratio is 80% or less.

In Comparative Examples 2-5 and 2-6, the wafer caused peeling of the wafer in the region of the injection layer during the formation of the epitaxial layer, so that an epitaxial wafer could not be produced. Therefore, the evaluations in the evaluations 3-1 to 3-3 are shown in Table 1 using the symbols "-" (evaluation impossible).

(Evaluation results)

As can be seen from Table 1, all of the epitaxial wafers according to Examples 2-1 to 2-3 satisfying the conditions of the present invention had gettering ability and no resistance fluctuation occurred. On the other hand, the epitaxial wafers according to Comparative Examples 2-1 to 2-4 which did not satisfy at least one or more of the conditions of the present invention could not satisfy both the gettering ability and the resistance fluctuation did not occur. In addition, under the ion implantation conditions of Comparative Examples 2-5 and 2-6, the wafer was peeled off in the implantation layer region, making it impossible to produce an epitaxial wafer.

[Example 4]

(Epitaxial wafer)

The same conditions as in Inventive Example 2-1 in Example 2 were used, except that the hydrogen ion implantation conditions for the silicon wafer were set to the conditions described in Table 2, in order to confirm the influence of the change in the implantation depth and dose amount , An epitaxial wafer according to Inventive Examples 2-4 to 2-6 was produced. Further, the implantation depth is the peak position of the hydrogen concentration (the front face of the silicon wafer is set to zero) before formation of the epitaxial layer. Table 2 shows the epitaxial wafers produced in Example 2-1.

(Evaluation 3: evaluation of gettering ability by SIMS measurement)

Evaluations of the gettering ability of the epitaxial wafers according to Inventive Examples 2-4 to 2-6 against Ni were evaluated in the same manner as Evaluation 2-1. The evaluation criteria are the same as those in evaluation 2-1, and the results are shown in Table 2.

In order to confirm the gettering effect of metal elements other than Ni, the surface of the epitaxial layer of the epitaxial wafer according to the inventive examples 2-1 and 2-4 to 2-6 was 1.0 10 ⁸ atoms / cm 2, and then subjected to a heat treatment at 1000 캜 for 30 minutes in a nitrogen atmosphere. Thereafter, the concentration of Co in the epitaxial wafer was measured by SIMS, and the gettering performance of Co of each epitaxial wafer was evaluated. Apart from the Co contaminated solution, the surface of the epitaxial layer of the epitaxial wafer according to the inventive examples 2-1 and 2-4 to 2-6 was treated with an Fe contaminated solution at a concentration of 1.0 x 10 < ¹² > atoms / The concentration of Fe in the epitaxial wafer was measured by SIMS and the gettering performance of each epitaxial wafer with respect to Fe was evaluated. The results are shown in Table 2. The peak concentrations of the concentration profiles of Co and Fe obtained by the SIMS measurement were classified as follows and used as evaluation criteria.

?: 1.0 x 10 ¹⁷ atoms / cm 3 or more

?: 1.0 × 10 ¹⁶ atoms / cm 3 or more and less than 1.0 × 10 ¹⁷ atoms / cm 3

×: less than 1.0 × 10 ¹⁶ atoms / cm 3

In Table 2, a comprehensive evaluation of the gettering ability was evaluated as follows. The results are shown in Table 2.

?: All of Ni, Fe and Co can be gettered.

○: Ni can be gettered with a high diffusion speed.

X: All of Ni, Fe and Co can not gettered.

Here, " getterable " means that the evaluation level for each metal of Ni, Fe, and Co is? Or?, And " can not get get " do.

(Evaluation results)

It can be seen from Table 2 that the epitaxial wafers can have a sufficient gettering capability for heavy metals such as Fe and Co by implanting hydrogen ions at depths of less than 1.0 mu m, for example, 0.2 mu m.

[Example 5]

(Bonded wafer; Inventive Example 3-1)

As the wafer for the active layer, an n-type silicon wafer (diameter: 200 mm, thickness: 725 m, oxygen concentration: 3.0 x 10 ¹⁷ atoms / cm 3, dopant type: phosphorus, target resistivity : 65 · · cm, dopant concentration: 6.6 × 10 ¹³ atoms / cm 3) was prepared. As a wafer for a support substrate, a p-type silicon wafer (diameter: 200 mm, thickness: 725 탆, oxygen concentration: 1.2 x 10 ¹⁸ atoms / cm 3, dopant type: boron , target resistivity: 1.5Ω · ㎝, dopant concentration: 1.0 × 10 was prepared ¹⁶ atoms / ㎤).

Then, using the same ion implanting apparatus as in Example 1, monomer ions of hydrogen were implanted into the surface of the silicon wafer at a dose amount of 5.0 x 10 ¹⁵ atoms / cm 2 and an acceleration voltage of 17 keV / atom. A wafer for a support substrate was introduced into a thermal oxide film production apparatus and an oxide film formation treatment was carried out at 1050 占 폚 in a hydrogen and oxygen mixed gas atmosphere to form a silicon oxide film having a thickness of 2.5 占 퐉 on the wafer for a support substrate.

In adhering the wafers for the active layer and the wafer for the support substrate in which the above treatment was carried out, the side (front face) of the active layer wafer on which the hydrogen ions were implanted was bonded to the oxide film side of the wafer for the support substrate. Subsequently, the bonded wafers were transferred into a vertical type annealing apparatus under an oxygen gas atmosphere. The inside of the apparatus was heated to 800 DEG C and held for 2 hours. Thereafter, the wafer was heated to 1000 DEG C and maintained for 1 hour, Was performed to obtain a single bonded wafer.

Thereafter, a grinding process is performed from the front surface side (hydrogen ion-implanted surface opposite to the side subjected to hydrogen ion implantation) of the bonded wafer to thin the thickness of the active layer wafer, and then the surface thereof is subjected to mirror polishing to form an active layer Bonded wafer.

(Examples 3-2 to 3-3 and Comparative Examples 3-1 to 3-7)

Further, in order to confirm the effect of the change in the ion species and the dosage, the conditions for ion implantation into the wafer for the active layer were set as shown in Table 3, -2 to -3-3 and Comparative Examples 3-1 to 3-7 were produced. Table 3 shows in addition to Inventive Example 3-1.

(Evaluation 5-1: Evaluation of resistivity)

Resistance distribution in the depth direction of the bonded wafer according to the inventive examples 3-1 to 3-3 and comparative examples 3-1 to 3-4 was evaluated by the enlarged resistance method in the same manner as in Evaluation 2-7. The results are shown in Table 3. The rate at which the resistivity at the interface between the active layer and the silicon oxide film (BOX layer) varied from the target resistivity of the wafer for the active layer: 65 Ω · cm (ie, resistance variation) .

◎: Not more than 5%

○: more than 5% to less than 10%

×: more than 10%

Further, in this embodiment, it can be judged that resistance variation does not occur if the resistance variation ratio is 10% or less.

(Evaluation 5-2: evaluation of gettering ability by SIMS measurement)

Evaluation of the gettering ability of Ni of the bonded wafers according to Examples 3-1 to 3-3 and Comparative Examples 3-1 to 3-4 was evaluated in the same manner as in Evaluation 2-1. In addition, in place of the contamination of the Ni layer on the surface of the epitaxial layer in Evaluation 2-1, the surface of the active layer of the bonded wafer is contaminated with Ni. The results are shown in Table 3. The evaluation criteria are the same as in Evaluation 2-1.

In Comparative Examples 3-5 to 3-7, the wafers were peeled off in the injection region in the active layer wafer during the bonding strengthening heat treatment performed when the active layer wafer and the support substrate wafer were bonded to each other, I could not. For this reason, the evaluations in the evaluations 5-1 and 5-2 are shown in Table 3 using the symbols "-" (evaluation impossible).

(Evaluation results)

As can be seen from Table 3, all of the bonded wafers according to Examples 3-1 to 3-3 satisfying the conditions of the present invention had gettering capability and no resistance fluctuation occurred. On the other hand, the bonded wafers according to Comparative Examples 3-1 to 3-4, which do not satisfy at least one or more of the conditions of the present invention, can not satisfy both the gettering ability and the resistance fluctuation does not occur. Also, under the ion implantation conditions of Comparative Examples 3-5 to 3-7, a bonded wafer could not be produced.

According to the present invention, since hydrogen ions are implanted into a silicon wafer, even if an epitaxial wafer or a bonded wafer is manufactured using this silicon wafer as a silicon wafer having gettering capability, Silicon wafers can be produced.

10: Silicon wafer
10A: front face of a silicon wafer
10B: back side of silicon wafer
11: gettering layer
12: epitaxial layer
20: hydrogen ion
30: wafer for supporting substrate
31: insulating film (silicon oxide film)
50: Plasma ion implantation device
51: Plasma chamber
52: gas inlet
53: Vacuum pump
54: Pulse voltage applying means
55: wafer holder
100: Silicon wafer
200: epitaxial wafer
300: bonded wafer

Claims (15)

Hydrogen ions are implanted from the front surface of the silicon wafer at a dose of 1.0 × 10 ¹³ to 3.0 × 10 ¹⁶ atoms / cm ² to form a hydrogen ion implanted region in which the hydrogen ions are solid-solved, followed by heat treatment Thereby dissociating the hydrogen in the hydrogen ion implanted region and outwardly diffusing the hydrogen to form a gettering layer made of vacancies outside the device forming region. The method according to claim 1,
And the hydrogen ion is injected so that the peak of the hydrogen concentration profile in the depth direction of the silicon wafer is located within a range of less than 1.0 mu m from the front face. Implanting hydrogen ions at a dose of 1.0 x 10 < ¹³ > to 3.0 x 10 < ¹⁶ > atoms / cm < ² > from the front surface of the silicon wafer to form a hydrogen ion implanted region formed by solidifying the hydrogen ions, Forming an epitaxial layer and dissociating the hydrogen in the hydrogen ion implanted region to outward diffuse to form a gettering layer made of a pore. The method of claim 3,
Wherein the epitaxial layer is formed in a temperature range of 1000 占 폚 to 1200 占 폚. Implanting hydrogen ions at a dose of 1.0 × 10 ¹³ to 3.0 × 10 ¹⁶ atoms / cm ² from the front surface of the silicon wafer to form a hydrogen ion implanted region formed by solidifying the hydrogen ions, , A bonding strengthening heat treatment for joining to a wafer for a support substrate via an insulating film is carried out and dissociation of the hydrogen in the hydrogen ion implanted region is outwardly diffused to form a gettering layer formed as a pore A method of manufacturing a bonded wafer. 6. The method of claim 5,
Wherein the bonding strengthening heat treatment is performed at a temperature of 800 ° C or more and 1200 ° C or less. The method according to claim 5 or 6,
Wherein the insulating film is formed on the wafer for a support substrate prior to the bonding. 1. An epitaxial wafer comprising an epitaxial layer formed on a front surface of a silicon wafer,
And a gettering layer made of a pore is formed in the surface layer portion on the front surface side of the silicon wafer. 9. The method of claim 8,
In the gettering layer, a concentration peak is observed by the DLTS method at a level at which defects due to vacancies and oxygen are generated and at a level at which defects are generated by vacancies and phosphorus. 10. The method according to claim 8 or 9,
In the gettering layer, a peak is detected in the wavelength range of 1400 to 1500 nm by the CL method. 10. The method according to claim 8 or 9,
The gettering layer made of pores is formed by implanting hydrogen ions at a dose of 1.0 × 10 ¹³ to 3.0 × 10 ¹⁶ atoms / cm ² from the front surface of the silicon wafer to form a hydrogen ion implanted region Forming an epitaxial layer on the front surface of the silicon wafer and dissociating the hydrogen in the hydrogen ion implanted region to outwardly diffuse the epitaxial layer. A bonded wafer in which a front surface of a silicon wafer is bonded to a wafer for a support substrate via an insulating film,
And a gettering layer made of a pore is formed in the surface layer portion on the front surface side of the silicon wafer. 13. The method of claim 12,
In the gettering layer, a concentration peak is observed by the DLTS method at a level at which defects due to vacancies and oxygen are generated and at a level at which defects are generated by vacancies and phosphorus. The method according to claim 12 or 13,
In the gettering layer, a peak is detected in the wavelength range of 1400 to 1500 nm by the CL method. The method according to claim 12 or 13,
The gettering layer made of pores is formed by implanting hydrogen ions at a dose of 1.0 × 10 ¹³ to 3.0 × 10 ¹⁶ atoms / cm ² from the front surface of the silicon wafer to form a hydrogen ion implanted region A bonding strengthening heat treatment for joining the front face of the silicon wafer to a wafer for a support substrate via an insulating film is performed and at the same time the bonding strength heat treatment for dissociating the hydrogen in the hydrogen ion implantation region to outwardly diffuse wafer.

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