JP4910275B2 - Solid-state imaging device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a solid-state imaging device such as a CCD image sensor or a CMOS image sensor and a manufacturing method thereof, and more particularly to an impurity gettering structure.

In conventional gettering technology for various semiconductor devices, oxygen present in the substrate is precipitated by heat treatment, and the resulting strain field is used as a getter site. There are extrinsic getters (EG) that form getter sites by forming field and dislocation layers. EG is performed by depositing polysilicon on the back surface or phosphorus high concentration diffusion, etc. In order to demonstrate particularly effective gettering ability, high concentration ions of C, Si, O, etc. are implanted near the element active region. Then, there is proximity gettering that forms a strain field and a dislocation layer (see, for example, Patent Documents 1 and 2).
JP-A-5-152304 JP-A-6-338507

In the proximity gettering technique, the gettering ability is determined by the concentration of implanted ions. Therefore, it is sufficient to increase the dose amount in order to enhance the effect, but within the framework of industrial application, there is a limit to improving the effect by increasing the dose amount from the viewpoint of securing productivity. Therefore, it is a problem to improve the gettering capability within a range in which productivity can be secured.
Further, there are cases where it is required to provide a proximity gettering layer at a deep position of the substrate due to the device structure. In response to this requirement, conventional ions such as C, Si, and O have a low probability of forming a high number of ions, so that it is difficult to obtain a sufficient dose at the time of high range implantation, and a long time is required. There's a problem.

A gettering structure in a solid-state imaging device is a typical example in which the above-described problem needs to be overcome. A generated current generated by a deep level due to metal impurities affects image quality as dark noise. For this reason, there is a strong demand for a device for reducing metal impurities from the current limit. In a solid-state imaging device, since a photoelectric conversion region is formed from a surface to a depth of several um, an efficient high range injection is required for a request to directly form a getter layer under the region. .
Accordingly, the present invention provides a structure in which a gettering capability is improved while securing productivity and a proximity getter layer is formed in a desired region including a deep position of a substrate, and a manufacturing method thereof, particularly in a solid-state imaging device. With the goal.

In order to achieve the above-described object, the solid-state imaging device of the present invention includes a photoelectric conversion region that generates a signal charge according to the amount of incident light, an output unit that converts the signal charge into an electrical signal, and outputs the signal charge . A channel stop region for performing separation, and a semiconductor substrate provided with a transfer unit for transferring the signal charge generated by the photoelectric conversion region as necessary, and a metal impurity present in the semiconductor substrate. In addition to performing gettering, a cavity layer that separates metal impurities from at least a part of the photoelectric conversion region and the output unit is formed, and an inflow of a dark current generated from the cavity layer to at least a part of the photoelectric conversion region and the output unit is performed. It is characterized in that it is provided inside the channel stop region that functions as a blocking potential barrier .
In addition, the solid-state imaging device manufacturing method of the present invention performs separation between a photoelectric conversion region that generates a signal charge according to the amount of incident light, an output unit that converts the signal charge into an electric signal, and outputs the signal. A solid-state imaging device manufacturing method comprising: a semiconductor substrate having a transfer portion that transfers at least a channel stop region and transfers a signal charge generated by the photoelectric conversion region as needed; and is present in the semiconductor substrate A cavity layer for separating metal impurities from at least a portion of the photoelectric conversion region and the output portion is generated from the cavity layer with respect to at least a portion of the photoelectric conversion region and the output portion. light element ion implantation step and annealing to form within said channel stop region that functions as a potential barrier to prevent the flow of dark current And having a le process.

  In the solid-state imaging device and the manufacturing method thereof according to the present invention, a cavity layer generated by high concentration injection of light elements (H, He) is used for forming a gettering structure of the solid-state imaging device. Since high-density dangling bonds exist on the inner surface of the cavity, metal impurities are efficiently trapped there. Since the cavity layer easily exhibits higher gettering capability at the same formation dose as compared with the conventional proximity gettering structure, the gettering capability can be enhanced while ensuring productivity. Further, since light elements are easily accelerated, even a low-valence ion having a high probability of existence can be easily injected with a high range, and a gettering layer can be formed at a desired deep position with good productivity.

In forming the cavity by light element implantation, H or He having a peak concentration Cp of 1 × 10 ²⁰ atoms / cm ³ or more is implanted into the Si substrate. Then, bubbles of those elements are generated in Si. Subsequently, when annealing is performed at 400 ° C. or higher, the bubbles are detached from the Si, and cavities remain at the positions where the bubbles exist. In this embodiment, the cavity formed in this way can be formed in a desired region including a deep position because the range of light elements H and He is large. Provide a gettering structure.

In the present embodiment, the dark current is prevented so that the electrons (dark current) springing out from the cavity layer do not adversely affect the photoelectric conversion region, the output unit, and the transfer unit formed as necessary. A cavity layer is formed across a region functioning as a potential barrier that prevents the inflow of silicon.
For example, when the solid-state imaging device has a configuration in which a vertical overflow barrier layer is provided by providing a P-type well layer in an N-type substrate, a cavity layer is provided on the deep layer side of the vertical overflow barrier layer. Alternatively, a cavity layer is provided outside the region of the depletion layer in the source / drain portion of the MOS transistor in the output portion.

Further, a cavity layer is provided in a channel stop region that separates each element. In this case, the channel stop region extends to a layer deeper than the charge storage region of the photodiode, and the cavity layer is formed from the shallow region to the deep region of the channel stop region, thereby functioning the channel stop region between the photodiodes. Can be reinforced by the cavity layer. In other words, the formation of the cavity layer can enhance the effect of preventing the signal charge generated by a certain photodiode from leaking into the adjacent photodiode. Furthermore, when light incident on the photodiode enters the adjacent photodiode due to diffraction effects or the like, a problem of color mixing occurs. In this embodiment, a cavity layer (with a refractive index n = 1) is provided in the channel stop region. Thus, it becomes possible to cause total reflection of light at the interface between Si and the cavity layer, and to reduce the intrusion of light into the adjacent photodiode.
As a specific structure of the channel stop region, if the channel stop region is extended to the above-described vertical overflow barrier layer, the movement of signal charges can be prevented more reliably. As a method for forming the channel stop region, a plurality of ion implantations may be performed to provide a multi-level channel stop region, and a cavity layer may be formed in the channel stop region from a shallow region to a deep region. .

FIG. 1 is a plan view showing an outline of a CCD image sensor according to Embodiment 1 of the present invention, and FIG. 2 is a plan view showing an enlarged part of an imaging unit of the CCD image sensor shown in FIG. 3 is a cross-sectional view taken along line AA ′ in FIG. 2, and FIG. 4 is a cross-sectional view taken along line BB ′ in FIG.
As shown in FIG. 1, the CCD image sensor includes an imaging unit 20 in which a large number of pixels are arranged in a two-dimensional array on a semiconductor chip 10 and various MOS transistor circuits that constitute a signal processing circuit of the imaging unit 20. 26 etc. are provided.
The imaging unit 20 is connected to a large number of pixels 21 each provided with a photodiode, a plurality of vertical CCD registers (VCCD) 22 arranged along the pixel column of each pixel 21, and the end of each vertical CCD register 22. A horizontal CCD register (HCCD) 23 and an output unit 24 provided at the end of the horizontal CCD register 23, and the signal charges generated by the pixels 21 are transferred in the vertical direction by the vertical CCD registers 22. The transferred signal charge is transferred in the horizontal direction by the horizontal CCD register 23, and the potential fluctuation is converted into an electric signal by the floating diffusion (FD) unit provided in the output unit 24 and output.
As shown in FIG. 2, each pixel 21 of the imaging unit 20 has a light receiving region, and a channel stop region 25 is formed between adjacent pixels.

3 and 4, a P-type channel stop region 25 is formed in an upper layer of the N-type silicon substrate 30, and a P + region 31 and an N region 32 of the photodiode are formed in a region delimited by the channel stop region 25. And an N region 33 and a P region 34 of the vertical CCD register are provided on the side thereof.
Further, two layers of transfer electrode films 36 and 37 such as a polysilicon film and a light shielding film 38 such as a W film are disposed on the upper surface of the silicon substrate 30 with a gate insulating film and an interlayer insulating film 35 interposed therebetween. An inner lens 39 and the like are disposed.
Further, a vertical overflow barrier (OFB) is formed in the silicon substrate 30 by the P well region 40, and a potential barrier is formed in the lower layer region of the photodiode so that the signal charge overflowing from the photodiode is transferred to the substrate. It discharges to the deep side.
In the image sensor of the present embodiment, a cavity layer 41 by light element ion implantation and annealing is provided on the deep layer side of the P well region 40 that forms this overflow barrier. For simplicity, the cavity layer 41 is shown in a state where a plurality of cavities having a substantially common radius are aligned. However, the actual cavity layer 41 is not limited to this, and various forms can be considered. is there.
In such a configuration, the metal impurities in the silicon substrate are captured by the cavity layer 41, and the amount of metal impurities present in the photoelectric conversion region and the transfer portion can be reduced. Further, the cavity layer 41 is separated from the photoelectric conversion region, the transfer unit, and the like in terms of potential by the P well region 40 (OFB), and dark current generated from the surface level of the inner surface of the cavity is transferred to the photodiode, the CCD register, or the like. Since it does not reach, it is possible to maintain good dark noise characteristics.

FIG. 5 is a cross-sectional view showing a first method for forming the cavity layer 41 of this embodiment.
In this example, first, in FIG. 5A, an oxide film 42 of about several tens of nanometers is formed on the upper surface of an N-type silicon substrate (CZ, MCZ, etc.) 30, and then in FIG. As an ion implantation of H ions or He ions. Here, the implantation energy and the dose amount are selected so that the peak concentration Cp is 1 × 10 ²⁰ atoms / cm ³ or more, and implantation is performed at an arbitrary depth.
Next, in FIG. 5C, annealing at several hundred to several thousand degrees C is performed to form the cavity layer 41 while recovering the surface crystal defects. Thereafter, wet etching is performed on the entire surface in FIG. 5D to remove the oxide film 42, and an epitaxial layer 43 is formed on the upper surface of the N-type silicon substrate 30 in FIG. Thereafter, although not shown, each layer is formed on the epitaxial layer 43, and an element structure as shown in FIGS. 3 and 4 is produced.

FIG. 6 is a cross-sectional view showing a second method for forming the cavity layer 41 of this embodiment.
In this example, first, in FIG. 6A, an N-type silicon substrate 30 provided with an epitaxial layer 43 on the upper surface in advance is prepared, and in FIG. 6B, ion implantation of H ions or He ions as light element ions is performed. I do. Next, in FIG. 6C, each layer is formed with respect to the epitaxial layer 43, and the cavity layer 41 is formed by annealing in a process (not shown) for producing an element structure as shown in FIGS. Form. Thus, in this example, there is an effect that the oxide film process and the annealing process can be omitted as compared with the example of FIG.
As another formation method, H and He are implanted at a deeper position than the OFB formation position in the middle of the image sensor element formation process, for example, at the time of ion implantation for forming the photodiode region, and the cavity layer is formed. It may be formed. In this case, the annealing process for forming the cavity may be performed as a single process, or may be combined with other annealing processes.

7 and 8 are cross-sectional views showing a part of the imaging unit of the CCD image sensor according to the second embodiment of the present invention. FIG. 7 is a cross-sectional view taken along the line AA ′ of FIG. 2, and FIG. This corresponds to the B 'line cross section. In addition, about the structure which is common in FIG.3 and FIG.4, the same code | symbol is attached | subjected and description is abbreviate | omitted.
In the image sensor of this embodiment, a cavity layer 51 is provided inside an element isolation channel stop region 25.
In this embodiment, the cavity layer 51 in the channel stop region, the photodiode portion, and the CCD register portion are potential-separated by the P + layer of the channel stop maintained at the GND level, and darkness generated in the cavity layer is generated. The current hardly reaches the photodiode part or the CCD register part. Further, in this embodiment, since a cavity layer that performs gettering is formed in the immediate vicinity of the photodiode portion and the CCD register portion, a strong gettering effect can be expected.

9 and 10 are cross-sectional views showing a method for forming a channel stop region and a cavity layer in this embodiment. FIG. 9 is a cross-sectional view taken along line AA ′ in FIG. 2, and FIG. 10 is a cross-sectional view taken along line BB ′ in FIG. Corresponds to the cross section.
First, in FIGS. 9A and 10A, the photoresist corresponding to the pattern of the channel stop region on the upper surface of the N-type silicon substrate 30 provided with the vertical overflow barrier (OFB) by the P well region 40 (FIG. PR) 52 is patterned. 9B and 10B, P-type ion implantation is performed to form the channel stop region 25. Then, in FIGS. 9C and 10C, Cp is 1 × 10 × 10. H or He is implanted at an energy and dose such that the concentration becomes ²⁰ atoms / cm ³ or more and the concentration becomes 1 × 10 ²⁰ atoms / cm ³ before reaching the channel stop region. Note that the order of ion implantation in the channel stop region 25 and ion implantation in the cavity layer 51 may be reversed, and the cavity opening size is made smaller than the PR opening for forming the channel stop so that the cavity is securely accommodated in the channel stop. You may do it. The annealing process after this is performed, and the cavity layer 51 is formed.
By providing the cavity layer 51 in the channel stop region 25 as described above, there is an advantage that the channel stop function can be strengthened and separation between elements can be performed more firmly.

Further, in the configuration in which the cavity layer is formed in the channel stop region as in the present embodiment, the channel stop region is formed at a deep position in order to prevent color mixing between adjacent photodiodes. In this case, the color mixing prevention function can be strengthened by forming the cavity layer to a deep position in accordance with the channel stop region.
As a configuration for forming the channel stop region deeply, a multi-hierarchical channel stop region can be formed by multiple ion implantations, or the channel stop region can be extended to the OFB position. Accordingly, the cavity layer can be formed deeply to effectively prevent leakage of signal charges between adjacent pixels and light leakage.

  FIG. 11 is a sectional view showing a MOS transistor of a CCD image sensor according to Embodiment 3 of the present invention. This MOS transistor is disposed, for example, in the MOS transistor circuit 26 (cross section taken along the line CC ′) of the imaging unit 20 shown in FIG. The source / drain regions 63 and 64 are provided on the silicon substrate 30. In this embodiment, the cavity layer 65 is provided outside the position where the depletion layers of the source / drain regions 63 and 64 of the MOS transistor reach. In this case, since the amount of metal impurities present in the source / drain regions 63 and 64 can be effectively reduced, the noise characteristics of the MOS transistor can be improved.

FIG. 12 is a cross-sectional view showing a method for forming a MOS transistor in this embodiment.
First, in FIG. 12A, a photoresist 66 is patterned on the silicon substrate 30 provided with the gate electrode 62, and in FIG. 12B, the source / drain regions 63, In FIG. 12C, H or He ions are implanted into a region deeper than the depletion layer of the source / drain regions 63 and 64. In FIG. The order of the ion implantation of the source / drain regions 63 and 64 and the ion implantation of the cavity layer 65 may be reversed. The cavity layer 65 is formed by the subsequent annealing process.

  As mentioned above, although the Example of this invention was described, various modifications can be considered for this invention in the range which does not deviate from the meaning described in the claim. For example, the configurations of the embodiments described above may be combined, or combinations with other gettering structures (strain fields, dislocations, etc.) may be used. Further, the solid-state imaging device is not limited to a CCD image sensor, and may be applied to a CMOS image sensor or the like. Various methods are provided for CCD image sensors and CMOS image sensors, but the present invention can be applied to any method. For example, the number of pixel transistors in a pixel in a CMOS image sensor In addition, there is no particular limitation on the requirement for including an output unit in a pixel.

It is a top view which shows the outline | summary of the CCD image sensor by Example 1 of this invention. It is a top view which expands and shows a part of imaging part of the CCD image sensor shown in FIG. FIG. 3 is a cross-sectional view taken along line AA ′ in FIG. 2. FIG. 3 is a cross-sectional view taken along line BB ′ in FIG. 2. It is sectional drawing which shows the manufacturing process of the imaging part shown in FIG. It is sectional drawing which shows the manufacturing process of the imaging part shown in FIG. It is sectional drawing which shows a part of imaging part of the CCD image sensor by Example 2 of this invention. It is sectional drawing which shows a part of imaging part of the CCD image sensor by Example 2 of this invention. It is sectional drawing which shows the manufacturing process of the imaging part shown in FIG. It is sectional drawing which shows the manufacturing process of the imaging part shown in FIG. It is sectional drawing which shows the structure of the MOS transistor of the CCD image sensor by Example 3 of this invention. FIG. 8 is a cross-sectional view showing a manufacturing step of the MOS transistor shown in FIG. 7.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Semiconductor chip, 20 ... Imaging part, 21 ... Pixel, 22 ... Vertical CCD register, 23 ... Horizontal CCD register, 24 ... Output part, 25 ... Channel stop area, 26 ... MOS transistor circuit , 30... N-type silicon substrate, 40... P-well region, 41.

Claims (16)

A solid state provided with at least a photoelectric conversion region that generates a signal charge according to the amount of incident light on a semiconductor substrate, an output unit that converts the signal charge into an electrical signal, and a channel stop region that separates the regions. An imaging device,
A cavity layer that performs gettering of metal impurities present in the semiconductor substrate and separates metal impurities from at least a part of the photoelectric conversion region and the output part is provided with respect to at least a part of the photoelectric conversion region and the output part. A solid-state image pickup device provided inside the channel stop region functioning as a potential barrier that prevents inflow of dark current generated from a layer .   The solid-state imaging device according to claim 1, wherein the cavity layer is formed by light element ion implantation into a semiconductor substrate and annealing. A vertical overflow barrier layer for discharging excess charge of the photoelectric conversion region to the deep layer side of the semiconductor substrate in the middle layer of the semiconductor substrate;
The deep side of the vertical overflow barrier layer, wherein performs gettering of metal impurities present in the semiconductor substrate, that the provided from at least a portion of the photoelectric conversion region and the output unit further cavity layer separating the metal impurity The solid-state image sensor according to claim 1 or 2 . Outside the depletion layer region of the source / drain portion of the MOS transistor formed on the semiconductor substrate, gettering of metal impurities present in the semiconductor substrate is performed, and metal impurities are removed from at least a part of the photoelectric conversion region and the output unit. the solid-state imaging device according to any one of claims 1 to 3, characterized in that further provided a cavity layer of separating. The channel stop region formed between at least adjacent photoelectric conversion regions extends to a layer deeper than the charge storage region of the photoelectric conversion region, and the cavity layer is formed from a shallow region to a deep region of the channel stop region. The solid-state imaging device according to claim 1 , wherein the solid-state imaging device is provided. A vertical overflow barrier layer for discharging the surplus charge of the photoelectric conversion region to the deep layer side of the semiconductor substrate in the middle layer of the semiconductor substrate, and the channel stop region extending to the vertical overflow barrier layer The solid-state imaging device according to claim 5, wherein 3. The solid-state imaging according to claim 1, wherein the channel stop region is formed in a plurality of layers from a shallow region to a deep region of the semiconductor substrate, and the cavity layer is formed from a shallow region to a deep region of the channel stop region. element. A vertical overflow barrier layer for discharging the surplus charge of the photoelectric conversion region to the deep layer side of the semiconductor substrate in the middle layer of the semiconductor substrate, and the channel stop region extending to the vertical overflow barrier layer 8. The solid-state imaging device according to claim 7, wherein The semiconductor substrate includes a transfer unit that transfers signal charges generated by the photoelectric conversion region to an output unit, and the cavity layer separates metal impurities from at least a part of the photoelectric conversion region, the output unit, and the transfer unit. solid-state image sensor according to claim 1 to. A solid state provided with at least a photoelectric conversion region that generates a signal charge according to the amount of incident light on a semiconductor substrate, an output unit that converts the signal charge into an electrical signal, and a channel stop region that separates the regions. A method for manufacturing an image sensor,
A cavity layer for performing gettering of metal impurities present in the semiconductor substrate and separating metal impurities from at least a part of the photoelectric conversion region and the output part is formed with respect to at least a part of the photoelectric conversion region and the output part. A method for manufacturing a solid-state imaging device, comprising: a light element ion implantation step and an annealing step formed inside the channel stop region functioning as a potential barrier that prevents an inflow of dark current generated from the cavity layer . 11. The method for manufacturing a solid-state image pickup device according to claim 10, wherein the annealing step also serves as an annealing step for forming the solid-state image pickup device. A step of forming a channel stop region formed between at least adjacent photoelectric conversion regions in a layer deeper than the charge storage region of the photoelectric conversion region, and the cavity layer from a shallow region of the channel stop region 12. The method of manufacturing a solid-state imaging device according to claim 10 , wherein the solid-state imaging device is formed over a deep region. Forming a vertical overflow barrier layer in the middle layer of the semiconductor substrate for discharging surplus charges of the photoelectric conversion region to a deep layer side of the semiconductor substrate, and extending the channel stop region to the vertical overflow barrier layer. The method of manufacturing a solid-state imaging device according to claim 12 , wherein the solid-state imaging device is formed. 12. The method according to claim 10 , further comprising: forming the channel stop region in a plurality of layers from a shallow region to a deep region of the semiconductor substrate, and forming the cavity layer from the shallow region to the deep region of the channel stop region. The manufacturing method of the solid-state image sensor of description. Forming a vertical overflow barrier layer in the middle layer of the semiconductor substrate for discharging surplus charges of the photoelectric conversion region to a deep layer side of the semiconductor substrate, the channel stop region extending to the vertical overflow barrier layer; 15. The method for manufacturing a solid-state imaging device according to claim 14 , wherein the solid-state imaging device is formed. The semiconductor substrate includes a transfer unit that transfers signal charges generated by the photoelectric conversion region to an output unit, and the cavity layer separates metal impurities from at least a part of the photoelectric conversion region, the output unit, and the transfer unit. The manufacturing method of the solid-state image sensor in any one of Claims 10-15 .

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