KR20150084902A - 폐쇄 구역들을 갖는 하드 매크로, 이를 포함하는 집적 회로 및 하드 매크로로를 통해 루팅하는 방법 - Google Patents

폐쇄 구역들을 갖는 하드 매크로, 이를 포함하는 집적 회로 및 하드 매크로로를 통해 루팅하는 방법 Download PDF

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KR20150084902A
KR20150084902A KR1020157015030A KR20157015030A KR20150084902A KR 20150084902 A KR20150084902 A KR 20150084902A KR 1020157015030 A KR1020157015030 A KR 1020157015030A KR 20157015030 A KR20157015030 A KR 20157015030A KR 20150084902 A KR20150084902 A KR 20150084902A
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South Korea
Prior art keywords
layer
hard macro
hard
macro
vias
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Abandoned
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KR1020157015030A
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English (en)
Korean (ko)
Inventor
캄비즈 사마디
슈리파드 에이. 판스
양 두
로버트 피. 길모어
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퀄컴 인코포레이티드
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Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • G06F17/5068—
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020157015030A 2012-11-14 2013-11-14 폐쇄 구역들을 갖는 하드 매크로, 이를 포함하는 집적 회로 및 하드 매크로로를 통해 루팅하는 방법 Abandoned KR20150084902A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201261726031P 2012-11-14 2012-11-14
US61/726,031 2012-11-14
US13/753,193 US10192813B2 (en) 2012-11-14 2013-01-29 Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macro
US13/753,193 2013-01-29

Publications (1)

Publication Number Publication Date
KR20150084902A true KR20150084902A (ko) 2015-07-22

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KR1020157015030A Abandoned KR20150084902A (ko) 2012-11-14 2013-11-14 폐쇄 구역들을 갖는 하드 매크로, 이를 포함하는 집적 회로 및 하드 매크로로를 통해 루팅하는 방법

Country Status (7)

Country Link
US (3) US10192813B2 (enExample)
EP (1) EP2920719B1 (enExample)
JP (1) JP6235034B2 (enExample)
KR (1) KR20150084902A (enExample)
CN (1) CN104769594B (enExample)
BR (1) BR112015010159B1 (enExample)
WO (1) WO2014078487A1 (enExample)

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BR112015010159B1 (pt) 2021-07-20
US20140131885A1 (en) 2014-05-15
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