KR20130033863A - 반도체칩 패키지 및 그 제조방법 - Google Patents

반도체칩 패키지 및 그 제조방법 Download PDF

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Publication number
KR20130033863A
KR20130033863A KR1020110097810A KR20110097810A KR20130033863A KR 20130033863 A KR20130033863 A KR 20130033863A KR 1020110097810 A KR1020110097810 A KR 1020110097810A KR 20110097810 A KR20110097810 A KR 20110097810A KR 20130033863 A KR20130033863 A KR 20130033863A
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KR
South Korea
Prior art keywords
semiconductor chip
substrate
plating layer
chip package
tin
Prior art date
Application number
KR1020110097810A
Other languages
English (en)
Korean (ko)
Inventor
김용석
양진혁
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020110097810A priority Critical patent/KR20130033863A/ko
Priority to JP2012211931A priority patent/JP2013074297A/ja
Priority to CN2012103647781A priority patent/CN103021874A/zh
Publication of KR20130033863A publication Critical patent/KR20130033863A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Chemically Coating (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
KR1020110097810A 2011-09-27 2011-09-27 반도체칩 패키지 및 그 제조방법 KR20130033863A (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020110097810A KR20130033863A (ko) 2011-09-27 2011-09-27 반도체칩 패키지 및 그 제조방법
JP2012211931A JP2013074297A (ja) 2011-09-27 2012-09-26 半導体チップパッケージ及びその製造方法
CN2012103647781A CN103021874A (zh) 2011-09-27 2012-09-26 半导体芯片封装及用于制造该半导体芯片封装的方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020110097810A KR20130033863A (ko) 2011-09-27 2011-09-27 반도체칩 패키지 및 그 제조방법

Publications (1)

Publication Number Publication Date
KR20130033863A true KR20130033863A (ko) 2013-04-04

Family

ID=47970337

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020110097810A KR20130033863A (ko) 2011-09-27 2011-09-27 반도체칩 패키지 및 그 제조방법

Country Status (3)

Country Link
JP (1) JP2013074297A (ja)
KR (1) KR20130033863A (ja)
CN (1) CN103021874A (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2014157559A1 (ja) 2013-03-29 2017-02-16 株式会社ブリヂストン タイヤ

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3378334B2 (ja) * 1994-01-26 2003-02-17 株式会社東芝 半導体装置実装構造体
JP3279225B2 (ja) * 1997-07-30 2002-04-30 株式会社デンソー バンプを有する電子部品及びその実装構造
JP4640558B2 (ja) * 2000-09-14 2011-03-02 石原薬品株式会社 無電解スズ−銀合金メッキ浴
JP4888096B2 (ja) * 2006-12-08 2012-02-29 富士通株式会社 半導体装置、回路配線基板及び半導体装置の製造方法
JP5476926B2 (ja) * 2009-10-29 2014-04-23 富士通株式会社 半導体装置の製造方法
JP5433543B2 (ja) * 2010-09-27 2014-03-05 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
JP2013074297A (ja) 2013-04-22
CN103021874A (zh) 2013-04-03

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A201 Request for examination
E902 Notification of reason for refusal
E90F Notification of reason for final refusal
E601 Decision to refuse application