KR20130031342A - Infrared sensor - Google Patents

Abstract

Provided is an infrared sensor capable of suppressing the variation of the S / N ratio in the plane of the infrared sensor chip due to the heat generation of the IC chip. The infrared sensor includes an infrared sensor chip 100 in which a plurality of pixel portions 2 including the temperature sensing portion 30 constituted by the thermopile 30a are arranged in an array on one surface side of the semiconductor substrate 1. And an IC chip 102 for signal processing the output signal of the infrared sensor chip 100. The package 103 is hermetically bonded to the package main body 104 with a package main body 104 in which the infrared sensor chip 100 and the IC chip 102 are mounted and mounted, and a lens 153 that transmits infrared rays. Package cover 105. The amount of temperature change of the on-contact point T1 and the cold junction T2 of each pixel portion 2 according to the heat generated by the IC chip 102 having the window hole 108 through which the infrared light passes through the infrared sensor chip 100 in the package 103. The cover member 106 which equalizes is provided.

Description

Infrared sensor {INFRARED SENSOR}

The present invention relates to an infrared sensor.

Conventionally, an infrared sensor chip in which a plurality of pixel portions including a thermosensitive portion made of a thermopile is arranged in an array shape on one surface side of a silicon substrate, and an output signal of the infrared sensor chip are signaled. An infrared sensor (infrared sensor module) including an IC chip to be processed and an infrared sensor chip and a package containing the IC chip has been proposed (see, for example, Japanese Patent Laid-Open No. 2010-78451).

The above-described package includes a package main body in which an infrared sensor chip and an IC chip are arranged in a horizontal direction, and a package cover mounted to cover the package main body in a form surrounding the infrared sensor chip and the IC chip between the package main body. Consists of. Here, the package cover is provided with a lens for converging infrared rays to be detected by the infrared sensor chip. In short, the package cover has a function of transmitting infrared rays to be detected by the infrared sensor chip.

In the above-described infrared sensor chip, a thermal infrared detector having a temperature sensitive portion in each pixel portion is formed on the one surface side of the silicon substrate and supported by the silicon substrate. In addition, the infrared sensor chip has a cavity formed directly under a part of the thermal infrared detection part in the silicon substrate. In addition, in the infrared sensor chip, the on-contact point of the thermopile constituting the temperature sensing part is formed in an area where the thermal infrared detection part overlaps with the cavity, and the cold contact is hollow in the thermal infrared detection part. It is formed in the area | region which does not overlap with a part. In the infrared sensor chip, on the one surface side of the silicon substrate, a MOS transistor serving as a switching element for selecting a pixel portion is formed in each pixel portion.

In the above-described infrared sensor, the infrared sensor chip and the IC chip are housed in one package, so that the wiring between the infrared sensor chip and the IC chip can be shortened, so that the influence of foreign noise can be reduced and the noise immunity can be reduced. Can be improved.

However, in this infrared sensor, the output signal (output voltage) of each pixel portion of the infrared sensor chip includes the offset voltage resulting from the heat generation of the IC chip, and the S / N ratio is uneven between the pixel portions. Will not. In short, the S / N ratio is uneven in the plane of the infrared sensor chip. Here, the heat transmitted from the IC chip to the silicon substrate of the infrared sensor chip by the path through the package body mainly raises the temperature of the cold junction, which causes a negative offset voltage. On the other hand, the heat transmitted to the infrared sensor chip by heat conduction or heat radiation through a medium (for example, nitrogen gas, etc.) in the package from the IC chip mainly raises the temperature of the on-contact point, thereby generating a positive offset voltage. It becomes a factor.

This invention is made | formed in view of the said reason, The objective is to provide the infrared sensor which can suppress the variation of S / N ratio in the surface of the infrared sensor chip resulting from heat generation of an IC chip.

Infrared sensor of the present invention is an IC for signal processing the output signal of the infrared sensor chip and the infrared sensor chip in which a plurality of pixel parts having a temperature sensing unit constituted by a thermopile arranged in an array shape on one surface side of the semiconductor substrate And a package in which the infrared sensor chip and the IC chip are accommodated, wherein the package includes a package main body in which the infrared sensor chip and the IC chip are arranged in a horizontal direction, and a target to be detected by the infrared sensor chip. A package cover which has a function of transmitting infrared rays of the package and is hermetically bonded to the package main body in a form surrounding the infrared sensor chip and the IC chip between the package main body, and in the package, the infrared sensor chip The temperature change amount of the on-contact point and the cold contact point of each pixel part according to the heat generation of the said IC chip which has a window hole which passes infrared rays to the By providing the cover member for equalizing characterized in that formed.

In this infrared sensor, the cover member is provided in front of the infrared sensor chip and has a front plate portion formed with the window hole, and extends from the outer periphery of the front plate portion to the rear side, wherein the IC chip and the infrared ray are provided. It is preferable that it consists of the side board part joined to the said package main body between sensor chips.

In the infrared sensor, the package main body retreats the surface of the second region in which the IC chip is mounted, rather than the surface of the first region in which the infrared sensor chip is mounted, and the cover member is formed of the infrared sensor chip. A front plate part located at the front side and formed with the window hole, and extending from the outer periphery of the front plate part to the rear side, and located on each side of both sides of the infrared sensor chip along the horizontal installation direction of the infrared sensor chip and the IC chip; It is preferable to have two side plate parts joined to a package main body, and the said front plate part is formed in the magnitude | size which the said infrared sensor chip and the said IC chip enter in the projection area | region of the outer peripheral line of the said board part.

In this infrared sensor, the cover member has a rectangular shape in which the window hole of the front plate portion has a rectangular shape, and the inner circumferential line on the IC chip side of the window hole is located closer to the IC chip side than the outer circumferential line on the IC chip side of the infrared sensor chip in plan view. It is desirable to have.

In this infrared sensor, it is preferable that the cover member has a front plate portion which is located in front of the infrared sensor chip and the window hole is formed, and a side plate portion which extends from the front plate portion to the rear side and is in contact with the package body.

In this infrared sensor, it is preferable that the cover member is disposed in close proximity to both the infrared sensor chip and the IC chip.

In this infrared sensor, it is preferable that the said front plate part is formed in the size which at least the said infrared sensor chip enters in the projection area | region of the outer peripheral line of this front plate part.

In this infrared sensor, the cover member is preferably formed of a conductive material.

In this infrared sensor, it is preferable that the cover member is bonded to the package main body by a conductive material.

In this infrared sensor, it is preferable that the package main body includes a base made of an insulating material and an electron shield layer made of a metal material.

The present invention can suppress the variation of the S / N ratio in the plane of the infrared sensor chip due to the heat generation of the IC chip.

FIG. 1 relates to an infrared sensor of Embodiment 1, in which FIG. 1 (a) is a partially broken schematic perspective view, FIG. 1 (b) is a schematic perspective view with the package cover removed, and FIG. 1 (c) shows the package cover. Fig. 1 (d) is a schematic sectional view, and Fig. 1 (e) is a schematic sectional view of an essential part of an infrared sensor chip.
Fig. 2 is a plan layout diagram of the infrared sensor chip in the above.
3 is a plan layout diagram of the pixel portion of the infrared sensor chip in the above.
Fig. 4 is a plan layout diagram of the pixel portion of the infrared sensor chip in the above.
Fig. 5 shows the main part of the pixel portion of the infrared sensor chip in the above, Fig. 5 (a) is a planar layout diagram and Fig. 5 (b) is a schematic sectional view corresponding to the DD 'cross section of Fig. 5 (a).
Fig. 6 is a plan layout diagram of main parts of the pixel portion of the infrared sensor chip in the above.
Fig. 7 is a plan layout view of main parts of the pixel portion of the infrared sensor chip in the above.
Fig. 8 shows the main part of the pixel portion of the infrared sensor chip in the above, Fig. 8 (a) is a plan layout diagram and Fig. 8 (b) is a schematic sectional view corresponding to the DD 'cross section of Fig. 8 (a).
Fig. 9 shows the main part including the cold junction of the infrared sensor chip in the above, Fig. 9 (a) is a planar layout diagram and Fig. 9 (b) is a schematic sectional view.
Fig. 10 shows the main part including the on-contact point of the infrared sensor chip in the above, Fig. 10 (a) is a planar layout diagram and Fig. 10 (b) is a schematic sectional view.
Fig. 11 is a schematic sectional view of an essential part of the pixel portion of the infrared sensor chip in the above.
12 is a schematic sectional view of a main portion of the pixel portion of the infrared sensor chip in the above.
13 (a) and 13 (b) are diagrams for explaining a main part of the infrared sensor chip in the above.
Fig. 14 is an equivalent circuit diagram of the infrared sensor chip in the above.
15 (a) and 15 (b) are sectional views of the main steps for explaining the method for manufacturing the infrared sensor in the above.
FIG.16 (a) and FIG.16 (b) are main process cross section for demonstrating the manufacturing method of the infrared sensor in the above.
17 (a) and 17 (b) are main cross-sectional views for explaining the method for manufacturing the infrared sensor in the above.
18 (a) and 18 (b) are main cross-sectional views for explaining the method for manufacturing the infrared sensor in the above.
Fig. 19 relates to the infrared sensor of the second embodiment, Fig. 19 (a) is a partially broken schematic perspective view, Fig. 19 (b) is a schematic perspective view with a package cover removed, and Fig. 19 (c) is a package lid; Fig. 19 (d) is a schematic sectional view, and Fig. 19 (e) is a schematic sectional view of an essential part of the infrared sensor chip.
Fig. 20 relates to the infrared sensor of Embodiment 3, wherein Fig. 20 (a) is a partially broken schematic perspective view, Fig. 20 (b) is a schematic perspective view with the package cover removed, and Fig. 20 (c) shows the package cover. Fig. 20 (d) is a schematic cross-sectional view, and Fig. 20 (e) is a schematic cross-sectional view of an essential part of the infrared sensor chip.
Fig. 21 relates to the infrared sensor of the fourth embodiment, in which Fig. 21 (a) is a schematic perspective view of partly broken, Fig. 21 (b) is a schematic perspective view with the package cover removed, and Fig. 21 (c) shows the package cover; Fig. 21 (d) is a schematic sectional view, and Fig. 21 (e) is a schematic sectional view of an essential part of the infrared sensor chip.

(Embodiment 1)

Hereinafter, the infrared sensor of this embodiment is demonstrated, referring FIGS. 1-14.

The infrared sensor of this embodiment accommodates an infrared sensor chip 100, an IC chip 102 for signal processing an output signal of the infrared sensor chip 100, an infrared sensor chip 100, and an IC chip 102. The package 103 is provided. In addition, the thermistor 101 for measuring the absolute temperature of the infrared sensor is also housed in the package 103.

As shown in Fig. 1 (e), the infrared sensor chip 100 has a thermal infrared detector 3 having a thermopile 30a on one surface side (front side) of the semiconductor substrate 1 made of a silicon substrate. Formed.

The package 103 includes an infrared sensor chip 100 and an IC chip between the package body 104 on which the infrared sensor chip 100, the IC chip 102, and the thermistor 101 are mounted, and the package body 104. The package cover 105 is hermetically bonded to the package main body 104 in a form surrounding the 102 and the thermistor 101.

The package main body 104 is mounted with the IC chip 102 and the infrared sensor chip 100 installed in parallel. In addition, the package main body 104 is mounted with the infrared sensor chip 100 and thermistor 101 arranged in a direction perpendicular to the horizontal installation direction of the IC chip 102 and the infrared sensor chip 100. On the other hand, the package lid 105 has a function of transmitting infrared rays to be detected by the infrared sensor chip 100 and conductivity.

The package cover 105 includes a metal cap 152 mounted to cover the one surface side (front side) of the package body 104 and a portion of the metal cap 152 corresponding to the infrared sensor chip 100. It consists of the lens 153 which closes the formed opening window 152a. Here, the lens 153 has a function of transmitting infrared rays and a function of converging infrared rays with the infrared sensor chip 100.

In addition, the infrared sensor is provided in the package 103 with the cover member 106 which equalizes the temperature change amount of the on-contact point T1 and the cold junction T2 of each pixel part 2 according to the heat_generation | fever of the IC chip 102. . Here, the cover member 106 has a window hole 108 that passes infrared rays to the infrared sensor chip 100. That is, in each pixel portion 2, a temperature difference ΔT may occur between the on-contact point T1 and the cold junction T2 due to the heat generation of the IC chip 102. In this embodiment, by providing the cover member 106, the temperature difference ΔT between each pixel portion 2 (temperature difference ΔT between the on-contact point T1 and the cold contact T2 due to the heat generated by the IC chip 102). The deviation of can be made small.

Moreover, the cover member 106 which equalizes the temperature change amount of the on-contact point T1 and the cold junction T2 of each pixel part 2 according to heat_generation | fever of the IC chip 102 is optional. As described later, the cover member 106 is located in front of the infrared sensor chip 100 and is formed in contact with the package body 104 extending from the front plate portion to the front plate portion 107 and the window hole 108. The joined side plate part 109 is provided. The cover member 106 is disposed in close proximity to both the infrared sensor chip 100 and the IC chip 102.

Hereinafter, each component is further demonstrated.

The infrared sensor chip 100 has a plurality of pixel portions 2 having a thermal infrared detector 3 and a MOS transistor 4 which is a switching element for pixel selection, on the one surface side of the semiconductor substrate 1 in the form of an array. (Here, in a two-dimensional array shape) (see FIG. 2). In this embodiment, although m x n pixel parts 2 (8 x 8 in the example shown in FIG. 2) are formed on the one surface side of one semiconductor substrate 1, the pixel part 2 The number and arrangement of a) are not particularly limited. In addition, in this embodiment, the temperature sensitive part 30 of the thermal infrared detection part 3 is comprised by connecting several thermopile 30a (refer FIG. 3) in series here. In FIG. 14, the equivalent circuit of the temperature reduction part 30 in the thermal infrared detection part 3 is shown by the voltage source corresponding to the thermal electromotive force of the said temperature reduction part 30. In FIG.

3, 5, and 14, the MOS transistor (1) of one end of the temperature sensing section 30 of the plurality of thermal infrared detectors 3 in each column is described above. A plurality of vertical read lines 7 commonly connected to each column via 4), and the gate electrode 46 of the MOS transistor 4 corresponding to the temperature-sensing portion 30 of the column-type infrared detector 3 in each row, Each row includes a plurality of horizontal signal lines 6 connected in common. In addition, the infrared sensor chip 100 has a plurality of ground lines 8 in which the p ⁺ type well regions 41 of the MOS transistors 4 in each column are commonly connected to each column, and each ground line 8 is common. The connected common ground line 9 is provided. In addition, the infrared sensor chip 100 includes a plurality of reference bias lines 5 in which the other ends of the temperature sensing unit 30 of the plurality of thermal infrared detectors 3 in each column are commonly connected to each column. However, the infrared sensor chip 100 is able to read in time series the outputs of the temperature reduction part 30 of all the thermal infrared detection parts 3. In short, the infrared sensor chip 100 is provided in the thermal infrared detector 3 and the thermal infrared detector 3 on the one surface side of the semiconductor substrate 1 and reads the output of the thermal infrared detector 3. A plurality of pixel portions 2 having MOS transistors 4 to be formed are formed.

In the MOS transistor 4, the gate electrode 46 is connected to the horizontal signal line 6, the source electrode 48 is connected to the reference bias line 5 via the temperature sensing unit 30, and the drain electrode ( 47 is connected to the vertical read line 7. Here, each of the horizontal signal lines 6 is electrically connected to the pad Vsel for pixel selection, and each of the reference bias lines 5 is commonly connected to the common reference bias line 5a and is each vertical. Each read line 7 is electrically connected to a pad Vout for particular output. The common ground line 9 is electrically connected to a pad Gnd for ground, the common reference bias line 5a is electrically connected to a pad Vref for reference bias, and the semiconductor substrate 1 is a pad for a substrate. It is electrically connected to Vdd.

However, the MOS transistor 4 can read the output voltage of each pixel part 2 sequentially by controlling the electric potential of the pad Vsel for pixel selection so that it may turn on sequentially. For example, the potential of the pad Vref for the reference bias is 1.65V, the potential of the pad Gnd for the ground is 0V, the potential of the pad Vdd for the substrate is 5V, and the potential of the pad Vsel for the specific pixel selection is set. If it is 5V, the corresponding MOS transistor 4 is turned on, and the output voltage (1.65V + output voltage of the temperature reduction unit 30) of the pixel portion 2 is read from the corresponding pad Vout for output. If the potential of the pad Vsel for pixel selection is 0 V, the MOS transistor 4 is turned off, and the output voltage of the pixel portion 2 cannot be read from the pad Vout for output. In Fig. 2, all of the pads Vsel for pixel selection, pad Vref for reference bias, pad Gnd for ground, pad Vout for output, and the like are all illustrated as pads 80 in Fig. 14.

Hereinafter, structures of each of the thermal infrared detector 3 and the MOS transistor 4 will be described. In the present embodiment, as the semiconductor substrate 1 described above, a single crystal silicon substrate is used in which the conductivity type is n-type and the one surface is a (100) plane.

The thermal infrared detection unit 3 of each pixel unit 2 is formed in the area A1 (see FIG. 5) for forming the thermal infrared detection unit 3 on the one surface side of the semiconductor substrate 1. Moreover, the MOS transistor 4 of each pixel part 2 is formed in the area | region A2 (refer FIG. 5) for formation of the MOS transistor 4 in the said one surface side of the semiconductor substrate 1. As shown in FIG.

In the infrared sensor chip 100, a cavity 11 is formed directly below a part of each thermal infrared detector 3 on the one surface side of the semiconductor substrate 1. The thermal infrared detection unit 3 has a support 3d formed at a corner portion of the cavity 11 at the one surface side of the semiconductor substrate 1 and a cavity in plan view from the one surface side of the semiconductor substrate 1. The first thin film structure portion 3a covering the portion 11 is provided. The first thin film structure portion 3a includes an infrared absorbing portion 33 that absorbs infrared rays. Here, the 1st thin film structure part 3a is provided along the circumferential direction (horizontal direction with respect to the paper surface in FIG. 3) of the cavity part 11, and the some 2nd thin film structure part supported by the support part 3d ( 3aa and the connection piece 3c which connects adjacent 2nd thin film structure part 3aa. In the thermal infrared detector 3 of the example of FIG. 3, the first thin film structure portion 3a is separated into six second thin film structure portions 3aa by providing a plurality of linear slits 13. . Hereinafter, each part divided | segmented corresponding to each of the 2nd thin film structure parts 3aa among the infrared absorbing parts 33 (referred to as the 1st infrared absorbing part 33) is called the 2nd infrared absorbing part 33a.

The thermal infrared detector 3 is provided with a thermopile 30a for each second thin film structure 3aa. Here, the thermopile 30a is provided with the on-contact point T1 in the 2nd thin film structure part 3aa, and the cold junction T2 is provided in the support part 3d. In other words, the on-contact T1 is formed in the first region overlapping the cavity 11 in the thermal infrared detection unit 3, and the cold junction T2 is the second in the thermal infrared detection unit 3 not overlapping the cavity 11. It is formed in the area.

In other words, the infrared sensor chip 100 includes a plurality of pixel portions 2. The pixel portion 2 includes a thermal infrared detector 3 formed on the one surface side (front surface side) of the semiconductor substrate 1. The thermal infrared detection unit 3 includes a temperature sensing unit 30. The cavity part 11 is formed in the site | part corresponding to a part of the thermal infrared detection part 3 by the said one surface side of the semiconductor substrate 1. The on-contact point T1 of the temperature sensing unit 30 is formed in the first region overlapping the cavity 11 in the thermal infrared detecting unit 3, and the cold contact T2 of the temperature sensing unit 30 is the thermal infrared detecting unit 3. In the second region not overlapping with the cavity 11.

In addition, since the temperature change part 30 of the thermal infrared detection part 3 has a connection relationship in which the output change with respect to a temperature change becomes large compared with the case where the output is taken out for every thermopile 30a, all the thermopiles 30a are electrically connected. Is connected. In the example of FIG. 3, the temperature reduction part 30 connects six thermopile 30a in series. However, the connection relationship mentioned above is not limited to the connection relationship which series-connects all the several thermopiles 30a. For example, when the series circuits of three thermopiles 30a are connected in parallel, compared with the case where six thermopiles 30a are connected in parallel or the output is taken out for each thermopile 30a, respectively. Sensitivity can be increased. In addition, compared with the case where all six thermopiles 30a are connected in series, the electrical resistance of the temperature reduction part 30 can be lowered and thermal noise is reduced, so that the S / N ratio is improved.

Here, in the thermal type infrared detector 3, rectangular bridge portions 3bb and 3bb are viewed in two planes connecting the support portion 3d and the second infrared ray absorbing portion 33a for every second thin film structure portion 3aa. Is spaced apart in the circumferential direction of the cavity 11. That is, each of the second thin film structure portions 3aa includes a second infrared absorbing portion 33a and two bridge portions 3bb and 3bb. As a result, two bridge portions 3bb and 3bb and the second infrared ray absorbing portion 33a are spatially separated and a C-shaped slit 14 is formed in a plane communicating with the cavity portion 11. The support part 3d which is the site | part which surrounds the 1st thin film structure part 3a in planar view among the thermal infrared detection parts 3 is a rectangular frame shape. In addition, the bridge portion 3bb is formed by the above-described slits 13 and 14 so that portions other than the connection portions between the second infrared ray absorbing portion 33a and the support portion 3d are different from the second infrared ray absorbing portion 33a. ) And the support portion 3d. Here, the 2nd thin film structure part 3aa has the dimension of the extension direction from the support part 3d as 93 micrometers, and the dimension of the width direction orthogonal to this extension direction as 75 micrometers, and the width dimension of each bridge part 3bb. Is set to 23 µm and the width of each of the slits 13 and 14 is 5 µm, but these values are not particularly limited as an example.

The first thin film structure 3a includes the silicon oxide film 1b formed on the one surface side of the semiconductor substrate 1, the silicon nitride film 32 formed on the silicon oxide film 1b, and the silicon nitride film 32. Lamination of the temperature sensitive portion 30 formed on the layer, the interlayer insulating film 50 formed to cover the temperature sensitive portion 30 on the surface side of the silicon nitride film 32, and the passivation film 60 formed on the interlayer insulating film 50. It is formed by patterning a structural part. Although the interlayer insulating film 50 is comprised by the BPSG film, and the passivation film 60 is comprised by the laminated film of a PSG film and the NSG film formed on this PSG film, it is not limited to this, For example, a silicon nitride film It may be comprised by.

In the thermal infrared detection unit 3 described above, a portion other than the bridge portions 3bb and 3bb of the first thin film structure portion 3a constitutes the first infrared absorption portion 33. The support portion 3d is composed of the silicon oxide film 1b, the silicon nitride film 32, the interlayer insulating film 50, and the passivation film 60.

In addition, in the infrared sensor chip 100, the laminated film of the passivation film 60 is formed by the interlayer insulating film 50, on the one surface side of the semiconductor substrate 1, the area A1 and the MOS for forming the thermal infrared detection unit 3. It is formed over the formation area A2 of the transistor 4, and the part of the laminated film formed in the formation area A1 of the thermal infrared detection unit 3 forms the infrared absorption film 70 (see Fig. 5 (b)). I am also serving. Here, when the refractive index of the infrared absorption film 70 is n ₂ and the center wavelength of the infrared ray of the detection target is λ, the thickness t2 of the infrared absorption film 70 is set to λ / 4n ₂ . Absorption efficiency of the infrared ray of the wavelength (for example, 8-12 micrometers) can be improved, and high sensitivity can be aimed at. For example, in the case of n ₂ = 1.4 and lambda = 10 µm, t ₂ x 1.8 µm may be used. In addition, in this embodiment, the film thickness of the interlayer insulation film 50 is 0.8 micrometer, the film thickness of the passivation film 60 is 1 micrometer (the film thickness of a PSG film is 0.5 micrometer, and the film thickness of an NSG film is 0.5 micrometer). .

Moreover, in each pixel part 2, the inner peripheral shape of the cavity part 11 is rectangular, and the connection piece 3c is formed in X shape by planar view, and the extension direction (support part) of the 2nd thin film structure part 3aa is carried out. 2nd thin film structure parts 3aa and 3aa which adjoin in the diagonal direction which crosses (extension direction from 3d)), and 2nd thin film structure parts 3aa and 3aa which adjoin in the extension direction of 2nd thin film structure part 3aa 2nd thin film structure parts 3aa and 3aa adjacent to each other in the direction orthogonal to the extending direction of the 2nd thin film structure part 3aa are connected.

The thermopile 30a has one end portion of the n-type polysilicon layer 34 and the p-type polysilicon layer 35 formed over the second thin film structure 3aa and the support portion 3d on the silicon nitride film 32. In the example shown in FIG. 3, a plurality of electrically connected portions (first connecting portions) 36 made of a metallic material (for example, Al-Si, etc.) are formed on the infrared incident surface side of the second infrared absorbing portion 33a. And 9 thermocouples (for each thermopile 30a). That is, in this embodiment, the 1st end part of the n-type polysilicon layer 34 and the 1st end part of the p-type polysilicon layer 35 are electrically connected by the connection part 36. In addition, the thermopile 30a is provided with the other end (the second end of the n-type polysilicon layer 34) of the n-type polysilicon layer 34 of the thermocouple adjacent to each other on the one surface side of the semiconductor substrate 1. The other end of the p-type polysilicon layer 35 (the second end of the p-type polysilicon layer 35) is connected to a connection portion (second connection portion) 37 made of a metal material (for example, Al-Si or the like). It is joined together and electrically connected. Here, the thermopile 30a comprises the one end portion of the n-type polysilicon layer 34 and the one end portion and the connection portion 36 of the p-type polysilicon layer 35 to form an on-contact point T1. The other end of the n-type polysilicon layer 34 and the other end of the p-type polysilicon layer 35 and the connecting portion 37 constitute a cold junction T2. In other words, each of the on-contact points T1 of the thermopile 30a is formed in an area overlapping the cavity 11 in the thermal infrared detection unit 3, and each cold contact T2 is formed in the cavity 11 in the thermal infrared detection unit 3. It is formed in the area which does not overlap with. In the infrared sensor chip 100 according to the present embodiment, each of the n-type polysilicon layers 34 and the p-type polysilicon layers 35 of the thermopile 30a is the bridge portion 3bb described above. , 3bb) and a portion formed on the silicon nitride film 32 on the one surface side of the semiconductor substrate 1 can absorb infrared rays.

In other words, the thermosensitive section 30 has at least one thermocouple including the n-type polysilicon layer 34 and the p-type polysilicon layer 35. The on-contact point T1 of the thermocouple is formed in a first region overlapping the cavity 11 in the thermo-infrared detector 3, and the cold junction T2 of the thermocouple overlaps the cavity 11 in the thermo-infrared detector 3. It is formed in the 2nd area | region which does not support.

In addition, since the shape of the cavity 11 has a square pyramid shape, and the center portion viewed from the plane has a larger depth dimension than the circumference portion, the infrared sensor chip 100 is turned on at the center portion of the first thin film structure portion 3a. The planar layout of the thermopile 30a in each pixel part 2 is designed so that the contact point T1 may gather. That is, in the two second thin film structure portions 3aa in the middle in the vertical direction of FIG. 3, as shown in FIGS. 3 and 6, the parallel direction of the three second thin film structure portions 3aa (the vertical direction in FIG. 3). On the other hand, the on-contact point T1 is arranged side by side, while in the two second thin film structure portions 3aa in the upper and lower directions, as shown in FIGS. 3 and 7, the three second thin film structure portions 3aa are disposed. ), The contact point T1 is concentrated on the side close to the second thin film structure portion 3aa (downward in Fig. 3) in the parallel direction, and the two second thin film structure portions 3aa on the lower side in the vertical direction are disposed. In FIG. 3, as shown in FIG. 3, the hot-contact point T1 is concentrated on the side (upper part in FIG. 3) close to the second thin film structure part 3aa in the middle in the parallel direction of the three second thin film structure parts 3aa. Doing. However, in the infrared sensor chip 100 according to the present embodiment, the second thin film structure portion in which the plurality of on-contact points T1 of the second thin film structure portion 3aa above and below in the vertical direction in FIG. 3 is arranged is in the middle. Since the temperature change of the on-contact point T1 can be enlarged compared with the case where it is the same as the arrangement | positioning of several on-contact point T1 of (3aa), a sensitivity can be improved. In addition, in this embodiment, when making the depth of the deepest part of the cavity part 11 into predetermined depth dp (refer FIG. 5 (b)), predetermined depth dp is set to 200 micrometers, but this value is an example, It does not specifically limit.

Moreover, the 2nd thin film structure part 3aa absorbs infrared rays while suppressing the curvature of the 2nd thin film structure part 3aa in the area | region which does not form the thermopile 30a in the infrared incident surface side of the silicon nitride film 32. Moreover, as shown in FIG. An infrared absorbing layer 39 (see FIGS. 1, 3, 5, and 11) formed of an n-type polysilicon layer is formed. Moreover, the connecting piece 3c which connects adjacent 2nd thin film structure parts 3aa and 3aa is provided with the reinforcement layer 39b (refer FIG. 8) which consists of an n type polysilicon layer which reinforces the said connecting piece 3c. . Here, the reinforcing layer 39b is formed integrally with the infrared absorbing layer 39. However, in the infrared sensor chip 100, since the connecting piece 3c is reinforced by the reinforcing layer 39b, it is possible to prevent breakage due to stress generated due to external temperature change or impact during use. The damage at the time of manufacture can be reduced, and the yield rate can be improved. In addition, in this embodiment, although the connection piece 3c shown in FIG. 8 sets 24 micrometers in length dimension L1, 5 micrometers in width dimension L2, and the width dimension L3 of the reinforcement layer 39b to 1 micrometer, these numerical examples are an example. It does not specifically limit. However, when the silicon substrate is used as the semiconductor substrate 1 as in the present embodiment, and the reinforcement layer 39b is formed of the n-type polysilicon layer, the reinforcement layer 39b is formed at the time of forming the cavity 11. In order to prevent this etching, the width dimension L3 of the reinforcing layer 39b is set smaller than the width dimension L2 of the connecting piece 3c, and both sides of the reinforcing layer 39b are larger than both sides of the connecting piece 3c in plan view. It needs to be located inside.

In addition, as shown in Figs. 8 and 13 (b), the infrared sensor chip 100 has the fillet portions 3f, respectively, between the circumference of both sides of the connecting piece 3c and the lateral circumference of the second thin film structure portion 3aa. 3f) is formed, and the chamfer 3e is formed also between the substantially circumferential side circumferences of the X-shaped connecting piece 3c. However, in the infrared sensor chip 100, as shown in FIG. 13A, the stress concentration at the connection portion between the connecting piece 3c and the second thin film structure portion 3aa is compared with the case where the fillet portion is not formed. It can be alleviated, the residual stress which arises at the time of manufacture can be reduced, the damage at the time of manufacture can be reduced, and the yield rate can be improved. In addition, breakage due to stress generated due to external temperature change or impact during use can be prevented. In addition, in the example shown in FIG. 8, although each fillet part 3f, 3e is set to R fillet part whose R (al) is 3 micrometers, it is not limited to R fillet part, For example, C fillet You may be rich.

In addition, the infrared sensor chip 100 includes a support portion 3d, one bridge portion 3bb, a second infrared ray absorbing portion 33a, and the other bridge portion 3bb in each of the thermal infrared detection portions 3; Fault diagnosis wiring (hereinafter referred to as fault diagnosis wiring or self-diagnosis wiring) 139 including an n-type polysilicon layer drawn to span the support part 3d is provided, and all the fault diagnosis wiring 139 are connected in series. Doing. However, by energizing the series circuit of the m x n failure diagnosis wirings 139, it is possible to detect the presence or absence of damage such as folding of the bridge portion 3bb.

In other words, the infrared sensor chip 100 is used for folding or failure diagnosis of the bridge portion 3bb by the presence or absence of energization of the m × n fault diagnosis wiring 139 to the series circuit during the inspection or use during the manufacture. Disconnection or the like of the wiring 139 can be detected. In addition, in the infrared sensor chip 100, during the inspection or use described above, the thermal sensing unit is energized by a series circuit of the m × n fault diagnosis wirings 139 and detecting the output of each of the thermal sensing units 30. It becomes possible to detect the presence or absence of the disconnection of (30), the deviation of the sensitivity (output deviation of the temperature sensitive part 30), and the like. Here, regarding the variation in the sensitivity, it is possible to detect the variation in the sensitivity for each pixel portion 2, for example, the warping of the first thin film structure portion 3a and the semiconductor of the first thin film structure portion 3a. It becomes possible to detect the deviation of the sensitivity resulting from sticking to the board | substrate 1, etc. Here, in the infrared sensor chip 100 according to the present embodiment, the failure diagnosis wiring 139 is folded in the vicinity of a group of the plurality of on-contact points T1 in a plan view to form a meandering shape. Therefore, each on-contact point T1 can be efficiently warmed by Joule heat which generate | occur | produces by energizing the fault diagnosis wiring 139. The above-described fault diagnosis wiring 139 is formed with the same thickness on the same plane as the n-type polysilicon layer 34 and the p-type polysilicon layer 35.

The infrared absorption layer 39 and the fault diagnosis wiring 139 described above have the same impurity concentration (for example, 10 ¹⁸ to 10) in the same n-type impurity (for example, phosphorus) as the n-type polysilicon layer 34. ²⁰ cm ^-3 ) and formed simultaneously with the n-type polysilicon layer 34. For example, boron may be employed as the p-type impurity of the p-type polysilicon layer 35, and the impurity concentration may be appropriately set in the range of, for example, 10 ¹⁸ to 10 ²⁰ cm ^-3 . In this embodiment, the impurity concentration of each of the n-type polysilicon layer 34 and the p-type polysilicon layer 35 is 10 ¹⁸ to 10 ²⁰ cm ^-3 , and the resistance value of the thermocouple can be reduced, and the S / N ratio Can be improved. In addition, although the infrared absorption layer 39 and the fault diagnosis wiring 139 are doped with the same n-type impurity as the n-type polysilicon layer 34 to the same impurity concentration, it is not limited to this, For example, p-type The same impurities as the polysilicon layer 35 may be doped at the same impurity concentration. In short, the fault diagnosis wiring (self-diagnosis wiring) 139 is formed of the same material as the n-type polysilicon layer 34 that is the first thermoelectric element or the p-type polysilicon layer 35 that is the second thermoelectric element. desirable.

However, the center of the present embodiment in the form, n-type polysilicon layer (34), p-type polysilicon layer 35, the infrared absorption layer 39, and the failure diagnosis of the wiring 139 is a refractive index of n _1, the detected infrared light When the wavelength is λ, the thickness t1 of each of the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, and the fault diagnosis wiring 139 is set to λ / 4n ₁ . have. However, the absorption efficiency of the infrared ray of the wavelength (for example, 8-12 micrometers) of a detection object can be improved, and high sensitivity can be aimed at. For example, in the case of n ₁ = 3.6 and lambda = 10 µm, t 1?

In addition, in this embodiment, the impurity concentration of each of the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, and the fault diagnosis wiring 139 is 10 ¹⁸ to 10 ²⁰ cm ^-3. For this reason, reflection of infrared rays can be suppressed, making infrared absorption high, and S / N ratio of the output of the temperature-sensing part 30 can be raised. In addition, since the infrared absorbing layer 39 and the fault diagnosis wiring 139 can be formed in the same process as the n-type polysilicon layer 34, the cost can be reduced.

Here, the connection part 36 and the connection part 37 of the thermosensitive part 30 are isolate | separated from the said one surface side of the semiconductor substrate 1 by the interlayer insulation film 50. As shown in FIG. One end portion (n-type polysilicon) of each of the polysilicon layers 34 and 35 is formed through the contact holes 50a ₁ and 50a ₂ formed in the interlayer insulating film 50. The first end of the layer 34 and the first end of the p-type polysilicon layer 35) are electrically connected to each other (see FIG. 10). The connection portion 37 on the cold junction T2 side has the other ends (n-type poly) of the respective polysilicon layers 34 and 35 through the contact holes 50a ₃ and 50a ₄ formed in the interlayer insulating film 50. The second end of the silicon layer 34 and the second end of the p-type polysilicon layer 35) are electrically connected to each other (see Fig. 9).

As described above, the MOS transistor 4 is formed in the region A2 for forming the MOS transistor 4 on the one surface side of the semiconductor substrate 1 (see FIG. 5).

In the MOS transistor 4, as illustrated in FIGS. 5 and 12, a p ⁺ type well region 41 is formed on the one surface side (front side) of the semiconductor substrate 1, and a p ⁺ type well region ( In the 41, an n ⁺ -type drain region 43 and an n ⁺ -type source region 44 are formed apart from each other. In the p ⁺ type well region 41, a p ⁺⁺ type channel stopper region 42 surrounding the n ⁺ type drain region 43 and the n ⁺ type source region 44 is formed.

In the p ⁺ type well region 41, a gate insulating film 45 made of a silicon oxide film (thermal oxide film) is interposed on a portion located between the n ⁺ type drain region 43 and the n ⁺ type source region 44. A gate electrode 46 made of an n-type polysilicon layer is formed.

Further, on the n ⁺ type drain region 43, a drain electrode 47 made of a metal material (for example, Al-Si, etc.) is formed, and on the n ⁺ type source region 44, a metal material (eg, For example, a source electrode 48 made of Al-Si or the like is formed.

The gate electrode 46, the drain electrode 47, and the source electrode 48 are insulated and separated by the interlayer insulating film 50 described above. Here, the drain electrode 47 is electrically connected to the n ⁺ type drain region 43 through the contact hole 50d formed in the interlayer insulating film 50, and the source electrode 48 is formed in the interlayer insulating film 50. It is electrically connected with the n ⁺ type source region 44 through one contact hole 50e.

In each pixel portion 2 of the infrared sensor chip 100, one end of the source electrode 48 and the temperature sensing portion 30 of the MOS transistor 4 is electrically connected, and the other end of the temperature sensing portion 30 is a reference bias. It is electrically connected to the line 5. In each pixel portion 2, the drain electrode 47 of the MOS transistor 4 is electrically connected to the vertical read line 7, and the gate electrode 46 is integrated with the gate electrode 46 in succession. It is electrically connected with the horizontal signal line 6 which consists of n-type polysilicon wiring currently formed. In each pixel portion 2, an electrode for ground (hereinafter, Al-Si, etc.) made of a metal material (for example, Al-Si) is formed on the p ⁺⁺ channel stopper region 42 of the MOS transistor 4. A ground electrode (49) is formed. The ground electrode 49 has a common ground line for biasing the p ⁺⁺ channel stopper region 42 at a lower potential than the n ⁺ type drain region 43 and the n ⁺ type source region 44. 8) is electrically connected. The ground electrode 49 is electrically connected to the p ⁺⁺ type channel stopper region 42 via the contact hole 50f formed in the interlayer insulating film 50.

According to the above-described infrared sensor chip 100, since the self-diagnosis wiring 139 is provided to warm the on-contact point T1 by Joule heat generated by energization, it is energized by the self-diagnosis wiring 139 and the thermopile ( By measuring the output of 30a), it is possible to determine whether there is a failure, such as disconnection of the thermopile 30a, so that the reliability can be improved, and the self-diagnostic wiring 139 is a thermal infrared detector. In (3), since it is arrange | positioned so that it may not overlap with the thermopile 30a in the area | region which overlaps the cavity part 11 of the semiconductor substrate 1, the on-contact point T1 of the thermopile 30a by the self-diagnosis wiring 139 The increase in heat capacity can be prevented, and the sensitivity and response speed can be improved.

Here, since the infrared sensor chip 100 also absorbs infrared rays from the outside in the normal time in which the self-diagnosis is not performed at the time of use, the temperature of the plurality of on-contact points T1 can be equalized. It is possible to improve the sensitivity. In addition, in the infrared sensor chip 100, since the infrared absorbing layer 39 and the reinforcing layer 39b also absorb infrared rays from the outside, the temperature of the plurality of on-contact points T1 can be made uniform, thereby improving the sensitivity. can do. In addition, although the self-diagnosis at the time of use of the infrared sensor chip 100 is performed regularly by the self-diagnosis circuit (not shown) provided in the IC chip 102, it does not necessarily need to be performed regularly.

In addition, in the infrared sensor chip 100, the first thin film structure portion 3a is provided along the inner circumferential direction of the cavity 11 by providing a plurality of linear slits 13, and each of the thermal infrared detectors. A plurality of second thin film structure portions 3aa extending inward from the support portion 3d, which is the portion surrounding the cavity 11 in (3), and the thermopile 30a for each second thin film structure portion 3aa. Since all the thermopiles 30a are electrically connected due to a connection relationship in which the on-contact point T1 of is provided and the output change with respect to the temperature change becomes larger than the case where the output is taken out for each thermopile 30a, the response Since the speed and the sensitivity can be improved, and the self-diagnostic wiring 139 is formed over all the second thin film structures 3aa, all the thermopiles 30a of the thermal infrared detection unit 3 are collectively collected. Self-diagnosis becomes possible. In addition, in the infrared sensor chip 100, since the connecting pieces 3c connecting the adjacent second thin film structure portions 3aa and 3aa are formed, the warpage of each second thin film structure portion 3aa can be reduced. The structural stability can be improved, and the sensitivity is stabilized.

In addition, the infrared sensor chip 100 has the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorbing layer 39, the reinforcing layer 39b, and the self-diagnosis wiring 139 having the same thickness. Since the uniformity of the stress balance of the 2nd thin film structure part 3aa is improved, the curvature of the 2nd thin film structure part 3aa can be suppressed, the sensitivity variation for every product, and the sensitivity for every pixel part 2 The deviation can be reduced.

In addition, the infrared sensor chip 100 is made of the same material as the self-diagnosis wiring 139 by the same material as the n-type polysilicon layer 34 as the first thermoelectric element or the p-type polysilicon layer 35 as the second thermoelectric element. Since it is formed, the self-diagnosis wiring 139 can be formed at the same time as the first thermoelectric element or the second thermoelectric element, and the cost can be reduced by simplifying the manufacturing process.

In the infrared sensor chip 100, a plurality of pixel portions 2 including an infrared absorbing portion 33 and a self-diagnosis wiring 139 are provided in an array shape on the one surface side of the semiconductor substrate 1. Therefore, in the self-diagnosis at the time of manufacture or use, by energizing the self-diagnosis wiring 139 of each pixel part 2, the sensitivity deviation of the temperature-sensitive part 30 of each pixel part 2 is grasped | ascertained. It becomes possible.

In addition, since the infrared sensor chip 100 has the MOS transistor 4 for reading the output of the temperature-sensing part 30 for each pixel part 2, the number of pads Vout for output (refer FIG. 14) is measured. It can reduce, miniaturization and cost can be aimed at.

Hereinafter, a method of manufacturing the infrared sensor chip 100 will be described with reference to FIGS. 15 to 18.

First, the first silicon oxide film 31 and the second predetermined film thickness (eg, 0.3 μm) having a first predetermined film thickness (eg, 0.3 μm) are formed on the one surface side (front side) of the semiconductor substrate 1 made of a silicon substrate. For example, an insulating layer forming step of forming an insulating layer made of a laminated film of the silicon nitride film 32 having a thickness of 0.1 μm is performed. Thereafter, a portion of the insulating layer corresponding to the formation region A2 of the MOS transistor 4 is left while leaving a part of the portion of the insulating layer corresponding to the formation region A1 of the thermal infrared detection unit 3 by using photolithography technique and etching technique. By performing the insulating layer patterning process of etching removal, the structure shown to FIG. 15 (a) is obtained. Here, the first silicon oxide film 31 is formed by thermally oxidizing the semiconductor substrate 1 at a predetermined temperature (for example, 1100 ° C.), and the silicon nitride film 32 is formed by LPCVD. .

After the above-described insulating layer patterning step, a well region forming step of forming a p ⁺ type well region 41 on the one surface side of the semiconductor substrate 1 is performed, and then on the one surface side of the semiconductor substrate 1. The structure shown in Fig. 15B is obtained by performing a channel stopper region forming step of forming the p ⁺⁺ type channel stopper region 42 in the p ⁺ type well region 41. Here, in the well region forming step, first, a second silicon oxide film (thermal oxide film) 51 is selectively formed by thermally oxidizing the exposed portion on one surface side of the semiconductor substrate 1 to a predetermined temperature. Thereafter, the silicon oxide film 51 is patterned using a photolithography technique and an etching technique using a mask for forming the p ⁺ type well region 41. Subsequently, ion implantation of p-type impurities (for example, boron or the like) is performed, followed by drive-in, thereby forming the p ⁺ type well region 41. In the channel stopper region forming step, a third silicon oxide film (thermal oxide film) 52 is selectively formed by thermally oxidizing the one surface side of the semiconductor substrate 1 to a predetermined temperature. Thereafter, the third silicon oxide film 52 is patterned using a photolithography technique and an etching technique using a mask for forming the p ⁺⁺ type channel stopper region 42. Subsequently, ion implantation of the p-type impurity (for example, boron or the like) is performed, followed by drive-in to form the p ⁺⁺ type channel stopper region 42. The first silicon oxide film 31, the second silicon oxide film 51, and the third silicon oxide film 52 form the silicon oxide film 1b on the one surface side of the semiconductor substrate 1.

After the above-described channel stopper region forming step, a source / drain forming step of forming the n ⁺ type drain region 43 and the n ⁺ type source region 44 is performed. In this source / drain formation step, n-type impurities (for example, phosphorus) are formed in regions to be formed in each of the n ⁺ type drain region 43 and the n ⁺ type source region 44 in the p ⁺ type well region 41. And the like, and then drive-in to form the n ⁺ -type drain region 43 and the n ⁺ -type source region 44.

A gate for forming a gate insulating film 45 made of a silicon oxide film (thermal oxide film) having a predetermined film thickness (for example, 600 Pa) by thermal oxidation on the one surface side of the semiconductor substrate 1 after the source / drain formation step An insulating film formation process is performed. Subsequently, the gate electrode 46, the horizontal signal line 6 (see FIG. 3), the n-type polysilicon layer 34, and the p-type polysilicon layer 35 are formed on the entire surface of the one surface side of the semiconductor substrate 1. A polysilicon layer forming step of forming a non-doped polysilicon layer having a predetermined film thickness (for example, 0.69 µm) as the basis of the infrared absorbing layer 39 and the fault diagnosis wiring 139 by LPCVD is performed. Thereafter, the gate electrode 46, the horizontal signal line 6, the n-type polysilicon layer 34, the p-type polysilicon layer 35, and the infrared ray among the non-doped polysilicon layers are formed using photolithography and etching techniques. A polysilicon layer patterning process is performed in which a portion corresponding to each of the absorbing layer 39 and the fault diagnosis wiring 139 remains. Subsequently, p-type polysilicon is formed by carrying out ion implantation of p-type impurities (for example, boron, etc.) to a portion of the non-doped polysilicon layer corresponding to the p-type polysilicon layer 35 and then driving in. A p-type polysilicon layer forming step of forming the layer 35 is performed. Thereafter, n-type polysilicon layer 34, infrared absorption layer 39, fault diagnosis wiring 139, gate electrode 46, and n-type portions of the non-doped polysilicon layer corresponding to the horizontal line The drive-in is performed after ion implantation of impurities (for example, phosphorus, etc.), followed by n-type polysilicon layer 34, infrared absorption layer 39, fault diagnosis wiring 139, gate electrode 46, and horizontal The structure shown in Fig. 16A is obtained by performing the n-type polysilicon layer forming step of forming the signal line 6. The order of the p-type polysilicon layer forming step and the n-type polysilicon layer forming step may be reversed.

After the above-described p-type polysilicon layer forming step and n-type polysilicon layer forming step are completed, an interlayer insulating film forming step of forming an interlayer insulating film 50 on the one surface side of the semiconductor substrate 1 is performed. Subsequently, each of the contact holes 50a ₁ , 50a ₂ , 50a ₃ , 50a ₄ , 50d, 50e, and 50f in the interlayer insulating film 50 using photolithography and etching techniques (see FIGS. 9, 10, and 12). ), The structure shown in Fig. 16B is obtained by performing a contact hole forming step of forming a). In the interlayer insulating film forming step, a BPSG film having a predetermined film thickness (e.g., 0.8 m) is deposited by the CVD method on the one surface side of the semiconductor substrate 1, and then at a predetermined temperature (e.g., 800 deg. C). By reflow, the planarized interlayer insulating film 50 is formed.

After the above-mentioned contact hole forming process, the connecting portions 36 and 37, the drain electrode 47, the source electrode 48, the reference bias line 5, and the vertical read line are formed on the entire surface of the one surface side of the semiconductor substrate 1. (7) of the predetermined film thickness (e.g., 2 mu m) that is the basis of the ground line 8, the common ground line 9, and each pad Vout, Vsel, Vref, Vdd, Gnd, or the like (see FIG. 14). A metal film forming step of forming a metal film (for example, an Al-Si film) by sputtering or the like is performed. Subsequently, the metal film is patterned using a photolithography technique and an etching technique to connect the connection portions 36 and 37, the drain electrode 47, the source electrode 48, the reference bias line 5, the vertical read line 7, and the ground. The structure shown in Fig. 17A is obtained by performing a metal film patterning process for forming the line 8, the common ground line 9, and the pads Vout, Vsel, Vref, Vdd, Gnd and the like. In addition, the etching in a metal film patterning process is performed by RIE. In addition, by performing this metal film patterning process, an on-contact point T1 and a cold junction T2 are formed.

After the above-described metal film patterning process, the PSG film and the predetermined film thickness (for example, 0.5 mu m) are formed on the one surface side of the semiconductor substrate 1 (i.e., the surface side of the interlayer insulating film 50). For example, the structure shown in FIG. 17 (b) is obtained by performing the passivation film formation process which forms the passivation film 60 which consists of a laminated film of 0.5 micrometers (NSG) film | membrane by CVD method.

After the passivation film forming process described above, a silicon oxide film 31, a silicon nitride film 32, an interlayer insulating film 50, a passivation film 60, and the like are provided, and the layered structure portion in which the temperature-sensitive portion 30 is embedded is patterned. Thereby, the structure shown in FIG. 18A is obtained by performing the laminated structure part patterning process which forms the 2nd thin film structure part 3aa and the connection piece 3c. Further, in the laminated structure patterning step, the slits 13 and 14 are formed.

After the above-described laminated structure patterning step, an opening forming step of forming openings (not shown) for exposing each pad Vout, Vsel, Vref, Vdd, Gnd is performed using photolithography and etching techniques. Next, the cavity which forms the cavity 11 in the semiconductor substrate 1 by introducing an etching liquid into each slit 13 and 14 into an etching liquid introduction hole, and performing anisotropic etching (crystal anisotropy etching) of the semiconductor substrate 1 is carried out. By performing the subforming step, the infrared sensor chip 100 having the structure shown in Fig. 18B is obtained. Here, the etching in the opening forming step is performed by RIE. In the cavity forming step, the TMAH solution heated to a predetermined temperature (for example, 85 ° C) is used as the etching solution, but the etching solution is not limited to the TMAH solution, and other alkaline solutions (for example, KOH solutions). Etc.) may be used. In addition, since all the processes until a cavity part formation process are complete | finished are performed at the wafer level, what is necessary is just to perform the separation process which isolate | separates into individual infrared sensor chips 100 after completion | finish of a cavity part process. In addition, as can be seen from the above description, in the manufacturing method of the MOS transistor 4, a well-known general method of manufacturing the MOS transistor is adopted, and formation of a thermal oxide film by thermal oxidation, a photolithography technique, The p ⁺ type well region 41 and the p ⁺⁺ type channel stopper region 42 are repeated by repeating the basic steps of patterning the thermal oxide film, implanting impurities, and driving in (diffusion of impurities) by an etching technique. The n ⁺ type drain region 43 and the n ⁺ type source region 44 are formed.

In the above-described infrared sensor chip 100, the cavity 11 formed by anisotropic etching using the crystal surface orientation dependency of the etching rate using the single-crystal silicon substrate whose said surface is a (100) surface as the semiconductor substrate 1 is used. ) Is a square pyramidal shape, but the shape of the pyramidal pyramid may be slightly high and flat. The surface orientation of the one surface of the semiconductor substrate 1 is not particularly limited, and for example, a single crystal silicon substrate having one (110) surface may be used as the semiconductor substrate 1.

The IC chip 102 is an ASIC (: Application Specific IC) and is formed using a silicon substrate.

The IC chip 102 includes, for example, a control circuit for controlling the infrared sensor chip 100 and a plurality of input pads electrically connected to the plurality of output pads 80 of the infrared sensor chip 100. An amplifying circuit for amplifying an output voltage, a multiplexer for selectively inputting output voltages of a plurality of input pads to the amplifying circuit, an output of the amplifying circuit (the on-contact point T1 and the cold junction T2 of the pixel section 2); An arithmetic circuit for calculating temperature based on the output of the temperature difference and the output of the thermistor 101 (the output according to the absolute temperature and assumed to be the output according to the temperature of the cold junction T2 in the pixel portion 2) In addition, an infrared image can be displayed on an external display device. The IC chip 102 also includes the above-described self diagnostic circuit. The circuit configuration of the IC chip 102 is not particularly limited. In addition, the thermistor 101 does not necessarily need to be provided.

Although the infrared sensor of this embodiment makes the internal space (confidential space) 165 of the package 103 comprised from the package main body 104 and the package cover 105 into nitrogen gas (dry nitrogen gas) atmosphere, this is Not limited to this, for example, may be a vacuum atmosphere.

The package main body 104 has a wiring pattern (not shown) and an electron shield layer (not shown) made of a metal material formed on a base 104a made of an insulating material, and the electron shield layer has an electron shield function. Have On the other hand, in the package lid 105, the lens 153 has conductivity, and the lens 153 is bonded to the metal cap 152 by a conductive material, and has conductivity. The package lid 105 is electrically connected to the electron shield layer of the package body 104. However, in this embodiment, the said electron shield layer and the package cover 105 of the package main body 104 can be made into the same potential. As a result, the package 103 includes a sensor circuit (not shown) including an infrared sensor chip 100, an IC chip 102, a thermistor 101, the wiring pattern, a bonding wire (not shown), and the like described later. Or an electronic shield function to prevent foreign electromagnetic noise from the furnace.

The package main body 104 is comprised by the flat ceramic substrate in which the infrared sensor chip 100, the IC chip 102, and the thermistor 101 are mounted on one surface side (front surface side). In other words, the package main body 104 is formed of a ceramic whose base 104a is an insulating material, and the infrared sensor chip 100 is formed at a portion formed on one surface side (front side) of the base 104a of the wiring pattern. And pads (not shown) of the IC chips 102 are appropriately connected via bonding wires. In the infrared sensor, the infrared sensor chip 100 and the IC chip 102 are electrically connected to each other via a bonding wire and a wiring pattern of the package main body 104. As each bonding wire, it is preferable to use Au wire with high corrosion resistance compared with Al wire.

In this embodiment, since ceramic is used as an insulating material of the package main body 104, compared with the case where organic materials, such as an epoxy resin, are employ | adopted as the said insulating material, the moisture resistance and heat resistance of the package main body 104 are improved. You can. Here, although alumina is employ | adopted as a ceramic of an insulating material, it is not specifically limited to alumina, Aluminum nitride, silicon carbide, etc. may be employ | adopted. Moreover, the thermal conductivity of alumina is about 14 W / m * K.

In the package main body 104, an external connection electrode (not shown) formed by a part of the above-described wiring pattern is formed over the other surface (rear surface) and side surfaces of the base 104a. However, in the infrared sensor of this embodiment, after secondary mounting to a circuit board etc., the external appearance test of the junction part with a circuit board etc. can be performed easily.

In addition, the infrared sensor chip 100 and the IC chip 102 are mounted on the package main body 104 using a die bond agent. As the die-bonding agent, insulating adhesives such as epoxy resins and silicone resins, conductive adhesives such as solder (lead-free solder, Au-Sn solder, etc.) and silver paste may be used. Moreover, you may join together by the normal temperature bonding method, the eutectic bonding process using Au-Sn process, or the Au-Si process, etc., without using a die-bonding agent. Moreover, the thermal conductivity of epoxy resin is about 0.2 W / m * K. In addition, the shape of the outer periphery of the infrared sensor chip 100 and the IC chip 102 is rectangular shape (square shape-rectangular shape).

The package lid 105 includes a metal cap 152 formed in a box shape in which one surface of the package main body 104 is opened, and an opening window 152a is formed at a portion corresponding to the infrared sensor chip 100, and a metal cap. It is composed of a lens 153 bonded to the metal cap 152 in the form of closing the opening window 152a of 152, the package of the one surface of the metal cap 152 is closed by the package body 104 It is hermetically bonded to the main body 104. Here, the frame-shaped metal pattern 147 (refer FIG. 1) which conforms to the outer periphery of the package main body 104 is formed in the peripheral part of the said one surface (front surface) of the package main body 104, The metal pattern 147 of the package cover 105 and the package main body 104 is metal-bonded by seam welding (resistance welding), and can improve airtightness and an electron shielding effect. In addition, the metal cap 152 of the package cover 105 is formed of the cobar, and Ni plating is performed. In addition, the metal pattern 147 of the package main body 104 is formed by Kovar, Ni is plated, and Au is plated. Kovar's thermal conductivity is about 16.7 W / m · K.

The bonding method of the package cover 105 and the metal pattern 147 of the package main body 104 is not limited to seam welding, You may join by other welding (for example, spot welding) or conductive resin. Here, when an anisotropic conductive adhesive is used as the conductive resin, the content of the conductive particles dispersed in the resin (binder) is small, and the thickness of the junction of the package lid 105 and the package main body 104 is performed by heating and pressing at the time of bonding. Since the thickness can be reduced, intrusion of moisture or gas (for example, water vapor, oxygen, etc.) into the package 103 from the outside can be suppressed. Moreover, you may use what mixed the desiccant, such as a barium oxide and a calcium oxide, as conductive resin.

In addition, although the outer periphery shape of the package main body 104 and the package cover 105 is made into rectangular shape, it is not limited to rectangular shape, For example, it may be circular shape. In addition, the metal cap 152 of the package cover 105 has an edge 152b extending outwards from the periphery of the package main body 104 side in all directions, and the edge portion 152b extends in all directions. It is joined to the package main body 104. That is, the package cover 105 is bonded to the package main body 104 by bonding the edge part 152b to the metal pattern 147.

The lens 153 is a flat convex aspherical lens. In the infrared sensor of the present embodiment, however, the lens 153 can be thinned, and high sensitivity can be achieved by improving the light receiving efficiency of the infrared light in the infrared sensor chip 100. In the infrared sensor of the present embodiment, the detection area of the infrared sensor chip 100 can be set by the lens 153. The lens 153 is formed using a semiconductor substrate different from the semiconductor substrate 1 of the infrared sensor chip 100. In more detail, the lens 153 has an anode in which a contact pattern with a semiconductor substrate (here, a silicon substrate) is designed according to a desired lens shape so that the contact with the semiconductor substrate becomes ohmic contact on one surface side of the semiconductor substrate. The semiconductor lens formed by forming the porous part which becomes a removal site | part by anodizing another surface side of a semiconductor substrate in the electrolysis liquid which consists of a solution which etches and removes the oxide of the constituent element of a semiconductor substrate after formation, and removes the said porous part (Here, a silicon lens). However, the lens 153 is conductive. In addition, since the manufacturing method of the semiconductor lens which applied this kind of anodic oxidation technique is disclosed by Unexamined-Japanese-Patent No. 3897055, Unexamined-Japanese-Patent No. 3897056, etc., the description is abbreviate | omitted.

In the present embodiment, the detection area of the infrared sensor chip 100 can be set by the lens 153 made of the above-described semiconductor lens, and the lens 153 is short focal than the spherical lens and has a larger aperture diameter and aberration. Since a small semiconductor lens can be employed, the package 103 can be thinned by short focusing. The infrared sensor of the present embodiment is an infrared ray to be detected by the infrared sensor chip 100, and assumes infrared rays in a wavelength band (8 µm to 13 µm) in the vicinity of 10 µm emitted from the human body, and the material of the lens 153. As an example, Si has a smaller environmental load than ZnS, GaAs, or the like, and can have a lower cost than Ge, and furthermore, Si which has a smaller wavelength dispersion than ZnS.

In addition, the lens 153 is fixed to the periphery of the opening 152a in the metal cap 152 by a joint (not shown) made of a conductive adhesive (for example, lead-free solder, silver paste, or the like). . By employing a conductive adhesive as a material of the junction, the lens 153 is electrically connected to the electron shield layer of the package body 104 via the junction and the metal cap 152, thereby preventing Shielding property can be improved and the fall of S / N ratio resulting from foreign electromagnetic noise can be prevented.

The above-described lens 153 is an optical multilayer film (multilayer interference filter film) that transmits infrared rays of a desired wavelength band including the wavelength of infrared rays to be detected by the infrared sensor chip 100 and reflects infrared rays other than the wavelength band. It is preferable to provide a filter portion (not shown) made of By providing such a filter part, it becomes possible to cut infrared rays and visible light of an unnecessary wavelength band other than a desired wavelength band by a filter part, and can suppress generation | occurrence | production of the noise by sunlight, etc., and can aim at high sensitivity. Can be.

In this embodiment, since the bare chip is employed as the IC chip 102 as described above, the metal cap 152 and the lens 153 so that the package cover 105 has a function of cutting visible light. By appropriately selecting the material) and the filter unit, it is possible to prevent malfunction due to electromotive force of the IC chip 102 due to visible light. However, when a resin portion (not shown) that shields light from the outside is provided on at least the surface of the package lid 105 side of the IC chip 102 made of bare chips, the IC chip 102 caused by visible light Can prevent malfunction due to electromotive force.

In addition, in this embodiment, since the package main body 104 is formed in flat form, the mounting of the infrared sensor chip 100 and the IC chip 102 to the package main body 104 becomes easy, and the package main body ( Low cost of 104 can be achieved. In addition, since the package main body 104 is formed in the shape of a flat plate, the package main body 104 is formed by a multilayer ceramic substrate in a box shape having one surface open, and the inner bottom of the package main body 104. Compared with the case where the infrared sensor chip 100 is mounted on the surface, the accuracy of the distance between the infrared sensor chip 100 and the lens 153 disposed on the one surface side of the package main body 104 can be increased, and Higher sensitivity can be achieved.

The cover member 106 is located on the front of the infrared sensor chip 100 and has a front plate portion 107 and a window hole 108 formed therein, and extends backward from the outer circumference of the front plate portion 107 and the IC chip 102. It is comprised by the side plate part 109 joined to the package main body 104 between the infrared sensor chips 100. As shown in FIG. Here, the front plate portion 107 is disposed between the lens 153 and the infrared sensor chip 100 at a distance from each of the lens 153 and the infrared sensor chip 100. The cover member 106 is disposed such that the window hole 108 is positioned between the infrared sensor chip 100 and the lens 153 (the portion of the package cover 105 having a function of transmitting infrared rays to be detected). . In addition, the front plate portion 107 of the cover member 106 is spaced apart from the package 103. The side plate portion 109 is disposed between the IC chip 102 and the infrared sensor chip 100 at a distance from each of the IC chip 102 and the infrared sensor chip 100, but the side plate portion 109 and the IC chip are disposed. It is preferable to set the distance of 102 to be shorter than the distance between the side plate portion 109 and the infrared sensor chip 100. In other words, it is preferable to arrange the side plate portion 109 close to the IC chip 102. That is, the cover member 106 is disposed in close proximity to both the infrared sensor chip 100 and the IC chip 102. Therefore, the heat generated by the IC chip 102 is transmitted to the package body 104 and also to the cover member 106. In other words, heat generated in the IC chip 102 is transmitted to the infrared sensor chip 100 in a path passing through the package main body 104 and a path passing through the cover member 106.

As a material of the cover member 106, although a kovar is employ | adopted, it is not limited to this, For example, stainless steel, copper, aluminum, etc. may be employ | adopted. In the present embodiment, the cover member 106 is formed of a conductive material. If the cover member 106 is formed of an electroconductive material, it becomes possible to provide electron shielding property to the cover member 106. Therefore, the electromagnetic noise from the IC chip 102 to the infrared sensor chip 100 can be reduced.

The cover member 106 described above has a rectangular outer circumferential shape of the front plate portion 107, and the infrared ray sensor chip 100 enters into the projection area around the outer circumference of the front plate portion 107. The appearance size is set. The side plate portion 109 of the cover member 106 and the package body 104 may be joined by, for example, an adhesive (for example, an epoxy resin), but the cover member 106 and the package body 104 may be bonded to each other. A material having high thermal conductivity is preferable from the viewpoint of thermal bonding, and a material having conductivity from the viewpoint of electrically connecting the cover member 106 with the shield layer of the package body 104 to impart electron shielding properties. It is preferable to employ, for example, silver paste or the like. In addition, the window hole 108 of the front plate portion 107 is opened in a rectangular shape. Here, although the passage shape of the window hole 108 is set to become similar to the outer periphery shape of the infrared sensor chip 100, it does not necessarily need to be similar.

In the infrared sensor of the present embodiment described above, each pixel portion 2 corresponding to the heat generated by the IC chip 102 having the window hole 108 passing through the infrared ray to the infrared sensor chip 100 in the package 103. The heat generated from the IC chip 102 is transmitted to the package main body 104 and the cover member 106 by providing the cover member 106 which equalizes the temperature change amounts of the on-contact point T1 and the cold junction T2. That is, in the infrared sensor of the present embodiment, the heat due to the heat generated by the IC chip 102 is transferred to the path of the infrared sensor chip 100 through the path through the package body 104 and the cover member 106. Since it is transmitted to the pixel portion 2, it becomes possible to equalize the heat transmitted to each pixel portion 2 of the infrared sensor chip 100, so that the infrared sensor chip 100 due to the heat generation of the IC chip 102 is generated. It is possible to suppress the variation of the offset voltage in the plane and to suppress the variation of the S / N ratio. For example, in the infrared sensor shown in FIG. 1, compared with the case where the cover member 106 is not provided, the temperature sensing portion at the pixel portion 2 closest to the IC chip 102 in the infrared sensor chip 100 ( It is possible to reduce the difference between the offset voltage of 30 and the offset voltage of the temperature sensitive portion 30 in the pixel portion 2 farthest from the IC chip 102.

In addition, the infrared sensor is provided with the cover member 106 in the package 103, so that the infrared rays radiated from the IC chip 102 due to the heat generation of the IC chip 102, or the metal cap of the package cover 105. Infrared radiation emitted from 152 may be prevented from reaching the infrared sensor chip 100. Here, the cover member 106 is located in the front of the infrared sensor chip 100, the front plate portion 107, the window hole 108 is formed, and extends backward from the outer periphery of the front plate portion 107, IC chip 102 ) And the side plate portion 109 bonded to the package body 104 between the infrared sensor chip 100 and the infrared sensor chip 100, the infrared rays emitted from the IC chip 102 directly reach the infrared sensor chip 100. It becomes possible to prevent that.

In addition, in this embodiment, since the package main body 104 is formed in flat form, mounting of the cover member 106 to the package main body 104 also becomes easy.

In addition, in this embodiment, the front plate part 107 is spaced apart from the package 103. Accordingly, the front plate portion 107 is less likely to be affected by the temperature change of the package 103 than in the case where the front plate portion 107 is in contact with the package 103.

In addition, since the MOS transistor 4 is provided in each pixel part 2 of the infrared sensor chip 100 in the infrared sensor of the present embodiment, the infrared sensor may be connected to the wiring between the temperature sensing unit 30 and the MOS transistor 4. It is possible to reduce the noise caused.

In addition, the infrared sensor of this embodiment has the site | part which the pad (for illustration) of the ground of each of the infrared sensor chip 100 and the IC chip 102 connects in the package main body 104 mentioned above. By electrically connecting the electromagnetic shield layer, the influence of foreign electromagnetic noise on the sensor circuit constituted by the infrared sensor chip 100, the IC chip 102, and the like can be reduced, and the foreign electromagnetic noise can be reduced. The fall of S / N ratio which originates in can be suppressed. In addition, when the infrared sensor is secondaryly mounted on a circuit board or the like, the electrical shield layer is electrically connected to a ground pattern such as a circuit board, thereby reducing the influence of foreign electromagnetic noise on the sensor circuit described above. The fall of the S / N ratio resulting from the electromagnetic noise of can be suppressed.

(Embodiment 2)

The basic structure of the infrared sensor of this embodiment is substantially the same as that of Embodiment 1, and as shown in FIG. 19, the shape etc. of the cover member 106 differ. In addition, the same code | symbol is attached | subjected to the component same as Embodiment 1, and description is abbreviate | omitted suitably.

In the infrared sensor of the present embodiment, the package main body 104 retreats the second region 142 on which the IC chip 102 is mounted rather than the surface of the first region 141 on which the infrared sensor chip 100 is mounted. have. Therefore, a step is formed between the surface of the first region 141 and the second region 142. Here, the package main body 104 sets the dimension which retracts the surface of the 2nd area | region 142 so that the dimension of a level | step difference may become smaller than the thickness dimension of the IC chip 102. As shown in FIG.

The cover member 106 is located at the front of the infrared sensor chip 100 and has a front plate portion 107 with a window hole 108 formed therein, and extends rearward from the outer circumference of the front plate portion 107 to the package body 104. Two side plate parts 109 joined are provided.

Here, the distance between the front plate portion 107 and the infrared sensor chip 100 is set longer than the infrared sensor of the first embodiment. In addition, the two side plate portions 109 are located on each side of both sides of the infrared sensor chip 100 along the parallel direction of the infrared sensor chip 100 and the IC chip 102.

In addition, the front plate part 107 is formed in the magnitude | size which the infrared sensor chip 100 and the IC chip 102 enter in the projection area | region of the outer peripheral line of the said front plate part 107. As shown in FIG. The front plate portion 107 extends from the circumferential side of the longitudinal direction along the parallel direction between the infrared sensor chip 100 and the IC chip 102 from the protruding piece 107b. This projecting piece 107b has a smaller projecting dimension from the front plate part 107 than the side plate part 109, and the plane including the front end surface of the projecting piece 107b is ahead of the surface of the infrared sensor chip 100. The protrusion dimension from the front plate part 107 is set so that it may be located at.

In the infrared sensor of the present embodiment, the cover is lower than that of the first embodiment while enabling the variation of the S / N ratio in the surface of the infrared sensor chip 100 due to the heat generation of the IC chip 102 to be suppressed. The member 106 can be joined more stably, and the front plate part 107 can be prevented from tilting with respect to the surface of the infrared sensor chip 100. In the infrared sensor of the present embodiment, since the side plate portion 109 is not located between the infrared sensor chip 100 and the IC chip 102, the infrared sensor chip 100 and the IC chip 102 are bonded to each other. Direct connection can be made only.

(Embodiment 3)

The basic configuration of the infrared sensor of this embodiment is substantially the same as that of Embodiment 2, and as shown in FIG. 20, the shape etc. of the cover member 106 differ. In addition, the same code | symbol is attached | subjected to the component same as Embodiment 2, and description is abbreviate | omitted.

As shown in FIG. 20, the infrared sensor of this embodiment does not provide the protrusion piece 107b (refer FIG. 19) demonstrated in Embodiment 2, and the distance between the front board part 107 and the infrared sensor chip 100 is shown. The point of setting a shorter than the infrared sensor of Embodiment 2 is different.

However, in the infrared sensor of the present embodiment, the front plate portion 107 is made capable of suppressing the variation of the S / N ratio in the plane of the infrared sensor chip 100 due to the heat generation of the IC chip 102. And the distance between the infrared sensor chip 100 can be shortened.

(Fourth Embodiment)

The basic configuration of the infrared sensor of this embodiment is substantially the same as that of Embodiment 2, and as shown in FIG. 21, the shape of the cover member 106 differs. In addition, the same code | symbol is attached | subjected to the component same as Embodiment 2, and description is abbreviate | omitted.

In the cover member 106 according to the present embodiment, the window hole 108 of the front plate portion 107 is rectangular in shape, but the IC chip 102 of the window hole 108 is viewed in plan view. The inner circumferential line (one side out of four sides; one side on the left side in FIG. 21 (b)) on the side of the) side has an IC The point on the chip 102 side is different from the second embodiment.

However, in the infrared sensor of the present embodiment, it becomes possible to reduce heat transmitted to the infrared sensor chip 100 through the cover member 106 as compared with the second embodiment.

By the way, in each said embodiment, the cavity part 11 of the semiconductor substrate 1 may be formed in the form penetrating in the thickness direction of the semiconductor substrate 1, and in this case, the cavity part 11 is formed. In the cavity forming step, the region to be formed of the cavity 11 in the semiconductor substrate 1 is formed from another surface side opposite to the one surface of the semiconductor substrate 1, for example, inductively coupled plasma ( What is necessary is just to form using the anisotropic etching technique using the ICP) type dry etching apparatus. In addition, in the infrared sensor chip 100, a plurality of pixel portions 2 including the temperature sensing portion 30 constituted by the thermopile 30a are arranged in an array shape on one surface side of the semiconductor substrate 1. It is good as long as it is a thing, and a structure is not specifically limited, The number of the thermopiles 30a which comprise the temperature-sensitive part 30 is not limited to multiple numbers, but may be one. In addition, the semiconductor substrate 1 is not limited to a silicon substrate, for example, may be a germanium substrate, a silicon carbide substrate, or the like. In the package lid 105, instead of the lens 153, a flat silicon substrate may be arranged to have a function of transmitting infrared rays. The arrangement of the lens 153 in the package lid 105 is not particularly limited, and the lens 153 may be disposed outside the package lid 105.

While the present invention has been described in terms of some preferred embodiments, various modifications and variations can be made by those skilled in the art without departing from the spirit and scope of the invention, that is, the claims.

Claims (10)

An infrared sensor chip in which a plurality of pixel portions including a temperature sensing portion constituted by a thermopile is arranged in an array on one surface side of a semiconductor substrate;
IC chip for signal processing the output signal of the infrared sensor chip,
Package containing the infrared sensor chip and the IC chip
Provided with
The package includes:
A package body in which the infrared sensor chip and the IC chip are installed in parallel;
A package cover which has a function of transmitting infrared rays of a detection target in the infrared sensor chip and is hermetically bonded to the package body in a form surrounding the infrared sensor chip and the IC chip between the package body and ,
A cover member having a window hole through which infrared light passes through the infrared sensor chip and having a uniform temperature change amount between the on-contact point and the cold-contact point of each pixel part due to heat generation of the IC chip.
Infrared sensor, characterized in that.
The method of claim 1,
The cover member is located on the front side of the infrared sensor chip, the front plate portion having the window hole, and extends rearward from the outer periphery of the front plate portion, and the package body between the IC chip and the infrared sensor chip. Consisting of side plates joined to
Infrared sensor, characterized in that.
The method of claim 1,
The package body retracts the surface of the second region in which the IC chip is mounted, rather than the surface of the first region in which the infrared sensor chip is mounted.
The cover member
A front plate part positioned in front of the infrared sensor chip and having the window hole formed therein;
And two side plates extending laterally from the outer circumference of the front plate and located at both sides of both sides of the infrared sensor chip along the parallel direction of the infrared sensor chip and the IC chip, and bonded to the package body.
Wherein the front plate portion is formed to the size that the infrared sensor chip and the IC chip in the projection area of the outer peripheral line of the front plate portion
Infrared sensor, characterized in that.
The method of claim 3, wherein
The cover member is such that the window hole of the front plate portion has a rectangular shape, and the inner circumferential line on the IC chip side of the window hole is closer to the IC chip side than the outer circumference line on the IC chip side of the infrared sensor chip in plan view.
Infrared sensor.
The method of claim 1,
The cover member
A front plate part positioned in front of the infrared sensor chip and having the window hole formed therein;
Having a side plate connected to the rear of the front plate and joined to the package body
Infrared sensor, characterized in that.
The method of claim 5, wherein
The cover member is disposed in close proximity to both the infrared sensor chip and the IC chip.
Infrared sensor, characterized in that.
The method of claim 5, wherein
The front plate part being formed to have a size at least in which the infrared sensor chip enters a projection area of an outer circumferential line of the front plate part;
Infrared sensor, characterized in that.
The method of claim 1,
The cover member is formed of a conductive material
Infrared sensor, characterized in that.
The method of claim 8,
The cover member is joined to the package body by a conductive material
Infrared sensor, characterized in that.
The method of claim 9,
The package body,
A base made of an insulating material,
With an electron shield layer made of a metallic material
Infrared sensor, characterized in that.

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