JP5629146B2 - Temperature sensor - Google Patents

Description

  The present invention relates to a temperature sensor.

  Conventionally, an infrared sensor A 'configured as shown in FIGS. 25 and 26 has been proposed (Patent Document 1). This infrared sensor A ′ is a thermal infrared detector 3 having a thermocouple type temperature sensing part (thermoelectric conversion part) 30 ′ that generates an output voltage corresponding to a temperature change of the infrared absorbing part 33 ′ that absorbs infrared rays. And a pixel portion 2 ′ having a MOS transistor 4 ′. In the infrared sensor A ′, a × b (4 × 4 in the example of FIG. 26) pixel portions 2 ′ are arranged in a two-dimensional array on the one surface side of the base substrate 201. Here, the base substrate 201 is formed using an n-type silicon substrate 201a. In FIG. 26B, the equivalent circuit of the temperature sensing unit 30 'is represented by a voltage source corresponding to the thermoelectromotive force of the thermocouple type temperature sensing unit 30'.

In the MOS transistor 4 ′, a p-type (p ⁺ ) well region (channel formation region) 41 is formed on the one surface side of the silicon substrate 201 a, and an n-type (n ⁺ ) drain region is formed in the well region 41. 43 and an n-type (n ⁺ ) source region 44 are formed apart from each other. A p-type (p ⁺⁺ ) channel stopper region 42 is formed in the well region 41 so as to surround the drain region 43 and the source region 44. A gate electrode 46 made of an n-type polysilicon layer is formed on a portion of the well region 41 located between the drain region 43 and the source region 44 via a gate insulating film 45 made of a silicon oxide film. Yes. In the MOS transistor 4 ′, a ground electrode 49 is formed on the channel stopper region 42.

  The infrared sensor A ′ described above includes a plurality of vertical readout lines 207 in which one end of the temperature sensing unit 30 ′ of the plurality of thermal infrared detection units 3 ′ in each column is commonly connected to each column via the MOS transistor 4 ′. And a plurality of horizontal signal lines 206 to which the gate electrodes 46 of the MOS transistors 4 ′ corresponding to the temperature sensing portions 30 ′ of the thermal infrared detectors 3 ′ of each row are commonly connected for each row. The infrared sensor A ′ includes a plurality of ground lines 208 in which the well regions 41 of the MOS transistors 4 ′ in each column are commonly connected for each column, a common ground line 209 in which the ground lines 208 are commonly connected, The other end of the temperature sensing unit 30 ′ of the plurality of thermal infrared detectors 3 ′ in each column is provided with a plurality of reference bias lines 205 commonly connected to each column.

  In the infrared sensor A ′, each horizontal signal line 206 is electrically connected to a different pixel selection pad Vsel, and each vertical readout line 207 is electrically connected to a different output pad Vout. Connected.

  Further, in the infrared sensor A ′, the common ground line 209 is electrically connected to the ground pad Gnd, the common reference bias line 205a is electrically connected to the reference bias pad Vrefin, and the silicon substrate 201a is It is electrically connected to the substrate pad Vdd.

  Accordingly, the output voltage of each pixel portion 2 'can be read sequentially by controlling the potential of the pixel selection pad Vsel so that the MOS transistors 4' are sequentially turned on.

  Here, in Patent Document 1, the potential of the reference bias pad Vrefin is 1.65 V, the potential of the ground pad Gnd is 0 V, the potential of the substrate pad Vdd is 5 V, and the pixel selection pad Vsel is set. Is set to 5 V, the MOS transistor 4 ′ is turned on, and the output voltage of the pixel unit 2 ′ (1.65 V + the output voltage of the temperature sensing unit 30 ′) is read from the output pad Vout to select the pixel. It is described that if the potential of the pad Vsel is 0 V, the MOS transistor 4 ′ is turned off and the output voltage of the pixel portion 2 ′ is not read from the output pad Vout.

  Further, in Patent Document 1, as shown in FIG. 27, an infrared sensor A ′, a signal processing IC chip B ′ that processes an output voltage that is an output signal of the infrared sensor A ′, an infrared sensor A ′, and An infrared sensor module including a package C ′ on which a signal processing IC chip B ′ is mounted is described. Here, in Patent Document 1, each of a plurality of (four in the illustrated example) output pads Vout of the infrared sensor A ′ is formed of a bonding wire on the signal processing IC chip B ′ as shown in FIG. A plurality of (four in the illustrated example) input pads Vin electrically connected via the wiring 80, an amplifier circuit AMP for amplifying the output voltage of the input pad Vin, and a plurality of input pads It is described that an infrared image can be obtained by providing a multiplexer MUX or the like that selectively inputs the output voltage of Vin to the amplifier circuit AMP.

  Further, conventionally, an infrared sensor that detects infrared radiation emitted from a measurement object (object) and outputs a voltage corresponding to the temperature of the measurement object; and a thermistor that outputs a voltage corresponding to the temperature of the infrared sensor; Has been proposed (for example, Patent Document 2).

  The temperature sensor disclosed in Patent Document 2 includes two amplifiers (amplifier circuits) that individually amplify voltages output from the infrared sensor and the thermistor, and A / D conversion that performs analog-digital conversion on the output of each amplifier. (A / D conversion circuit), a temperature calculation unit that calculates the temperature of the measurement object based on the output of the A / D converter, and a memory that stores data used for calculation in the temperature calculation unit Yes.

JP 2010-78451 A JP 2007-198745 A

  Incidentally, in the infrared sensor module disclosed in the above-mentioned Patent Document 1, due to the potential difference between the potential of the pad Vrefin (1.65 V) of the infrared sensor A ′ and the potential of the ground pad Gnd (0 V), FIG. As shown in FIG. 3, the leak current Ire ′ flows through the pn junction between the source region 44 and the well region 41. That is, in addition to the current path shown by the solid line in FIG. 29, a current path shown by the broken line in FIG. Ire 'flows. An offset voltage determined by a voltage drop generated by the leakage current Ire ′ and the resistance of the temperature sensing unit 30 ′ is generated in the output voltage output from the output pad Vout. The leakage current Ire ′ is a temperature of the MOS transistor 4. Since it fluctuates due to change (increases if the temperature of the MOS transistor 4 rises), the offset voltage has temperature dependence.

  Further, when the infrared sensor A ′ described in Patent Document 1 is used instead of the infrared sensor of the temperature sensor described in Patent Document 2, the detection accuracy of the temperature of the object is reduced due to the offset voltage described above. I am worried about it.

  The present invention has been made in view of the above reasons, and an object of the present invention is to provide a temperature sensor capable of improving the detection accuracy of the temperature of an object.

The temperature sensor of the present invention includes a thermoelectric conversion unit configured by a thermopile that converts thermal energy generated by infrared rays radiated from an object into electric energy, and a MOS transistor for extracting an analog output voltage of the thermoelectric conversion unit. An infrared sensor in which (a ≧ 2) × b (b ≧ 2) pixel portions are arranged in a two-dimensional array on one surface side of a semiconductor substrate, and an analog output voltage corresponding to the temperature of the infrared sensor is output A thermistor, an amplifying circuit for amplifying the output voltages of the infrared sensor and the thermistor, and an A / D for converting the output voltages of the infrared sensor and the thermistor amplified by the amplifying circuit into digital values. In response to the output voltages of the conversion circuit, the infrared sensor and the thermistor, the output from the A / D conversion circuit. And a control unit for controlling the infrared sensor, wherein the MOS transistor is a channel of the first conductivity type in the semiconductor substrate. The source region of the second conductivity type and the drain region of the second conductivity type are formed apart from each other in the formation region, and one end of the thermoelectric conversion unit of the b pixel units in each column is The b first wirings commonly connected to each column via the source region and the drain region of the MOS transistor and the gate electrodes of the MOS transistors corresponding to the thermoelectric conversion units in each row are commonly connected to each row. A second wiring, b third wirings in which the channel formation regions of the MOS transistors in each row are commonly connected for each column, and a thermoelectric conversions in each column B fourth wirings whose other ends are commonly connected to each column, b first pads for output in which the first wirings are separately connected, and the second wirings A second pad for selecting a pixel portion connected to each other, a third pad to which the third wirings are commonly connected, and a reference bias for which the fourth wiring is commonly connected The fourth pad potential is Vout, the second pad potential is Vs, the third pad potential is Vwell, the fourth pad potential is Vref , and the fourth pad potential is Vref . The output of the thermoelectric converter is Vo, the threshold value of the first parasitic diode composed of the channel forming region and the source region, and the second parasitic diode composed of the channel forming region and the drain region. when the voltage Vth, the control means, the MOS transistor When MOS transistor, when -Vth <{Vwell- (Vref + Vo )} <Vth, the MOS transistor is a pMOS transistor, -Vth <{(Vref + Vo ) -Vwell} <Vwell previously set so as to satisfy the relation of Vth The infrared sensor is controlled under the condition of Vref.

  In this temperature sensor, it is preferable that the control means sets Vref = Vwell.

  In this temperature sensor, when the conductivity type of the semiconductor substrate is a second conductivity type, the substrate includes a fifth pad for substrate bias to which the semiconductor substrate is connected, and the potential of the fifth pad is Vsub. The control means preferably has Vwell = Vsub.

  In the temperature sensor of the present invention, it is possible to improve the detection accuracy of the temperature of the object.

Regarding the temperature sensor of the embodiment, (a) is an equivalent circuit diagram of the infrared sensor, and (b) is an operation explanatory diagram. It is a principal part equivalent circuit diagram of the infrared sensor in the same as the above. Regarding the temperature sensor same as above, (a) is a schematic cross-sectional view, and (b) is a schematic cross-sectional view of an essential part of the infrared sensor. (A) is a circuit block diagram, (b) is an operation explanatory diagram regarding the temperature sensor same as the above. It is a plane layout figure of the infrared sensor in the same as the above. It is a plane layout figure of the pixel part of the infrared sensor in the same as the above. It is a plane layout figure of the pixel part of the infrared sensor in the same as the above. The principal part of the pixel part of the infrared sensor in the same as above is shown, (a) is a plan layout view, and (b) is a schematic sectional view corresponding to the D-D 'section of (a). It is a plane layout figure of the principal part of the pixel part of the infrared sensor same as the above. It is a plane layout figure of the principal part of the pixel part of the infrared sensor same as the above. The principal part of the pixel part of the infrared sensor in the same as above is shown, (a) is a plan layout view, and (b) is a schematic sectional view corresponding to the D-D 'section of (a). The principal part containing the cold junction of the infrared sensor in the same as the above is shown, (a) is a plan layout view, (b) is a schematic sectional view. The principal part containing the hot junction of the infrared sensor in the same as above is shown, (a) is a plan layout view, and (b) is a schematic sectional view. It is a schematic sectional drawing of the principal part of the pixel part of the infrared sensor in the same as the above. It is a schematic sectional drawing of the principal part of the pixel part of the infrared sensor in the same as the above. It is principal part explanatory drawing of the infrared sensor in the same as the above. Regarding the infrared sensor of the above, (a) is a plan layout view of the main part, (b) is an enlarged view of the Zener diode of (a), and (c) is a schematic sectional view of the Zener diode. It is principal process sectional drawing for demonstrating the manufacturing method of the infrared sensor in the same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of the infrared sensor in the same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of the infrared sensor in the same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of the infrared sensor in the same as the above. It is a principal part schematic sectional drawing of the other structural example of the infrared sensor in the same as the above. It is a principal part schematic sectional drawing of the other structural example of the infrared sensor in the same as the above. It is a principal part schematic sectional drawing of the other structural example of the infrared sensor in the same as the above. The infrared sensor in a prior art example is shown, (a) is a plane layout figure of a pixel part, (b) is a schematic sectional drawing corresponding to the D-D 'cross section of (a). FIG. 4A is a plan layout diagram, and FIG. 4B is an equivalent circuit diagram. It is a principal part schematic plan view of the infrared sensor module provided with the infrared sensor same as the above. It is principal part explanatory drawing of the infrared sensor module provided with the infrared sensor same as the above. It is operation | movement explanatory drawing of an infrared sensor module same as the above.

  Hereinafter, the temperature sensor of the present embodiment will be described with reference to FIGS.

  In the temperature sensor of this embodiment, the infrared sensor 100, the thermistor 110 (see FIG. 4), and the IC element 120 (see FIG. 3) are housed in one package 133 (see FIG. 3).

  The infrared sensor 100 includes a temperature sensing unit 30 that is a thermoelectric conversion unit that converts thermal energy generated by infrared rays radiated from an object (such as a human body) into electrical energy, and a MOS for taking out an analog output voltage of the temperature sensing unit 30. The a × b (8 × 8 in the illustrated example) pixel unit 2 including the transistors 4 is two-dimensionally arranged in a rows and b columns (8 rows and 8 columns in the illustrated example) on one surface side of the semiconductor substrate 1. Arranged in an array. In the illustrated example, a = 8 and b = 8, but a ≧ 2 and b ≧ 2 may be satisfied.

  As shown in FIGS. 1B, 8, and 15, the above-described MOS transistor 4 has the second conductivity in the well region 41 of the first conductivity type formed on the one surface side of the semiconductor substrate 1. The source region 44 having the shape and the drain region 43 having the second conductivity type are formed apart from each other. In this embodiment, the well region constitutes a channel formation region. FIG. 1A shows an equivalent circuit diagram in the case where the first conductivity type is p-type, the second conductivity type is n-type, and the MOS transistor 4 is an n-channel MOS transistor. In addition, in the equivalent circuit diagram of FIG. 1A, the temperature sensing unit 30 is represented by a symbol of resistance.

  Further, in the infrared sensor 100, one end of the temperature sensing unit 30 of the b (eight) pixel units 2 in each column is commonly connected to each column via the source region 44 and the drain region 43 of the MOS transistor 4. b (eight) first wirings 101 are provided.

  Further, the infrared sensor 100 includes a (eight) second wirings 102 in which the gate electrodes 46 of the MOS transistors 4 corresponding to the temperature sensing units 30 in the respective rows are commonly connected to the respective rows, and the MOS transistors 4 in the respective rows. B (eight) third wirings 103 in which the well regions 41 are commonly connected to each column, and the other ends of the a (eight) temperature sensing portions 30 in each column are common to each column. B (four in the illustrated example) connected to the fourth wiring 104.

  In the infrared sensor 100 described above, the b first pads Vout1 to Vout8 for output to which the first wiring 101 is individually connected and the pixel part selection a to which the second wiring 102 is individually connected. The second pads Vsel1 to Vsel8, the third pad Vch to which each third wiring 103 is commonly connected, and the fourth pad Vrefin for reference bias to which the fourth wiring 104 is commonly connected. I have. Therefore, the infrared sensor 100 can read the outputs of all the temperature sensing units 30 in time series. That is, the output voltage of each pixel unit 2 can be read sequentially by controlling the potentials of the second pads Vsel1 to Vsel8 for selecting each pixel unit 2 so that the MOS transistor 4 is sequentially turned on. it can.

  The thermistor 110 is for detecting the temperature of the infrared sensor 100 and is disposed in the package 133 in the vicinity of the infrared sensor 100 and outputs an analog output voltage corresponding to the temperature of the infrared sensor 100. The thermistor 110 has one end connected to the power supply via a pull-up resistor and the other end connected to the ground.

  The IC element 120 has a function of calculating the temperature of an object based on the output voltages of the infrared sensor 100 and the thermistor 110. The IC element 120 will be described later.

  As shown in FIG. 3A, the package 133 includes an infrared sensor 100, a thermistor 110 (see FIG. 4A), a package body 134 on which the IC element 120 is mounted, and an infrared sensor between the package body 134. 100, a thermistor 110, and an IC element 120. The package lid 135 is airtightly joined to the package body 134 so as to surround it.

  The package body 134 has the IC element 120 and the infrared sensor 100 mounted side by side. On the other hand, the package lid 135 has a function of transmitting infrared rays to be detected by the infrared sensor 100 and conductivity.

  The package lid 135 includes a metal cap 152 that is covered on the one surface side of the package body 134 and a lens 153 that closes an opening window 152 a formed in a portion of the metal cap 152 corresponding to the infrared sensor 100. ing. Here, the lens 153 has a function of transmitting infrared rays and a function of converging infrared rays to the infrared sensor 100. Instead of the lens 153, a plate-shaped infrared transmitting member that transmits infrared light may be provided.

  Hereinafter, each component will be further described.

  The infrared sensor 100 includes a plurality of (a × b) pixel units 2 each having a thermal infrared detection unit 3 and a MOS transistor 4 in which a temperature sensing unit 30 is embedded, two-dimensionally on the one surface side of the semiconductor substrate 1. Arranged in an array. Here, the one surface of the semiconductor substrate 1 is a Si (100) plane. The temperature sensing unit 30 is configured by connecting a plurality of (here, six) thermopiles 30a (see FIG. 6) in series.

  The thermal infrared detector 3 of each pixel unit 2 is formed in the formation area A1 of the thermal infrared detector 3 (see FIG. 8) on the one surface side of the semiconductor substrate 1. Further, the MOS transistor 4 of each pixel portion 2 is formed in the formation region A2 of the MOS transistor 4 (see FIG. 8) on the one surface side of the semiconductor substrate 1.

  In the infrared sensor 100, a cavity 11 is formed immediately below a part of the thermal infrared detector 3 on the one surface side of the semiconductor substrate 1. The thermal infrared detector 3 includes a support 3d formed on the periphery of the cavity 11 on the one surface side of the semiconductor substrate 1, and a first cover that covers the cavity 11 in plan view on the one surface side of the semiconductor substrate 1. 1 thin film structure portion 3a. The first thin film structure portion 3a includes an infrared absorbing portion 33 that absorbs infrared rays. Here, the first thin film structure portion 3a includes a plurality of second thin film structure portions 3aa arranged in parallel along the circumferential direction of the cavity portion 11 and supported by the support portion 3d, and adjacent second thin film structure portions. It has the connection piece 3c (refer FIG. 6) which connects 3aa mutually. In the thermal infrared detector 3 in the example of FIG. 6, the first thin film structure 3 a is separated into six second thin film structures 3 aa by providing a plurality of linear slits 13. Below, each part divided | segmented corresponding to each 2nd thin film structure part 3aa among the infrared absorption parts 33 (it calls 1st infrared absorption part 33) is called 2nd infrared absorption part 33a.

  The thermal infrared detector 3 is provided with a thermopile 30a for each second thin film structure 3aa. Here, in the thermopile 30a, the hot junction T1 is provided in the second thin film structure portion 3aa, and the cold junction T2 is provided in the support portion 3d. In short, the hot junction T1 is formed in a region overlapping the cavity 11 in the thermal infrared detector 3, and the cold junction T2 is formed in a region not overlapping the cavity 11 in the thermal infrared detector 3.

  In addition, the temperature sensing unit 30 of the thermal infrared detection unit 3 has a connection relationship in which the output change with respect to the temperature change is larger than when the output is taken out for each thermopile 30a, and all the thermopile 30a are electrically connected. Yes. In the example of FIG. 6, the temperature sensing unit 30 has six thermopiles 30a connected in series. However, the connection relationship described above is not limited to the connection relationship in which all of the plurality of thermopiles 30a are connected in series. For example, if a series circuit of three thermopiles 30a is connected in parallel, the sensitivity can be increased as compared with the case where six thermopiles 30a are connected in parallel or the output is taken out for each thermopile 30a. . In addition, compared to the case where all of the six thermopiles 30a are connected in series, the electrical resistance of the temperature sensing unit 30 can be lowered and the thermal noise is reduced, so the S / N ratio is improved.

  Here, in the thermal-type infrared detection unit 3, for each second thin film structure unit 3aa, the two bridge portions 3bb and 3bb having a rectangular shape in plan view connecting the support unit 3d and the second infrared absorption unit 33a are hollow. The portions 11 are formed so as to be separated from each other in the circumferential direction. As a result, a slit 14 having a U-shape in plan view that spatially separates the two bridge portions 3bb and 3bb and the second infrared absorbing portion 33a and communicates with the cavity portion 11 is formed. The support part 3d which is a site | part surrounding the 1st thin film structure part 3a in planar view among the thermal-type infrared detection parts 3 has a rectangular frame shape. Note that the bridge portion 3bb has a space other than the second infrared absorption portion 33a and the support portion 3d, and the space between the second infrared absorption portion 33a and the support portion 3d. Separated. Here, in the second thin film structure portion 3aa, the dimension in the extending direction from the support part 3d is 93 μm, the dimension in the width direction orthogonal to the extending direction is 75 μm, the width dimension of each bridge portion 3bb is 23 μm, and each slit Although the widths 13 and 14 are set to 5 μm, these values are merely examples and are not particularly limited.

  The first thin film structure portion 3 a includes a silicon oxide film 1 b formed on the one surface side of the semiconductor substrate 1, a silicon nitride film 32 formed on the silicon oxide film 1 b, and the silicon nitride film 32. A laminated structure of the formed temperature sensitive portion 30, an interlayer insulating film 50 formed so as to cover the temperature sensitive portion 30 on the surface side of the silicon nitride film 32, and a passivation film 60 formed on the interlayer insulating film 50. It is formed by patterning the part. The interlayer insulating film 50 is composed of a BPSG film. The passivation film 60 is composed of a laminated film of a PSG film and an NSG film formed on the PSG film, but is not limited thereto, and may be composed of, for example, a silicon nitride film.

  In the thermal infrared detector 3 described above, portions of the silicon nitride film 32 other than the bridge portions 3bb and 3bb of the first thin film structure portion 3a constitute the first infrared absorber 33. The support 3d is composed of a silicon oxide film 1b, a silicon nitride film 32, an interlayer insulating film 50, and a passivation film 60.

Further, in the infrared sensor 100, the laminated film of the interlayer insulating film 50 and the passivation film 60 is formed on the one surface side of the semiconductor substrate 1, the formation region A 1 for the thermal infrared detector 3 and the formation region for the MOS transistor 4. A portion of the laminated film formed in the formation region A1 of the thermal infrared detector 3 also serves as the infrared absorbing film 70 (see FIG. 8B). Here, when the refractive index of the infrared absorption film 70 is n ₂ and the center wavelength of the infrared ray to be detected is λ, the thickness t2 of the infrared absorption film 70 is set to λ / 4n _2. The absorption efficiency of infrared rays of the target wavelength (for example, 8 to 12 μm) can be increased, and high sensitivity can be achieved. For example, when n ₂ = 1.4 and λ = 10 μm, t2≈1.8 μm may be set. In the present embodiment, the interlayer insulating film 50 has a thickness of 0.8 μm, the passivation film 60 has a thickness of 1 μm (the PSG film has a thickness of 0.5 μm, and the NSG film has a thickness of 0.5 μm). .

  Further, in each pixel portion 2, the inner peripheral shape of the cavity portion 11 is rectangular, and the connecting piece 3c is formed in an X shape in plan view, and intersects with the extending direction of the second thin film structure portion 3aa. The second thin film structure portions 3aa and 3aa adjacent in the oblique direction, the second thin film structure portions 3aa and 3aa adjacent in the extension direction of the second thin film structure portion 3aa, and the extension direction of the second thin film structure portion 3aa The second thin film structure portions 3aa and 3aa adjacent to each other in the direction orthogonal to are connected to each other.

  The thermopile 30a has a second end portion of the n-type polysilicon layer 34 and the p-type polysilicon layer 35 formed on the silicon nitride film 32 across the second thin film structure portion 3aa and the support portion 3d. A plurality of (9 in the example shown in FIG. 6) thermocouples electrically connected by the connecting portion 36 made of a metal material (for example, Al—Si) on the infrared incident surface side of the infrared absorbing portion 33a. doing. In addition, the thermopile 30a has a metal material (for example, Al Al) with the other end of the n-type polysilicon layer 34 and the other end of the p-type polysilicon layer 35 of the thermocouple adjacent to each other on the one surface side of the semiconductor substrate 1. -Si and the like) are joined and electrically connected. Here, in the thermopile 30a, the one end portion of the n-type polysilicon layer 34, the one end portion of the p-type polysilicon layer 35, and the connection portion 36 constitute a hot junction T1. Further, the other end portion of the n-type polysilicon layer 34, the other end portion of the p-type polysilicon layer 35, and the connecting portion 37 constitute a cold junction T2. In the infrared sensor 100 according to the present embodiment, in each of the n-type polysilicon layer 34 and the p-type polysilicon layer 35 of the thermopile 30a, the portions formed in the above-described bridge portions 3bb and 3bb and the semiconductor substrate 1 Infrared rays can also be absorbed at a portion formed on the silicon nitride film 32 on the one surface side.

  Further, in the infrared sensor 100, the shape of the cavity portion 11 is a quadrangular pyramid shape, and the depth dimension is larger in the central portion in plan view than in the peripheral portion. Therefore, in the infrared sensor 100, the planar layout of the thermopile 30a in each pixel portion 2 is designed so that the hot junction T1 is gathered at the center of the first thin film structure portion 3a. That is, in the two second thin film structure portions 3aa in the middle in the vertical direction of FIG. 6, as shown in FIGS. 6 and 9, the hot junction T1 is aligned along the juxtaposing direction of the three second thin film structure portions 3aa. Are arranged side by side, in the two second thin film structure portions 3aa on the upper side in the vertical direction, as shown in FIG. 6 and FIG. 10, the juxtaposition direction of the three second thin film structure portions 3aa In FIG. 6, the hot junctions T <b> 1 are concentratedly arranged on the side close to the middle second thin film structure portion 3 aa, and in the two lower second thin film structure portions 3 aa in the vertical direction, as shown in FIG. 6. In the direction in which the three second thin film structure portions 3aa are arranged side by side, the hot junctions T1 are concentrated on the side close to the middle second thin film structure portion 3aa. Thus, in the infrared sensor 100 according to the present embodiment, the arrangement of the plurality of hot junctions T1 of the upper and lower second thin film structure portions 3aa in the vertical direction in FIG. 6 is the same as that of the second thin film structure portion 3aa in the middle. Since the temperature change of the hot junction T1 can be increased as compared with the case where the arrangement of the multiple hot junctions T1 is the same, the sensitivity can be improved. In the present embodiment, when the depth of the deepest portion of the cavity 11 is set to a predetermined depth dp (see FIG. 8B), the predetermined depth dp is set to 200 μm, but this value is an example. There is no particular limitation.

  Further, the second thin film structure portion 3aa is an n-type that suppresses the warp of the second thin film structure portion 3aa and absorbs infrared rays in a region where the thermopile 30a is not formed on the infrared incident surface side of the silicon nitride film 32. An infrared absorption layer 39 made of a polysilicon layer is formed. Further, the connecting piece 3c that connects the adjacent second thin film structures 3aa, 3aa is provided with a reinforcing layer 39b (see FIG. 11) made of an n-type polysilicon layer that reinforces the connecting piece 3c. . Here, the reinforcing layer 39 b is formed integrally with the infrared absorption layer 39. Thus, in the infrared sensor 100, since the connecting piece 3c is reinforced by the reinforcing layer 39b, it is possible to prevent damage due to stress generated due to external temperature change or impact during use, and damage during manufacture. And the production yield can be improved. In the present embodiment, the length L1 of the connecting piece 3c shown in FIG. 11 is set to 24 μm, the width L2 is set to 5 μm, and the width L3 of the reinforcing layer 39b is set to 1 μm. There is no particular limitation. However, when a silicon substrate is used as the semiconductor substrate 1 as in the present embodiment and the reinforcing layer 39b is formed of an n-type polysilicon layer, the reinforcing layer 39b is etched when the cavity 11 is formed. In order to prevent this, the width dimension of the reinforcing layer 39b must be set smaller than the width dimension of the connecting piece 3c, and both side edges of the reinforcing layer 39b need to be located inside the both side edges of the connecting piece 3c in plan view. is there.

  In addition, as shown in FIGS. 11 and 16 (b), the infrared sensor 100 has chamfered portions 3d and 3d formed between both side edges of the connecting piece 3c and side edges of the second thin film structure portion 3aa. The chamfered portion 3e is also formed between the side edges of the X-shaped connecting piece 3c that are substantially orthogonal to each other. Therefore, in the infrared sensor 100, the stress concentration at the connecting portion between the connecting piece 3c and the second thin film structure portion 3aa is reduced as compared with the case where the chamfered portion is not formed as shown in FIG. In addition, it is possible to reduce the residual stress generated at the time of manufacturing, reduce the damage at the time of manufacturing, and improve the manufacturing yield. Further, it is possible to prevent damage due to stress generated due to an external temperature change or impact during use. In the example shown in FIG. 11, each of the chamfered portions 3 d and 3 e is an R chamfered portion having an R (R) of 3 μm.

  The infrared sensor 100 is routed to each thermal infrared detector 3 so as to straddle the support 3d, one bridge 3bb, the second infrared absorber 33a, the other bridge 3bb, and the support 3d. A fault diagnosis wiring (heat diagnosis heater) 139 made of the n-type polysilicon layer is provided, and all the fault diagnosis wirings 139 are connected in series. Accordingly, it is possible to detect the presence or absence of breakage such as breakage of the bridge portion 3bb by energizing the series circuit of the a × b failure diagnosis wirings 139.

  In short, the infrared sensor 100 is configured such that the bridge portion 3bb is broken or the failure diagnosis wiring 139 is changed depending on whether or not the series circuit of the a × b failure diagnosis wirings 139 is energized at the time of inspection or use during manufacture. Disconnection can be detected. Further, in the infrared sensor 100, the temperature sensing unit 30 is detected by energizing the series circuit of the a × b failure diagnosis wirings 139 and detecting the output of each temperature sensing unit 30 during the above-described inspection and use. It is possible to detect the presence / absence of disconnection and variations in sensitivity (variations in the output of the temperature sensing unit 30). Here, regarding the sensitivity variation, it is possible to detect the sensitivity variation for each pixel unit 2. For example, the warp of the first thin film structure unit 3 a or the semiconductor substrate 1 of the first thin film structure unit 3 a. It is possible to detect variations in sensitivity due to sticking or the like. Here, in the infrared sensor 100 according to the present embodiment, the fault diagnosis wiring 139 is folded and meandered in the vicinity of the group of the plurality of hot junctions T1 in a plan view. Therefore, each hot junction T1 can be efficiently warmed by Joule heat generated by energizing the failure diagnosis wiring 139. The above-described failure diagnosis wiring 139 is formed with the same thickness on the same plane as the n-type polysilicon layer 34 and the p-type polysilicon layer 35.

The infrared absorption layer 39 and the failure diagnosis wiring 139 described above contain the same n-type impurity (for example, phosphorus) as the n-type polysilicon layer 34 at the same impurity concentration (for example, 10 ¹⁸ to 10 ²⁰ cm ⁻³ ). The n-type polysilicon layer 34 is formed at the same time. Further, for example, boron may be adopted as the p-type impurity of the p-type polysilicon layer 35, and the impurity concentration may be appropriately set within a range of, for example, about 10 ¹⁸ to 10 ²⁰ cm ⁻³ . In the present embodiment, the impurity concentration of each of the n-type polysilicon layer 34 and the p-type polysilicon layer 35 is 10 ¹⁸ to 10 ²⁰ cm ⁻³ , the resistance value of the thermocouple can be reduced, and the S / N ratio can be improved. I can plan. The infrared absorption layer 39 and the failure diagnosis wiring 139 are doped with the same n-type impurity as the n-type polysilicon layer 34 at the same impurity concentration. However, the present invention is not limited to this. For example, the p-type polysilicon layer 35 The same impurity may be doped with the same impurity concentration.

By the way, in the present embodiment, the refractive index of the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, and the failure diagnosis wiring 139 is n ₁ , and the center wavelength of the detection target infrared is λ. time, so as to set the n-type polysilicon layer 34, p-type polysilicon layer 35, the infrared-absorbing layer 39, and the failure diagnosis wirings 139 respectively thicknesses t1 to lambda / 4n _1. Therefore, the absorption efficiency of infrared rays having a wavelength to be detected (for example, 8 to 12 μm) can be increased, and high sensitivity can be achieved. For example, when n ₁ = 3.6 and λ = 10 μm, t 1 ≈0.69 μm may be set.

In the present embodiment, since the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, and the failure diagnosis wiring 139 have impurity concentrations of 10 ¹⁸ to 10 ²⁰ cm ⁻³ , the infrared The reflection of infrared rays can be suppressed while increasing the absorption rate of the light, and the S / N ratio of the output of the temperature sensing unit 30 can be increased. Further, since the infrared absorption layer 39 and the failure diagnosis wiring 139 can be formed in the same process as the n-type polysilicon layer 34, the cost can be reduced.

Here, the connection part 36 and the connection part 37 of the temperature sensing part 30 are insulated and separated by the interlayer insulating film 50 on the one surface side of the semiconductor substrate 1 (see FIGS. 12 and 13). That is, the connecting portion 36 on the warm junction T1 side is electrically connected to the one end portions of the polysilicon layers 34 and 35 through the contact holes 50a ₁ and 50a ₂ formed in the interlayer insulating film 50. Further, the connecting portion 37 on the cold junction T2 side is electrically connected to the other end portions of the polysilicon layers 34 and 35 through contact holes 50a ₃ and 50a ₄ formed in the interlayer insulating film 50. .

  Further, the MOS transistor 4 is formed in the formation region A2 of the MOS transistor 4 on the one surface side of the semiconductor substrate 1 as described above.

As shown in FIGS. 1, 8, and 15, in the MOS transistor 4, a p-type (p ⁺ ) well region 41 that is a first conductivity type is formed on the one surface side of the semiconductor substrate 1. An n-type (n ⁺ ) drain region 43 of the second conductivity type and an n-type (n ⁺ ) source region 44 of the second conductivity type are formed apart from each other. Further, in the well region 41, a p-type (p ⁺⁺ ) channel stopper region 42 which is a first conductivity type surrounding the drain region 43 and the source region 44 is formed.

  A gate electrode 46 made of an n-type polysilicon layer is disposed on a portion of the well region 41 located between the drain region 43 and the source region 44 via a gate insulating film 45 made of a silicon oxide film (thermal oxide film). Is formed.

  A drain electrode 47 made of a metal material (for example, Al—Si) is formed on the drain region 43, and a source electrode 48 made of a metal material (for example, Al—Si) is formed on the source region 44. Is formed.

  The gate electrode 46, the drain electrode 47, and the source electrode 48 are insulated and separated by the interlayer insulating film 50 described above. Here, the drain electrode 47 is electrically connected to the drain region 43 through a contact hole 50 d formed in the interlayer insulating film 50, and the source electrode 48 is electrically connected to the source region 44 through a contact hole 50 e formed in the interlayer insulating film 50. Connected.

  In each pixel unit 2 of the infrared sensor 100, the source electrode 48 of the MOS transistor 4 and one end of the temperature sensing unit 30 are electrically connected, and the other end of the temperature sensing unit 30 is electrically connected to the fourth wiring 104. Has been. In each pixel unit 2, the drain electrode 47 of the MOS transistor 4 is electrically connected to the first wiring 101, and the gate electrode 46 is electrically connected to the second wiring 102 made of n-type polysilicon wiring. It is connected. In each pixel portion 2, an electrode 49 made of a metal material (for example, Al—Si) is formed on the channel stopper region 42 of the MOS transistor 4. Thus, the well region 41 is electrically connected to the third wiring 103 through the channel stopper region 42 and the electrode 49. The electrode 49 is electrically connected to the channel stopper region 42 through a contact hole 50f formed in the interlayer insulating film 50.

  The infrared sensor 100 also includes a substrate bias fifth pad Vsu to which the semiconductor substrate 1 is connected.

  In addition, the infrared sensor 100 includes a plurality of Zener diodes ZD each having a cathode connected to each second wiring 102 in order to prevent an overvoltage from being applied between the gate electrode 46 and the source electrode 48 of each MOS transistor 4. It has. Here, the Zener diode ZD is obtained by forming the second conductivity type second diffusion region 82 in the first conductivity type first diffusion region 81 formed on the one surface side of the semiconductor substrate 1.

  As shown in FIG. 17, the Zener diode ZD has an anode electrode 83 formed on the first diffusion region 81 and two cathode electrodes 84 a and 84 b formed on the second diffusion region 82. In this Zener diode ZD, the anode electrode 83 is electrically connected to the sixth pad Vzd, and one cathode electrode 84a is connected to the second wiring 102 via one second wiring 102. The MOS transistor 4 is electrically connected to the gate electrode 46, and the other cathode electrode 84 b is electrically connected to one of the second pads Vsel 1 to Vsel 8 connected to the second wiring 102.

  According to the infrared sensor 100 described above, the failure diagnosis wiring 139 that warms the hot junction T1 by Joule heat generated by being energized is provided. Therefore, the failure diagnosis wiring 139 is energized and the output of the thermopile 30a is measured. By doing so, it is possible to determine the presence or absence of a failure such as disconnection of the thermopile 30a, and to improve the reliability. Moreover, the failure diagnosis wiring 139 is connected to the semiconductor substrate 1 in the thermal infrared detector 3. Since it is arranged so that it does not overlap with the thermopile 30a in the region overlapping the cavity 11, it is possible to prevent an increase in the heat capacity of the hot junction T1 of the thermopile 30a due to the failure diagnosis wiring 139, and to improve the sensitivity and response speed.

  Here, the infrared sensor 100 also absorbs infrared rays from the outside in the normal state when the self-diagnosis is not performed during use, so that the temperature of the plurality of hot junctions T1 can be made uniform and the sensitivity can be improved. Improvements can be made. In the infrared sensor 100, since the infrared absorbing layer 39 and the reinforcing layer 39b also absorb infrared rays from the outside, the temperature of the plurality of hot junctions T1 can be made uniform, and the sensitivity can be improved. Further, the self-diagnosis when using the infrared sensor 100 is periodically performed by a self-diagnosis circuit (not shown) provided in the IC element 120, but it is not always necessary to perform it periodically.

  In addition, the infrared sensor 100 includes a plurality of linear slits 13 provided in the first thin film structure portion 3 a along the inner circumferential direction of the cavity portion 11. It is separated into a plurality of second thin film structure parts 3aa extending inward from the support part 3d that is a part surrounding the part 11, and a hot junction T1 of the thermopile 30a is provided for each second thin film structure part 3aa. Since all the thermopile 30a are electrically connected in a connection relationship in which the output change with respect to the temperature change is larger than when the output is taken out for each thermopile 30a, the response speed and the sensitivity can be improved. Since the failure diagnosis wiring 139 is formed across the second thin film structure portion 3aa, all the thermopiles 30a of the thermal infrared detection portion 3 are collectively It is possible to self-diagnosis Te. Further, in the infrared sensor 100, since the connecting pieces 3c that connect the adjacent second thin film structure portions 3aa and 3aa are formed, the warpage of each second thin film structure portion 3aa can be reduced, and the structural stability can be reduced. The sensitivity is stabilized.

  In the infrared sensor 100, the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, the reinforcing layer 39b, and the failure diagnosis wiring 139 are set to the same thickness. The uniformity of the stress balance of the thin film structure portion 3aa can be improved, the warpage of the second thin film structure portion 3aa can be suppressed, and the variation in sensitivity among products and the variation in sensitivity among pixel portions 2 can be reduced. .

  Further, in the infrared sensor 100, the failure diagnosis wiring 139 is formed of the same material as the n-type polysilicon layer 34 as the first thermoelectric element or the p-type polysilicon layer 35 as the second thermoelectric element. The fault diagnosis wiring 139 can be formed simultaneously with the first thermoelectric element or the second thermoelectric element, and the cost can be reduced by simplifying the manufacturing process.

  In addition, since the infrared sensor 100 is provided with a plurality of pixel portions 2 including the infrared absorbing portion 33 and the failure diagnosis wiring 139 in a two-dimensional array on the one surface side of the semiconductor substrate 1, By energizing the failure diagnosis wiring 139 of each pixel unit 2 at the time of self-diagnosis at the time of use, it becomes possible to grasp variation in sensitivity of the temperature sensing unit 30 of each pixel unit 2.

  Hereinafter, an example of a basic manufacturing method of the infrared sensor 100 will be described with reference to FIGS.

  First, a first silicon oxide film 31 having a first predetermined film thickness (for example, 0.3 μm) and a second predetermined film thickness (for example, 0.3 μm) are formed on the one surface side of the semiconductor substrate 1 made of a second conductivity type silicon substrate. , 0.1 μm), an insulating layer forming step for forming an insulating layer made of a laminated film with the silicon nitride film 32 is performed. Thereafter, a portion corresponding to the formation region A2 of the MOS transistor 4 is left using the photolithography technique and the etching technique while leaving a part of the insulating layer corresponding to the formation area A1 of the thermal infrared detector 3. The structure shown in FIG. 18A is obtained by performing an insulating layer patterning process for removing the film by etching. Here, the silicon oxide film 31 is formed by thermally oxidizing the semiconductor substrate 1 at a predetermined temperature (for example, 1100 ° C.), and the silicon nitride film 32 is formed by LPCVD.

After the above-described insulating layer patterning step, a well region forming step for forming a p-type (p ⁺ ) well region 41 of the first conductivity type on the one surface side of the semiconductor substrate 1 is performed. By performing a channel stopper region forming step of forming a p-type (p ⁺⁺ ) channel stopper region 42 of the first conductivity type in the well region 41 on the one surface side of the above, the structure shown in FIG. obtain. Here, in the well region forming step, first, the second silicon oxide film (thermal oxide film) 51 is selectively formed by thermally oxidizing the exposed portion on the one surface side of the semiconductor substrate 1 at a predetermined temperature. Thereafter, the silicon oxide film 51 is patterned by using a photolithography technique and an etching technique using a mask for forming the well region 41. Subsequently, the well region 41 is formed by performing ion implantation of a first conductivity type impurity (here, p-type impurity, for example, boron) and then performing drive-in. In the channel stopper region forming step, the third silicon oxide film (thermal oxide film) 52 is selectively formed by thermally oxidizing the one surface side of the semiconductor substrate 1 at a predetermined temperature. Thereafter, the third silicon oxide film 52 is patterned by using a photolithography technique and an etching technique using a mask for forming the channel stopper region 42. Subsequently, the channel stopper region 42 is formed by performing ion implantation of a first conductivity type impurity (here, p-type impurity, for example, boron) and then performing drive-in. Note that the first silicon oxide film 31, the second silicon oxide film 51, and the third silicon oxide film 52 constitute the silicon oxide film 1 b on the one surface side of the semiconductor substrate 1.

After the above-described channel stopper region forming step, source / drain formation for forming the second conductivity type n-type (n ⁺ ) drain region 43 and the second conductivity type n-type (n ⁺ ) source region 44 is formed. Perform the process. In this source / drain formation step, ions of a second conductivity type impurity (here, an n-type impurity, such as phosphorus) are implanted into the formation region of each of the drain region 43 and the source region 44 in the well region 41. After performing the above, the drain region 43 and the source region 44 are formed by driving.

  After the source / drain formation step, a gate insulating film 45 is formed on the one surface side of the semiconductor substrate 1 by, for example, thermal oxidation to form a gate insulating film 45 made of a silicon oxide film (thermal oxide film) having a predetermined thickness (for example, 600 mm) A formation process is performed. Subsequently, the gate electrode 46, the second wiring 102 (see FIG. 6), the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, and the fault diagnosis are formed on the entire surface of the semiconductor substrate 1 on the one surface side. A polysilicon layer forming step is performed in which a non-doped polysilicon layer having a predetermined film thickness (for example, 0.69 μm) serving as the basis of the wiring 139 is formed by the LPCVD method. Thereafter, the gate electrode 46, the second wiring 102, the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, and the fault diagnosis among the non-doped polysilicon layers using the photolithography technique and the etching technique. A polysilicon layer patterning process is performed so as to leave a portion corresponding to each of the wirings 139 for use. Subsequently, after p-type impurities (for example, boron) are ion-implanted into a portion of the non-doped polysilicon layer corresponding to the p-type polysilicon layer 35, the p-type polysilicon layer 35 is formed by driving. A p-type polysilicon layer forming step is performed. Thereafter, of the non-doped polysilicon layer, the n-type polysilicon layer 34, the infrared absorption layer 39, the failure diagnosis wiring 139, the gate electrode 46, and the portion corresponding to the second wiring 102 are n-type impurities such as phosphorus) The n-type polysilicon layer forming step of forming the n-type polysilicon layer 34, the infrared absorption layer 39, the failure diagnosis wiring 139, the gate electrode 46, and the second wiring 102 by performing the driving after the ion implantation is performed. By doing so, the structure shown in FIG. The order of the p-type polysilicon layer forming step and the n-type polysilicon layer forming step may be reversed.

After the p-type polysilicon layer forming step and the n-type polysilicon layer forming step are completed, an interlayer insulating film forming step for forming an interlayer insulating film 50 on the one surface side of the semiconductor substrate 1 is performed. Subsequently, the contact holes 50a ₁ , 50a ₂ , 50a ₃ , 50a ₄ , 50d, 50e, 50f (see FIGS. 12, 13, and 15) are formed in the interlayer insulating film 50 using photolithography technology and etching technology. The structure shown in FIG. 19B is obtained by performing the contact hole forming step to be formed. In the interlayer insulating film forming step, a BPSG film having a predetermined film thickness (for example, 0.8 μm) is deposited on the one surface side of the semiconductor substrate 1 by the CVD method, and then reflowed at a predetermined temperature (for example, 800 ° C.). The interlayer insulating film 50 planarized by the above is formed.

  After the contact hole forming step, the connection portions 36 and 37, the drain electrode 47, the source electrode 48, the fourth wiring 104, the first wiring 101, and the third wiring are formed on the entire surface of the semiconductor substrate 1 on the one surface side. 103, a metal film (for example, an Al-Si film) having a predetermined film thickness (for example, 2 μm) serving as a basis for the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, etc. (see FIG. 1A). A metal film forming step is performed by, for example. Subsequently, the metal film is patterned using a photolithography technique and an etching technique to connect the connection portions 36 and 37, the drain electrode 47, the source electrode 48, the fourth wiring 104, the first wiring 101, and the third wiring. By performing a metal film patterning process for forming 103, pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, etc., the structure shown in FIG. Etching in the metal film patterning step is performed by RIE. Moreover, the hot junction T1 and the cold junction T2 are formed by performing this metal film patterning process.

  After the metal film patterning step, a PSG film having a predetermined film thickness (for example, 0.5 μm) and a predetermined film thickness (for example, 0 μm) are formed on the one surface side of the semiconductor substrate 1 (that is, the surface side of the interlayer insulating film 50). A passivation film forming step of forming a passivation film 60 made of a laminated film with an NSG film of .5 μm) by the CVD method is performed to obtain the structure shown in FIG.

  After the above-described passivation film forming step, the silicon oxide film 31, the silicon nitride film 32, the interlayer insulating film 50, the passivation film 60, and the like, and the laminated structure portion in which the temperature sensitive portion 30 and the like are embedded are patterned. The structure shown in FIG. 21A is obtained by performing the laminated structure portion patterning step for forming the two thin film structure portions 3aa and the connecting pieces 3c. The slits 13 and 14 are formed in the layered structure portion patterning step.

  After the above-described laminated structure patterning step, an opening (not shown) is formed to expose the pad pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu using photolithography technology and etching technology. Perform the process. Next, the cavity is formed by forming the cavity 11 in the semiconductor substrate 1 by introducing the etchant with the slits 13 and 14 as the etchant introduction holes and anisotropically etching the semiconductor substrate 1 (crystal anisotropic etching). By performing the process, the infrared sensor 100 having the structure shown in FIG. Here, the etching in the opening forming step is performed by RIE. In the cavity forming step, a TMAH solution heated to a predetermined temperature (for example, 85 ° C.) is used as the etching solution. However, the etching solution is not limited to the TMAH solution, and other alkaline solutions (for example, a KOH solution, etc.) ) May be used. In addition, since all the processes until the cavity part forming process is completed are performed at the wafer level, a separation process for separating the individual infrared sensors 100 may be performed after the cavity part forming process is completed. Further, as can be seen from the above description, as for the manufacturing method of the MOS transistor 4, a well-known general MOS transistor manufacturing method is adopted, and a thermal oxide film is formed by thermal oxidation, a photolithography technique and etching. The well region 41, the channel stopper region 42, the drain region 43, and the source region 44 are formed by repeating basic steps of thermal oxide film patterning, impurity ion implantation, and drive-in (impurity diffusion) by technology. In the manufacturing method described above, the description of the manufacturing process of the Zener diode ZD is omitted. However, a known general Zener diode manufacturing method may be adopted as appropriate.

  In the infrared sensor 100 described above, the cavity 11 is formed by anisotropic etching utilizing the crystal plane orientation dependence of the etching rate, using the single crystal silicon substrate having the (100) surface as the semiconductor substrate 1. Although it has a quadrangular pyramid shape, it is not limited to a quadrangular pyramid shape, and may be a quadrangular frustum shape. The plane orientation of the one surface of the semiconductor substrate 1 is not particularly limited. For example, a single crystal silicon substrate having the Si (110) surface as the one surface may be used as the semiconductor substrate 1.

  The IC element 120 is an ASIC (Application Specific IC) and is formed using a silicon substrate. A bare chip is used as the IC element 120. Therefore, in the present embodiment, the package 133 can be downsized as compared with the case where the IC element 120 is a package of a bare chip.

  The IC element 120 includes a plurality of pads (not shown) that are electrically connected to the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, and Vzd of the infrared sensor 100, respectively. The IC element 120 is connected to the amplifier circuit 122 that amplifies the output voltages of the infrared sensor 100 and the thermistor 110, the b first pads Vout1 to Vout8 of the infrared sensor 100, and the one end of the thermistor 110, respectively. And a multiplexer 121 that alternatively inputs the output voltage of [b + 1] input pads (not shown) to the amplifier circuit 122. The IC element 120 includes an A / D conversion circuit 123 that converts output voltages of the infrared sensor 100 and the thermistor 110 amplified by the amplification circuit 122 into digital values. Further, the IC element 120 includes a calculation unit 124 that calculates the temperature of an object using a digital value output from the A / D conversion circuit 123 corresponding to each output voltage of the infrared sensor 100 and the thermistor 110, and a calculation unit. A memory 125 for storing data used for the calculation in 124 and a control circuit 126 for controlling the infrared sensor 100 are provided. The IC element 120 also includes the above-described self-diagnosis circuit.

  In the temperature sensor of the present embodiment, the internal space (airtight space) 165 of the package 133 constituted by the package body 134 and the package lid 135 is a dry nitrogen atmosphere, but the present invention is not limited to this. Good.

  In the package body 134, a wiring pattern (not shown) made of a metal material and an electromagnetic shield layer 144 are formed on a base 134a made of an insulating material, and the electromagnetic shield layer 144 has an electromagnetic shield function. On the other hand, the package lid 135 is conductive because the lens 153 has conductivity and the lens 153 is joined to the metal cap 152 by a conductive material. The package lid 135 is electrically connected to the electromagnetic shield layer 144 of the package body 134. Therefore, in the present embodiment, the electromagnetic shield layer 144 of the package body 134 and the package lid 135 can be set to the same potential. As a result, the package 133 prevents external electromagnetic noise to a sensor circuit (not shown) including the infrared sensor 100, the IC element 120, the wiring pattern, and a bonding wire (not shown) described later. Has an electromagnetic shielding function.

  The package body 134 is constituted by a flat ceramic substrate on which the infrared sensor 100 and the IC element 120 are mounted on one surface side. In short, the package body 134 has the base 134a made of ceramics, which is an insulating material, and the pads Vout1 to Vout8, Vsel1 to Vir1 of the infrared sensor 100 are formed on portions of the wiring pattern formed on the one surface side of the base 134a. Vsel8, Vrefin, Vsu, Vzd and the above-mentioned pads of the IC element 120 are appropriately connected via bonding wires. The infrared sensor 100 and the IC element 120 are electrically connected via a bonding wire or the like. As each bonding wire, it is preferable to use an Au wire having higher corrosion resistance than an Al wire.

  In the present embodiment, ceramics is used as the insulating material of the package body 134, so that the moisture resistance and heat resistance of the package body 134 are improved as compared with the case where an organic material such as an epoxy resin is used as the insulating material. be able to. Here, if alumina is used as the ceramic of the insulating material, the thermal conductivity of the insulating material is small compared to the case of using aluminum nitride, silicon carbide, or the like, and heat from the outside of the IC element 120 or the package 133 is reduced. The temperature rise of the infrared sensor 100 resulting from the can be suppressed.

  Further, the package body 134 is formed with external connection electrodes (not shown) constituted by a part of the above-described wiring pattern across the other surface and side surfaces of the base 134a. Thus, in the temperature sensor according to the present embodiment, after the secondary mounting on the circuit board or the like, it is possible to easily inspect the appearance of the joint portion with the circuit board or the like.

  The infrared sensor 100 is mounted on the package body 134 via a plurality of joints 115 made of a first die bond agent (for example, silicone resin). In addition, the IC element 120 is mounted on the package body 134 via a joint 118 made of a second die bond agent (for example, silicone resin). As each die bond agent, an insulating adhesive such as low melting glass, epoxy resin, or silicone resin, or conductive adhesive such as solder (lead-free solder, Au—Sn solder, etc.) or silver paste may be used. Further, without using each die-bonding agent, for example, bonding may be performed by a room temperature bonding method or a eutectic bonding method using Au—Sn eutectic or Au—Si eutectic.

  In the above-described temperature sensor, since the infrared sensor 100 is mounted on the package body 134 via the plurality of joints 115, the entire back surface of the infrared sensor 100 is joined to the package body 134 via the joints 115. Compared to the above, the space 116 between the infrared sensor 100 and the package main body 134 functions as a heat insulating portion, and the cross-sectional area of the joint 115 is reduced, so that heat is not easily transmitted from the package main body 134 to the infrared sensor 100. Become.

  The number of the joints 115 is not particularly limited, but when the outer peripheral shape of the infrared sensor 100 is rectangular (square or rectangular), for example, three is preferable. In this case, by providing at three locations corresponding to the three vertices of the virtual triangle defined based on the outer peripheral shape of the infrared sensor 100, the package main body 134 caused by temperature changes such as when mounted on the package main body 134 is provided. Since the deformation is transmitted as the inclination of the infrared sensor 100, the infrared sensor 100 can be prevented from being deformed, and the stress generated in the infrared sensor 100 can be reduced. In the present embodiment, when the outer peripheral shape of the infrared sensor 100 is, for example, a square shape, there are two locations on both ends of one side of the outer periphery of the infrared sensor 100 and one location on a side parallel to the one side. Although a virtual triangle having vertices is defined, the positions of the vertices of the virtual triangle are the outer peripheral shape of the infrared sensor 100 and wire bonding to the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, and Vzd of the infrared sensor 100. It is preferable to define it in consideration of the bonding reliability at the time (in other words, the positions of the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, and Vzd) of the infrared sensor 100. A spacer that defines the distance between the infrared sensor 100 and the package body 134 may be mixed in the joint portion 115. If such a spacer is mixed, the infrared sensor 100 and the package between the temperature sensor products are mixed. Variations in thermal insulation performance with the main body 134 can be reduced. However, the entire back surface of the infrared sensor 100 may be bonded to the package body 134 via the bonding portion 115.

  Further, the outer periphery of the IC element 120 is rectangular (square or rectangular), and the entire back surface is bonded to the package body 134 via the bonding portion 118.

  The package lid 135 is formed in a box shape in which one surface on the package body 134 side is opened, and a metal cap 152 in which an opening window 152a is formed at a portion corresponding to the infrared sensor 100, and the opening window 152a of the metal cap 152 is closed. The lens 153 is joined to the metal cap 152 in a form, and the one surface of the metal cap 152 is hermetically joined to the package body 134 in a form closed by the package body 134. Here, a frame-like metal pattern 147 (see FIG. 3A) along the outer peripheral shape of the package main body 134 is formed on the entire periphery of the one surface of the package main body 134. In the package 133, the package lid 135 and the metal pattern 147 of the package body 134 are metal-bonded by seam welding (resistance welding method), so that the airtightness and the electromagnetic shielding effect can be enhanced. Note that the metal cap 152 of the package lid 135 is formed of Kovar and is plated with Ni. Further, the metal pattern 147 of the package body 134 is formed by Kovar, plated with Ni, and further plated with Au.

  The joining method of the package lid 135 and the metal pattern 147 of the package body 134 is not limited to seam welding, and may be joined by other welding (for example, spot welding) or conductive resin. Here, if an anisotropic conductive adhesive is used as the conductive resin, the content of the conductive particles dispersed in the resin (binder) is small, and the package lid 135 and the package main body are heated and pressed during bonding. Since the thickness of the joint with 134 can be reduced, it is possible to prevent moisture and gas (for example, water vapor, oxygen, etc.) from entering the package 133 from the outside. Further, a conductive resin in which a desiccant such as barium oxide or calcium oxide is mixed may be used.

  In addition, although the outer peripheral shape of the package main body 134 and the package lid 135 is a rectangular shape, it is not limited to a rectangular shape, and may be a circular shape, for example. Further, the metal cap 152 of the package lid 135 includes a flange portion 152b extending outward from the edge on the package body 134 side over the entire circumference, and the flange portion 152b extends over the entire periphery. 134.

  The lens 153 is a plano-convex aspherical lens. Therefore, in the temperature sensor of the present embodiment, the sensitivity can be increased by improving the infrared light receiving efficiency of the infrared sensor 100 while reducing the thickness of the lens 153. In the temperature sensor of this embodiment, the detection area of the infrared sensor 100 can be set by the lens 153. The lens 153 is formed using a semiconductor substrate (semiconductor wafer) different from the semiconductor substrate 1 of the infrared sensor 100. The lens 153 made of this type of aspherical lens can be formed by, for example, a method for manufacturing a semiconductor lens using an anodization technique (see, for example, Japanese Patent No. 3897055 and Japanese Patent No. 3897056). .

  In the present embodiment, the detection area of the infrared sensor 100 can be set by the lens 153 made of the above-described semiconductor lens, and the lens 153 is a semiconductor lens having a shorter focal length, a larger aperture diameter, and smaller aberration than a spherical lens. Therefore, the package 133 can be thinned by reducing the focal length. The temperature sensor of the present embodiment assumes infrared light in the wavelength band (8 μm to 13 μm) near 10 μm emitted from the human body as infrared light to be detected by the infrared sensor 100, and the material of the lens 153 is ZnS or GaAs. Compared with Ge, Si has a lower environmental impact and can be manufactured at a lower cost than Ge, and Si has a smaller wavelength dispersion than ZnS. Note that the wavelength of infrared light to be detected by the infrared sensor 100 is not particularly limited.

  The lens 153 is fixed to the periphery of the opening 152a in the metal cap 152 by a joint 158 made of a conductive adhesive (for example, lead-free solder, silver paste, etc.). As described above, by using a conductive adhesive as the material of the joint portion 158, the lens 153 is electrically connected to the electromagnetic shield layer 144 of the package body 134 via the joint portion 158 and the metal cap 152. Therefore, it is possible to improve the shielding property against electromagnetic noise, and it is possible to prevent the S / N ratio from being lowered due to external electromagnetic noise.

  The above-mentioned lens 153 is a filter formed of an optical multilayer film (multilayer interference filter film) that transmits infrared rays in a desired wavelength range including the wavelength of infrared rays to be detected by the infrared sensor 100 and reflects infrared rays outside the wavelength range. It is preferable to provide a part (not shown). By providing such a filter part, it becomes possible to cut infrared rays and visible light in an unnecessary wavelength range other than the desired wavelength range by the filter part, and it is possible to suppress the generation of noise due to sunlight, High sensitivity can be achieved.

  In this embodiment, since the package body 134 is formed in a flat plate shape, the infrared sensor 100 and the IC element 120 can be easily mounted on the package body 134, and the cost of the package body 134 can be reduced. Become. Further, since the package body 134 is formed in a flat plate shape, the package body 134 is formed of a multilayer ceramic substrate in a box shape with one surface open, and the infrared sensor 100 is mounted on the inner bottom surface of the package body 134. Compared with the case where it does, the precision of the distance between the infrared sensor 100 arrange | positioned at the said one surface side of the package main body 134 and the lens 153 can be improved, and much higher sensitivity can be achieved. In the following description, in the package body 134, a region where the infrared sensor 100 is mounted is referred to as a first region 140, and a region where the IC element 120 is mounted is referred to as a second region 142.

  In the temperature sensor of the present embodiment, the thickness of the second region 142 is made thinner in the package body 134 than in the first region 140. Here, the second region 142 of the package body 134 is made thinner than the first region 140 by providing a recess 134b on the one surface of the base body 134a. Further, the electromagnetic shield layer 144 is exposed in the second region 142 of the package body 134.

  Further, in the second region 142 of the package body 134, a plurality of vias (thermal vias) 145 made of a metal material (for example, Cu) are provided in the thickness direction of the base body 134a, and each via 145 is an electromagnetic shield. It is thermally bonded in contact with layer 144.

  Here, the IC element 120 is mounted on the electromagnetic shield layer 144 via the joint 118 in the second region 142. Accordingly, it is possible to efficiently dissipate heat generated in the IC element 120 to the outside of the package 133 through the portion immediately below the IC element 120 and the via 145 in the electromagnetic shield layer 144, and the heat of the IC element 120 is transferred to the infrared sensor 100. It is possible to reduce the influence on the image.

  By the way, the potential of the first pads Vout1 to Vout8 is Vout, the potential of the second pads Vsel1 to Vsel8 is Vs, the potential of the third pad Vch is Vwell, the potential of the fourth pad Vrefin is Vref, and the temperature sensing unit 30. When the output voltage of V is V o, the control circuit 126 that controls the infrared sensor 100 in the IC element 120 is configured to turn on the a (eight) MOS transistors 4 connected to the second wiring 102. The potential Vs of the second pads Vsel1 to Vsel8 is Von, and the potential Vs of the second pad 102 when the a (eight) MOS transistors 4 connected to the second wiring 102 are turned off is Voff. When the potential Vs of the second pads Vsel1 to Vsel8 is set to Von, the fourth pad Vrefin—temperature sensing portion (thermoelectric conversion portion) 30—source region 44—well region due to the potential difference between Vref and Vwell. (Channel forming region) 4 1-Leakage current Ire (see FIG. 1B) flowing in a path passing through the third pad Vch senses the resolution of the input value (input voltage) in the A / D conversion circuit 123 (see FIG. 4B). Infrared sensor 100 is controlled under the conditions of Vwell and Vref set in advance so as to be equal to or less than the value divided by the product of the resistance value of warm section 30 and the amplification factor of amplification circuit 122. In the present embodiment, the control circuit 126 constitutes a control unit that controls the infrared sensor 100.

  For example, the control circuit 126 sets the potential Vref of the fourth pad Vrefin to 1.2 V, the potential Vwell of the third pad Vch to 1.2 V, and a (8) MOSs connected to the second wiring 102. When Von, which is the potential Vs of the second pads Vsel1 to Vsel8 when the transistor 4 is turned on, is set to 5 V, the MOS transistor 4 is turned on, and the output voltage (2) of the pixel portion 2 from the first pads Vout1 to Vout8. Vref + Vo) can be read out, and it is possible to suppress the occurrence of an offset voltage determined by the product of the leakage current Ire and the resistance value of the temperature sensing unit 30 in the output voltage of the pixel unit 2. Accordingly, the product of the offset voltage and the amplification factor can be made smaller than the resolution of the input value in the A / D conversion circuit 123, and the detection accuracy of the temperature of the object can be improved. FIG. 4 shows a relationship between [output voltage of the pixel unit 2] × amplification factor and the temperature of the object (object temperature) obtained by the calculation in the calculation unit 124. Further, if Voff which is the potential Vs of the second pads Vsel1 to Vsel8 when the a (eight) MOS transistors 4 connected to the second wiring 102 are turned off is set to 0 V, the MOS transistor 4 Is turned off, and the output voltage of the pixel portion 2 is not read from the first pads Vout1 to Vout8.

  Here, it is preferable that the control circuit 126 sets Vref = Vwell, which makes it possible to set the leakage current Ire shown in FIG. 1B to substantially zero and the offset voltage to substantially zero. As a result, the product of the offset voltage and the amplification factor can be more reliably made smaller than the resolution of the input value in the A / D conversion circuit 123, and the detection accuracy of the temperature of the object can be improved. Become. FIG. 1B illustrates an example in which the fourth pad Vrefin and the third pad Vch are shared by one (when the fourth pad Vrefin also serves as the third pad Vch). It is.

Further, the threshold voltage of the first parasitic diode constituted by the well region 41 and the source region 44 as the channel formation region and the second parasitic diode constituted by the well region 41 and the drain region 43 are set to Vth. If so, the control circuit 126
If the MOS transistor 4 is an nMOS transistor,
−Vth <{Vwell− (Vref + Vo)} <Vth
If the MOS transistor 4 is a pMOS transistor,
−Vth <{(Vref + Vo) −Vwell} <Vth
If the infrared sensor 100 is controlled under the conditions of Vref and Vwell set so as to satisfy the above relationship, it is possible to suppress the leakage current Ire from flowing.

  In the present embodiment, a silicon substrate of the second conductivity type is used as the semiconductor substrate 1, and Vth is about 0.6V to 0.7V. The semiconductor substrate 1 is not limited to a silicon substrate, and may be a germanium substrate, for example. In this case, Vth is about 0.2V to 0.3V.

  In the temperature sensor of this embodiment, each second wiring 102 has a cathode (cathode electrode 84a) to prevent an overvoltage from being applied between the gate electrode 46 and the source electrode 48 of each MOS transistor 4. Since the plurality of Zener diodes ZD connected are provided, it is possible to prevent an overvoltage from being applied between the gate electrode 46 and the source electrode 48 of each MOS transistor 4 and to prevent dielectric breakdown of the gate insulating film 45. It becomes possible to do.

  In the temperature sensor of the present embodiment, the above-described Zener diode ZD is provided in the second diffusion region of the second conductivity type in the first diffusion region 81 of the first conductivity type formed on the one surface side of the semiconductor substrate 1. 82, and includes a sixth pad Vzd to which the first diffusion regions 81 of the respective Zener diodes ZD are commonly connected, and when the potential of the sixth pad Vzd is Vhogo, the control circuit 126 Since Vhogo and Vwell are made different, the S / N ratio can be improved while protecting the gate insulating film 45 of the MOS transistor 4. Here, for example, as described above, when the potential Vwell of the third pad Vch is set to 1.2 V, the control circuit 126 sets the potential Vhogo of the sixth pad Vzd to 0 V.

  The temperature sensor includes a fifth substrate bias Vsu for substrate bias to which the semiconductor substrate 1 is connected in the infrared sensor 100. When the potential of the fifth pad Vsu is Vsub, the control circuit 126 Let Vwell = Vsub. That is, for example, as described above, when the potential Vwell of the third pad Vch is set to 1.2V, the control circuit 126 sets the potential Vsub of the fifth pad Vsu to 1.2V. In the equivalent circuit diagram of FIG. 2, a third parasitic diode D3 composed of the well region 41 and the semiconductor substrate 1 and a fourth parasitic diode D4 composed of the first diffusion region 81 and the semiconductor substrate 1 are shown. Is also described.

  Further, in the temperature sensor of the present embodiment, the conductivity type of the semiconductor substrate 1 is the second conductivity type, and includes the fifth pad Vsu for substrate bias to which the semiconductor substrate 1 is connected, and the potential of the fifth pad Vsu. Is set to Vsub, the control circuit 126 equalizes the potential Vwell of the third pad Vch and the potential Vsub of the fifth pad Vsu, that is, Vwell = Vsub, so that the well region which is a channel formation region Thus, it is possible to eliminate the potential difference between the semiconductor substrate 1 and the semiconductor substrate 1, and to suppress the leakage current from flowing through the third parasitic diode D3 (see FIG. 2) formed by the well region 41 and the semiconductor substrate 1. It becomes. In this case, in the infrared sensor 100, if the fourth pad Vrefin, the third pad Vch, and the fifth pad Vsu are shared, the number of pads can be reduced and the circuit configuration of the control circuit 126 can be reduced. Simplification can be achieved.

  In the temperature sensor of the present embodiment, the conductivity type of the semiconductor substrate 1 is the second conductivity type, the first conductivity type is the p-type, the second conductivity type is the n-type, and the control circuit 126 has Vhogo ≦ By setting Voff and Vhogo ≦ Vsub, the leakage current of the Zener diode ZD can be suppressed.

  In the temperature sensor according to the present embodiment, the example in which the first conductivity type is p-type and the second conductivity type is n-type has been described so far. However, the first conductivity type is n-type and the second conductivity type is n-type. In this case, the control circuit 126 can suppress the leakage current of the Zener diode ZD by setting Vhogo ≧ Voff and Vhogo ≧ Vsub.

Here, the conductivity type of the semiconductor substrate 1 is not limited to the n-type, and may be, for example, a p-type as shown in FIGS. FIG. 22 shows an example in which the p-type semiconductor substrate 1 forms a channel formation region, and the conductivity type of the drain region 43 and the source region 44 is n-type (n ⁺ ). In FIG. 23, a p-type (p ⁺ ) well region 41 formed in the p-type semiconductor substrate 1 constitutes a channel formation region, and the conductivity type of the drain region 43 and the source region 44 is n-type (n ⁺ ). FIG. 24 shows an example in which the n-type well region 41 formed in the p-type semiconductor substrate 1 constitutes a channel formation region, and the conductivity type of the drain region 43 and the source region 44 is p-type (p ⁺ ). It is.

  By the way, in the above-described infrared sensor 100, the cavity 11 of the semiconductor substrate 1 may be formed so as to penetrate in the thickness direction of the semiconductor substrate 1. In this case, in the cavity forming process for forming the cavity 11 An anisotropic etching technique using, for example, an inductively coupled plasma (ICP) type dry etching apparatus, to form a region where the cavity 11 is to be formed in the semiconductor substrate 1 from the other surface side opposite to the one surface of the semiconductor substrate 1. What is necessary is just to form using. In addition, the infrared sensor 100 is not limited as long as the plurality of pixel units 2 including the temperature sensing unit 30 that is a thermoelectric conversion unit are arranged in an array on the one surface side of the semiconductor substrate 1, and the structure is particularly limited. The number of thermopiles 30a constituting the temperature sensing unit 30 is not limited to a plurality, and may be one.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Pixel part 4 MOS transistor 30 Temperature sensing part (thermoelectric conversion part)
41 well region (channel formation region)
43 Drain region 44 Source region 46 Gate electrode 100 Infrared sensor 101 First wiring 102 Second wiring 103 Third wiring 104 Fourth wiring 110 Thermistor 122 Amplifying circuit 123 A / D conversion circuit 124 Arithmetic unit 126 Control circuit ( Control means)
Vout1 to Vout8 first pad Vsel1 to Vsel8 second pad Vch third pad Vrefin fourth pad Vsu fifth pad

Claims (3)

A (a ≧ 2) × b including a thermoelectric conversion unit configured by a thermopile that converts thermal energy generated by infrared rays emitted from an object into electrical energy and an analog output voltage of the thermoelectric conversion unit An infrared sensor in which (b ≧ 2) pixel portions are arranged in a two-dimensional array on one surface side of a semiconductor substrate, a thermistor that outputs an analog output voltage corresponding to the temperature of the infrared sensor, and the infrared sensor And an amplifier circuit for amplifying each output voltage of the thermistor, the infrared sensor amplified by the amplifier circuit, an A / D conversion circuit for converting each output voltage of the thermistor into a digital value, and the infrared sensor And a digital value output from the A / D conversion circuit corresponding to each output voltage of the thermistor. And a calculation unit for calculating the temperature of the object, and a control means for controlling the infrared sensor. The infrared sensor includes a MOS transistor in a first conductivity type channel forming region in the semiconductor substrate. The source region of the second conductivity type and the drain region of the second conductivity type are formed apart from each other, and one end of the thermoelectric conversion portion of the b pixel portions in each column is the source region of the MOS transistor The b first wirings commonly connected to each column via the drain region and the a second wirings in which the gate electrodes of the MOS transistors corresponding to the thermoelectric converters in each row are commonly connected to each row. Wiring, b third wirings in which the channel formation regions of the MOS transistors in each row are commonly connected for each column, and the other ends of the a thermoelectric conversion units in each column are in each column Both Pixel unit selection in which b fourth wirings connected through, b first pads for output in which the first wirings are connected to each other, and the second wirings are connected to each other A number of second pads, a third pad to which each of the third wirings is connected in common, and a fourth pad for reference bias to which the fourth wiring is connected in common, The potential of the first pad is Vout, the potential of the second pad is Vs, the potential of the third pad is Vwell, the potential of the fourth pad is Vref , the output of the thermoelectric converter is Vo, When the threshold voltage of the first parasitic diode composed of the channel formation region and the source region and the second parasitic diode composed of the channel formation region and the drain region is Vth, the control is performed. means, said MOS transistor is an nMOS transistor Can, -Vth <{Vwell- (Vref + Vo)} <Vth, the MOS transistor when the pMOS transistor, -Vth <{(Vref + Vo ) -Vwell} <Vwell which is previously set so as to satisfy the relation of Vth, the Vref A temperature sensor characterized by controlling the infrared sensor under conditions.   2. The temperature sensor according to claim 1, wherein the control means sets Vref = Vwell.   When the conductivity type of the semiconductor substrate is a second conductivity type, the substrate includes a fifth pad for substrate bias to which the semiconductor substrate is connected, and when the potential of the fifth pad is Vsub, the control means includes: 3. The temperature sensor according to claim 1, wherein Vwell = Vsub.

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