JP2012063222A - Infrared sensor, and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an infrared sensor capable of reducing thermal noise, and a manufacturing method of the same.SOLUTION: An infrared sensor 100 includes: a thermal infrared detection part 3 which has a temperature sensitive part 30 constituted of thermo-piles 30a and which is formed on one surface side of a semiconductor substrate 1 and supported by the semiconductor substrate 1; and a MOS transistor 4 which is formed on the one surface side of the semiconductor substrate to extract an output voltage of the temperature sensitive part 30. A gate electrode 46 of the MOS transistor 4 has a conductive polysilicon layer 46a on a gate insulating film 45, and a silicide layer 46b covering the conductive polysilicon layer 46a.

Description

  The present invention relates to an infrared sensor and a method for manufacturing the same.

  Conventionally, an infrared sensor 200 configured as shown in FIGS. 26 and 27 has been proposed (Patent Document 1). The infrared sensor 200 includes a thermal infrared detector 203 having a thermocouple-type temperature sensing unit 230 that generates an output voltage corresponding to a temperature change of the infrared absorber 233 that absorbs infrared rays, and a MOS transistor 204. Part 202 is provided. In the infrared sensor 100, a × b (4 × 4 in the example of FIG. 27) pixel portions 202 are arranged in a two-dimensional array on the one surface side of the base substrate 201. Here, the base substrate 201 is formed using an n-type silicon substrate 201a. In FIG. 27B, the equivalent circuit of the temperature sensing unit 230 is represented by a voltage source corresponding to the thermoelectromotive force of the thermocouple type temperature sensing unit 230.

MOS transistor 204, p-type on the first surface side of the silicon substrate 201a ^{(p +)} well region 241 is formed in, in the well region 241, drain region 243 and the n-type n-type ^{(n +) (n +} ) Source region 244 is formed apart from each other. Further, in the well region 241, a p-type (p ⁺⁺ ) channel stopper region 242 surrounding the drain region 243 and the source region 244 is formed. A gate electrode 246 made of an n-type polysilicon layer is formed on a portion of the well region 241 located between the drain region 243 and the source region 244 via a gate insulating film 245 made of a silicon oxide film. Yes. In the MOS transistor 204, a drain electrode 247 is formed on the drain region 243, a source electrode 248 is formed on the source region 244, and a ground electrode 249 is formed on the channel stopper region 242.

  The infrared sensor 200 described above includes a plurality of vertical readout lines 207 in which one end of the temperature sensing unit 230 of each of the plurality of thermal infrared detection units 203 in each column is commonly connected to each column via the MOS transistor 204, and each row. The gate electrode 246 of the MOS transistor 204 corresponding to the temperature sensing unit 230 of the thermal infrared detection unit 203 is provided with a plurality of horizontal signal lines 206 commonly connected for each row. Further, the infrared sensor 200 includes a plurality of ground lines 208 in which the well regions 241 of the MOS transistors 204 in each column are commonly connected for each column, and a common ground line 209 in which the ground lines 208 are commonly connected (FIG. 27 ( b)). Further, the infrared sensor 200 includes a plurality of reference bias lines 205 in which the other ends of the temperature sensing units 230 of the plurality of thermal infrared detection units 203 in each column are commonly connected to each column.

  In the infrared sensor 200, each horizontal signal line 206 is electrically connected to a different pixel selection pad Vsel, and each vertical readout line 207 is electrically connected to a different output pad Vop. It is connected to the.

  Further, in the infrared sensor 200, the common ground line 209 is electrically connected to the ground pad Gnd, the common reference bias line 205a is electrically connected to the reference bias pad Vrefin, and the silicon substrate 201a is It is electrically connected to the substrate pad Vdd.

  Therefore, in the above-described infrared sensor 200, the output voltage of each pixel unit 202 can be read sequentially by controlling the potential of each pixel selection pad Vsel so that the MOS transistors 204 are sequentially turned on.

  Here, in Patent Document 1, the potential of the reference bias pad Vrefin is 1.65 V, the potential of the ground pad Gnd is 0 V, the potential of the substrate pad Vdd is 5 V, and the pixel selection pad Vsel is set. Is set to 5V, the MOS transistor 204 is turned on, and the output voltage of the pixel unit 202 (1.65V + the output voltage of the temperature sensing unit 230) is read from the output pad Vop, and the pixel selection pad Vsel is read out. Describes that the MOS transistor 204 is turned off and the output voltage of the pixel portion 202 is not read from the output pad Vop.

  Further, in Patent Document 1, as shown in FIG. 28, an infrared sensor 200, a signal processing IC chip 300 that performs signal processing on an output voltage that is an output signal of the infrared sensor 200, an infrared sensor 200, and a signal processing IC chip. An infrared sensor module including a package 350 on which 300 is mounted is described. Here, in Patent Document 1, as shown in FIG. 29, a plurality of (four in the illustrated example) output pads Vop of the infrared sensor 200 are connected to the signal processing IC chip 300 by wires 80 each consisting of a bonding wire. A plurality of (four in the illustrated example) input pads Vin, an amplifier circuit 302 that amplifies the output voltage of the input pads Vin, and a plurality of input pads Vin that are electrically connected to each other via It is described that an infrared image can be obtained by providing a multiplexer 301 or the like that alternatively inputs an output voltage to the amplifier circuit 302.

  Conventionally, an infrared array sensor in which a thermal sensor element having a membrane structure is arranged in each of a large number of pixel formation regions on one surface side of a silicon substrate has been proposed (Patent Document 2).

  In the infrared array sensor disclosed in Patent Document 2, as shown in FIG. 30, on one surface side of the silicon substrate 411, the pixel formation region 420 is divided into four, and four thermal sensor elements 430 are arranged. .

Here, thermal sensor element 430, a bolometer type sensor element, the first and SiO ₂ thin film, a metal thin film resistance of the first SiO ₂ thin film, a second SiO ₂ film on the metal thin The membrane structure is formed of a laminate with an infrared absorption film on the second SiO ₂ thin film. Patent Document 2 discloses that the metal thin film resistors of the four thermal sensor elements 430 in the pixel formation region 420 are connected in series, and the voltage across the series circuit of the four metal thin film resistors is used as the output of the pixel. It is described that the output of each pixel can be increased with respect to temperature change. In the infrared array sensor described in Patent Document 2, a signal generation circuit and a selection circuit are provided so that a signal corresponding to the amount of received infrared light is output for each pixel.

  Patent Document 2 describes that a thermopile type sensor element may be applied as the thermal type sensor element 430 in addition to a bolometer type sensor element.

JP 2010-78451 A JP 2001-309122 A

  In the infrared sensor module as described above, it is desirable to reduce variations in temperature resolution. Further, instead of the infrared sensor 200 of the above-described infrared sensor module, it is conceivable to use a thermopile sensor element instead of the thermal sensor element 430 in the above-described infrared array sensor. It is desirable to reduce the variation.

By the way, if the _total noise of the above infrared sensor module is N _total [V], the temperature resolution of the infrared sensor module is NETD [° C.], and the output voltage of the temperature sensing unit 230 is V _AC [V / ° C.]
NETD = N _total / V _AC [° C.] (Formula 1)
It becomes.

Here, 1 / f noise of the infrared sensor module is N _{1 / f} [V], thermal noise of the infrared sensor 200 is N _Th [V], external noise is N _EMS [V], other than the infrared sensor 200 (signal processing IC) Let N _{T & E} [V] be the noise that combines thermal noise from the chip 300, package 350, etc.) and optical noise from the outside.
N _total = (N _{1 / f} + N _Th + N _EMS + N _{T & E} ) ^1/2 [V] (Formula 2)
It becomes.

Further, assuming that the combined resistance of the series connection of the resistance of the temperature sensing unit 230 connected in series at the time of signal readout in the infrared sensor 200 and the ON resistance of the MOS transistor 204 is R ₁₂ [Ω], N _Th ∝R ₁₂ ^{1 / 2} [V]. That is, the thermal noise of the infrared sensor 200, the resistance of the temperature sensing portion 230 when the on-resistance of the R _1, MOS transistors 204 and R _2, resistors R ₁ and the series connection of the on-resistance R ₂ of the combined resistance R ₁₂ It is proportional to the square root.

  This invention is made | formed in view of the said reason, The objective is to provide the infrared sensor which can reduce a thermal noise, and its manufacturing method.

  The infrared sensor according to the present invention includes a thermal infrared detector that includes a thermosensitive portion formed of a thermopile and is formed on one surface side of a semiconductor substrate and supported by the semiconductor substrate, and the one surface side of the semiconductor substrate. And a MOS transistor for extracting the output voltage of the temperature sensing part, wherein the MOS transistor has a gate electrode comprising a conductive polysilicon layer on a gate insulating film and the conductive poly And a silicide layer covering the silicon layer.

  In this infrared sensor, two types of thermoelectric elements of the thermopile thermocouple are a p-type polysilicon layer and an n-type polysilicon layer, and hot junctions in the p-type polysilicon layer and the n-type polysilicon layer, respectively. The end on the side and the end on the cold junction side are preferably covered with a silicide layer.

  In this infrared sensor, the thickness of the silicide layer formed on at least one of the p-type polysilicon layer and the n-type polysilicon layer in the thermopile, and the silicide formed on the conductive polysilicon layer in the gate electrode The layer thickness is preferably the same.

  In this infrared sensor, the thermopile preferably has the p-type polysilicon layer and the n-type polysilicon layer formed on different surfaces.

  In this infrared sensor, a cavity is formed immediately below a part of the thermal infrared detector on the one surface side of the semiconductor substrate, and the thermal infrared detector is on the one surface side of the semiconductor substrate. And a first thin film structure portion that covers the cavity portion in plan view on the one surface side of the semiconductor substrate, and the first thin film structure portion includes: A plurality of second thin film structure portions arranged side by side along the circumferential direction of the hollow portion and supported by the support portion, and a connecting piece for connecting the second thin film structure portions facing each other. The thermopile is provided across the second thin film structure portion and the support portion for each second thin film structure portion, and the output change with respect to the temperature change as compared with the case where the output is taken out for each thermopile Connection becomes larger It is preferred that all of the thermopile in engagement, which are electrically connected.

  In the method for manufacturing an infrared sensor of the present invention, after forming a non-doped polysilicon layer on the one surface side of the semiconductor substrate, the p-type polysilicon layer and the n-type polysilicon layer of the non-doped polysilicon layer are formed. The non-doped polysilicon layer is patterned so that a portion corresponding to at least one and a portion corresponding to the conductive polysilicon layer remain, and then an impurity is implanted into the non-doped polysilicon layer to form the p-type polysilicon layer. And at least one of the n-type polysilicon layer and the conductive polysilicon layer, and then, on the surface side of at least one of the p-type polysilicon layer and the n-type polysilicon layer, the thermopile Simultaneously with the formation of the silicide layer, the gate electrode is formed on the surface side of the conductive polysilicon layer. And forming the silicide layer that.

  In the infrared sensor of the present invention, thermal noise can be reduced.

  In the manufacturing method of the infrared sensor of this invention, it becomes possible to provide the infrared sensor which can reduce a thermal noise.

The principal part of the infrared sensor of embodiment is shown, (a)-(c) is a schematic sectional drawing. It is a plane layout figure of the principal part of an infrared sensor same as the above. It is a plane layout figure of an infrared sensor same as the above. It is an equivalent circuit diagram of an infrared sensor same as the above. It is a principal part equivalent circuit diagram of an infrared sensor same as the above. It is a schematic sectional drawing of the infrared sensor module provided with the infrared sensor same as the above. It is a plane layout figure of the pixel part of an infrared sensor same as the above. It is a plane layout figure of the pixel part of an infrared sensor same as the above. It is a plane layout figure of the principal part of the pixel part of an infrared sensor same as the above. It is a plane layout figure of the principal part of the pixel part of an infrared sensor same as the above. It is principal part explanatory drawing of an infrared sensor same as the above. Regarding the above infrared sensor, (a) is a plan layout view of the main part, and (b) is an enlarged view of the Zener diode of (a). It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is principal process sectional drawing for demonstrating the manufacturing method of an infrared sensor same as the above. It is a principal part schematic sectional drawing of the other structural example of an infrared sensor same as the above. It is a principal part schematic sectional drawing of the other structural example of an infrared sensor same as the above. It is a principal part schematic sectional drawing of the other structural example of an infrared sensor same as the above. It is a principal part schematic sectional drawing of another structural example of an infrared sensor same as the above. The infrared sensor of a prior art example is shown, (a) is a plane layout figure of a pixel part, (b) is a schematic sectional drawing corresponding to the DE cross section of (a). The infrared sensor same as the above is shown, (a) is a planar layout diagram, (b) is an equivalent circuit diagram. It is a principal part schematic plan view of the infrared sensor module provided with the infrared sensor same as the above. It is principal part explanatory drawing of the infrared sensor module provided with the infrared sensor same as the above. It is a principal part schematic perspective view of the infrared array sensor which shows another prior art example.

(Embodiment 1)
Hereinafter, the infrared sensor of the present embodiment will be described with reference to FIGS. 1A corresponds to the cross section AB in FIG. 2, FIG. 1B corresponds to the CD cross section in FIG. 2, and FIG. 1C corresponds to the EF cross section in FIG.

  In the infrared sensor 100, a × b (8 × 8 in the example of FIG. 3) pixel units 2 are arranged on one surface side of the semiconductor substrate 1 with a row and b columns (in the example of FIG. 3, 8 rows and 8 columns). Are arranged in a two-dimensional array. Here, the pixel unit 2 includes a temperature sensing unit 30 that is a thermoelectric conversion unit that converts thermal energy from infrared rays into electrical energy, and a MOS transistor 4 for extracting an output voltage of the temperature sensing unit 30. In the example of FIG. 3, a = 8 and b = 8, but a ≧ 2 and b ≧ 2 are acceptable.

  As shown in FIG. 1A, the above-described MOS transistor 4 includes a second conductivity type source region 44 and a first conductivity type well region 41 formed on the one surface side of the semiconductor substrate 1. A drain region 43 of two conductivity types is formed apart from each other. In the present embodiment, the well region 41 constitutes a channel formation region. FIG. 4 shows an equivalent circuit diagram when the first conductivity type is p-type, the second conductivity type is n-type, and the MOS transistor 4 is an n-channel MOS transistor. Further, in the equivalent circuit diagram of FIG. 4, the temperature sensing unit 30 is represented by a graphic symbol of a resistance element.

  Further, in the infrared sensor 100, one end of the temperature sensing unit 30 of the b (eight) pixel units 2 in each column is commonly connected to each column via the source region 44 and the drain region 43 of the MOS transistor 4. b (eight) first wirings 101 are provided.

  Further, the infrared sensor 100 includes a (eight) second wirings 102 in which the gate electrodes 46 of the MOS transistors 4 corresponding to the temperature sensing units 30 in the respective rows are commonly connected to the respective rows, and the MOS transistors 4 in the respective rows. B (eight) third wirings 103 in which the well regions 41 are commonly connected to each column, and the other ends of the a (eight) temperature sensing portions 30 in each column are common to each column. B (four in the illustrated example) connected to the fourth wiring 104.

  In the infrared sensor 100 described above, the b first pads Vout1 to Vout8 for output to which the first wiring 101 is individually connected and the pixel part selection a to which the second wiring 102 is individually connected. The second pads Vsel1 to Vsel8, the third pad Vch to which each third wiring 103 is commonly connected, and the fourth pad Vrefin for reference bias to which the fourth wiring 104 is commonly connected. I have. Therefore, the infrared sensor 100 can read the outputs of all the temperature sensing units 30 in time series. That is, the output voltage of each pixel unit 2 can be read sequentially by controlling the potentials of the second pads Vsel1 to Vsel8 for selecting each pixel unit 2 so that the MOS transistor 4 is sequentially turned on. it can.

  An example of an infrared sensor module including the above-described infrared sensor 100 is shown in FIG. This infrared sensor module includes an infrared sensor 100, an IC element 122 which is a control means for controlling the infrared sensor 100, and a package 133 in which the infrared sensor 100 and the IC element 122 are housed.

Here, the potentials of the first pads Vout1 to Vout8 are Vout, the potentials of the second pads Vsel1 to Vsel8 are Vs, the potential of the third pad Vch is Vwell, the potential of the fourth pad Vrefin is Vref, and the temperature sensing unit. The output voltage of Vo is Vo, the first parasitic diode composed of the well region 41 and the source region 44, which are channel forming regions, and the second parasitic diode composed of the well region 41 and the drain region 43. When the threshold voltage is set to Vth, the IC element 122 serving as the control means uses the second pads Vsel1 to Vsel1 to turn on the a (eight) MOS transistors 4 connected to the second wiring 102. The potential Vs of Vsel8 is set to Von, the potential Vs of the second pads Vsel1 to Vsel8 when the a (eight) MOS transistors 4 connected to the second wiring 102 are turned off is set to Voff, and the second Pad Vsel1-V When the potential Vs of sel8 is Von,
If the MOS transistor 4 is an nMOS transistor,
−Vth <{Vwell− (Vref + Vo)} <Vth
If the MOS transistor 4 is a pMOS transistor,
−Vth <{(Vref + Vo) −Vwell} <Vth
The infrared sensor 100 is controlled under the conditions of Vref and Vwell set so as to satisfy the relationship.

  In the present embodiment, a silicon substrate of the second conductivity type is used as the semiconductor substrate 1, and the reverse breakdown voltage of the first parasitic diode and the second parasitic diode is about −10V, while Vth is It becomes about 0.6V to 0.7V. Therefore, the IC element 122 has, for example, a potential (8) of the fourth pad Vrefin connected to the second wiring 102, the potential Vref of the fourth pad Vrefin being 1.2V, the potential Vwell of the third pad Vch being 1.2V. When Von, which is the potential Vs of the second pads Vsel1 to Vsel8 when the MOS transistor 4 is turned on, is set to 5 V, the MOS transistor 4 is turned on and the output of the pixel unit 2 is output from the first pads Vout1 to Vout8. The voltage (Vref + Vo) can be read out. Further, if Voff which is the potential Vs of the second pads Vsel1 to Vsel8 when the a (eight) MOS transistors 4 connected to the second wiring 102 are turned off is set to 0 V, the MOS transistor 4 Is turned off, and the output voltage of the pixel portion 2 is not read from the first pads Vout1 to Vout8. The semiconductor substrate 1 is not limited to a silicon substrate, and may be a germanium substrate, for example. In this case, Vth is about 0.2V to 0.3V.

  In the above infrared sensor module, the infrared sensor 100 is controlled under the conditions of Vref and Vwell set so as to satisfy the above relationship. Therefore, when the MOS transistor 4 is on, the first parasitic diode and the second parasitic diode are used. Leakage current can be suppressed, and the S / N ratio can be improved. That is, in the infrared sensor module according to the present embodiment, when the MOS transistor 4 is on, it is possible to suppress the leakage current flowing through the well region 41 that is the channel formation region, and to improve the S / N ratio. I can plan.

  In the infrared sensor module, if the IC element 122 is set to Vref = Vwell, a leakage current flows through the first parasitic diode and the second parasitic diode even when the output voltage Vo of the temperature sensing unit 30 is small. Can be suppressed. In the infrared sensor module, the IC element 122 preferably has substantially the same Vref and Vwell, and more preferably Vref = Vwell.

  In addition, the infrared sensor 100 includes a plurality of Zener diodes ZD each having a cathode connected to each second wiring 102 in order to prevent an overvoltage from being applied between the gate electrode 46 and the source electrode 48 of each MOS transistor 4. (See FIG. 4 and FIG. 5). Here, as shown in FIG. 12, the Zener diode ZD has a second diffusion region 82 of the second conductivity type in the first diffusion region 81 of the first conductivity type formed on the one surface side of the semiconductor substrate 1. It is formed. The infrared sensor 100 includes a fifth pad Vzd to which the first diffusion regions 81 of the respective Zener diodes ZD are commonly connected. When the potential of the fifth pad Vzd is Vhogo, the IC element 122 is Make Vhogo and Vwell different. Here, for example, as described above, when the potential Vwell of the third pad Vch is 1.2 V, the IC element 122 sets the potential Vhogo of the fifth pad Vzd to 0 V. Accordingly, in the infrared sensor module, since the IC element 122 makes Vhogo and Vwell different, the S / N ratio can be improved while protecting the gate insulating film 45 of the MOS transistor 4.

  In the infrared sensor module, the conductivity type of the semiconductor substrate 1 is the second conductivity type, the first conductivity type is p-type, the second conductivity type is n-type, and the IC element 122 has Vhogo ≦ Voff, and By setting Vhogo ≦ Vsub, the leakage current of the Zener diode ZD can be suppressed. Here, an example in which the first conductivity type is p-type and the second conductivity type is n-type (in this example, the MOS transistor 4 is an nMOS transistor) has been described, but the first conductivity type is n-type, In this case (in this case, the MOS transistor 4 is a pMOS transistor), the IC element 122 serving as a control means sets Vhogo ≧ Voff and Vhogo ≧ Vsub, thereby causing a Zener. The leakage current of the diode ZD can be suppressed.

  The infrared sensor 100 includes a sixth substrate Vsu for substrate bias to which the semiconductor substrate 1 is connected. When the potential of the sixth pad Vsu is Vsub, the IC element 122 has Vwell = Vsub. To do. That is, for example, as described above, when the potential Vwell of the third pad Vch is 1.2 V, the IC element 122 sets the potential Vsub of the sixth pad Vsu to 1.2 V. In short, in the infrared sensor module, since Vwell = Vsub, it is possible to eliminate the potential difference between the well region 41 which is a channel formation region and the semiconductor substrate 1, and the first structure constituted by the well region 41 and the semiconductor substrate 1. 3 can be prevented from flowing through the parasitic diode D3 (see FIG. 5). In the equivalent circuit diagram of FIG. 5, a third parasitic diode D3 composed of the well region 41 and the semiconductor substrate 1 and a fourth parasitic diode D4 composed of the first diffusion region 81 and the semiconductor substrate 1 are shown. Is also described.

  The IC element 122 is an ASIC (Application Specific IC) and is formed using a silicon substrate. Further, a bare chip is used as the IC element 122. Therefore, in the present embodiment, the package 133 can be reduced in size as compared with the case where the IC element 122 is a bare chip packaged.

  The IC element 122 includes a control circuit that controls the infrared sensor 100, and a plurality of pads (not shown) that are electrically connected to the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, and Vzd of the infrared sensor 100, respectively. An amplifier circuit that amplifies the output voltage of the pad electrically connected to each of the first pads Vout1 to Vout8, and alternatively the output voltage of the pad electrically connected to each of the first pads Vout1 to Vout8 Although the circuit configuration includes a multiplexer or the like for input to the amplifier circuit, the circuit configuration is not particularly limited. The IC element 122 also includes a self-diagnosis circuit described later. In the package 133, a thermistor for measuring the absolute temperature is arranged in the vicinity of the infrared sensor 100, and the IC element 122 calculates the temperature based on the output of the thermistor and the output of the temperature sensing unit 30. You may make it do.

  As shown in FIG. 6, the package 133 is hermetically sealed in the package body 134 so as to surround the infrared sensor 100 and the IC element 122 between the package body 134 and the package body 134 in which the infrared sensor 100 and the IC element 122 are mounted. And a package lid 135 joined together.

  In the above-described infrared sensor module, the internal space (airtight space) 165 of the package 133 is a dry nitrogen atmosphere, but is not limited thereto, and may be a vacuum atmosphere, for example.

  The package body 134 is mounted with the IC element 122 and the infrared sensor 100 side by side. On the other hand, the package lid 135 has a function of transmitting infrared rays to be detected by the infrared sensor 100 and conductivity.

  In the package body 134, a wiring pattern (not shown) made of a metal material and an electromagnetic shield layer 144 are formed on a base 134a made of an insulating material, and the electromagnetic shield layer 144 has an electromagnetic shield function. On the other hand, the package lid 135 is conductive because the lens 153 has conductivity and the lens 153 is fixed to the metal cap 152 by a joint 158 described later. The package lid 135 is electrically connected to the electromagnetic shield layer 144 of the package body 134. Therefore, in the present embodiment, the electromagnetic shield layer 144 of the package body 134 and the package lid 135 can be set to the same potential. As a result, the package 133 prevents external electromagnetic noise to a sensor circuit (not shown) including the infrared sensor 100, the IC element 122, the wiring pattern, and a bonding wire (not shown) described later. Has an electromagnetic shielding function.

  The package body 134 is configured by a flat ceramic substrate on which the infrared sensor 100 and the IC element 122 are mounted on one surface side. In short, the package body 134 is formed of ceramics whose base material 134a is an insulating material, and each pad Vout1 to Vout8, Vsel1 of the infrared sensor 100 is formed on a part of the wiring pattern formed on one surface side of the base material 134a. ~ Vsel8, Vrefin, Vsu, Vzd and the pads of the IC element 122 are appropriately connected via bonding wires. In the infrared sensor module, the infrared sensor 100 and the IC element 122 are electrically connected via a bonding wire or the like. As each bonding wire, it is preferable to use an Au wire having higher corrosion resistance than an Al wire. Further, the package body 134 is formed with external connection electrodes (not shown) constituted by a part of the above-described wiring pattern across the other surface and side surfaces of the base 134a.

  The infrared sensor 100 is mounted on the package body 134 via a plurality of joints 115 made of a first die bond agent (for example, silicone resin). Further, the IC element 122 is mounted on the package main body 134 via a bonding portion 125 made of a second die bond agent (for example, silicone resin). As each die bond agent, an insulating adhesive such as low melting glass, epoxy resin, or silicone resin, or conductive adhesive such as solder (lead-free solder, Au—Sn solder, etc.) or silver paste may be used. Further, without using each die-bonding agent, for example, bonding may be performed by a room temperature bonding method or a eutectic bonding method using Au—Sn eutectic or Au—Si eutectic.

  Since the infrared sensor 100 described above is mounted on the package body 134 via a plurality of joints 115, the entire back surface of each infrared sensor 100 is joined to the package body 134 via the joints 115. As a result, the space 116 between the infrared sensor 100 and the package main body 134 functions as a heat insulating portion, and the cross-sectional area of the joint 115 is reduced, so that heat is hardly transferred from the package main body 134 to the infrared sensor 100.

  The number of the joint portions 115 is not particularly limited, but when the outer peripheral shape of the infrared sensor 100 is rectangular (square or rectangular), for example, three are preferable. In this case, the infrared sensor By providing it at three locations corresponding to the three vertices of the virtual triangle defined based on the outer peripheral shape of 100, the deformation of the package main body 134 due to temperature changes such as when mounted on the package main body 134 causes the tilt of the infrared sensor 100 Therefore, the deformation of the infrared sensor 100 can be suppressed, and the stress generated in the infrared sensor 100 can be reduced. In the present embodiment, when the outer peripheral shape of the infrared sensor 100 is, for example, a square shape, there are two locations on both ends of one side of the outer periphery of the infrared sensor 100 and one location on a side parallel to the one side. Although a virtual triangle having vertices is defined, the positions of the vertices of the virtual triangle are the outer peripheral shape of the infrared sensor 100 and wire bonding to the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, and Vzd of the infrared sensor 100. It is preferable to define it in consideration of the bonding reliability at the time (in other words, the positions of the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, and Vzd) of the infrared sensor 100. A spacer that defines the distance between the infrared sensor 100 and the package body 134 may be mixed in the joint portion 115. If such a spacer is mixed, the infrared sensor 100 between the products of the infrared sensor module can be mixed. Variations in thermal insulation performance with the package body 134 can be reduced. However, the entire back surface of the infrared sensor 100 may be bonded to the package body 134 via the bonding portion 115.

  The package lid 135 is formed in a box shape in which one surface on the package body 134 side is opened, and a metal cap 152 in which an opening window 152a is formed at a portion corresponding to the infrared sensor 100, and the opening window 152a of the metal cap 152 is closed. The lens 153 is joined to the metal cap 152 in a form, and the one surface of the metal cap 152 is hermetically joined to the package body 134 in a form closed by the package body 134. Here, a frame-like metal pattern 147 (see FIG. 6) along the outer peripheral shape of the package main body 134 is formed on the peripheral portion of the one surface of the package main body 134 over the entire periphery, and the package lid 135 is formed. The metal pattern 147 of the package body 134 is metal-bonded by seam welding (resistance welding method), and airtightness and electromagnetic shielding effect can be enhanced. Note that the metal cap 152 of the package lid 135 is formed of Kovar and is plated with Ni. Further, the metal pattern 147 of the package body 134 is formed by Kovar, plated with Ni, and further plated with Au.

  The joining method of the package lid 135 and the metal pattern 147 of the package body 134 is not limited to seam welding, and may be joined by other welding (for example, spot welding) or conductive resin. Here, if an anisotropic conductive adhesive is used as the conductive resin, the content of the conductive particles dispersed in the resin (binder) is small, and the package lid 135 and the package main body are heated and pressed during bonding. Since the thickness of the joint with 134 can be reduced, it is possible to prevent moisture and gas (for example, water vapor, oxygen, etc.) from entering the package 133 from the outside. Further, a conductive resin in which a desiccant such as barium oxide or calcium oxide is mixed may be used.

  In addition, although the outer peripheral shape of the package main body 134 and the package lid 135 is a rectangular shape, it is not limited to a rectangular shape, and may be a circular shape, for example. Further, the metal cap 152 of the package lid 135 includes a flange portion 152b extending outward from the edge on the package body 134 side over the entire circumference, and the flange portion 152b extends over the entire periphery. 134.

  The lens 153 is a plano-convex aspherical lens. Therefore, in the above-described infrared sensor module, it is possible to increase the sensitivity by improving the infrared light receiving efficiency of the infrared sensor 100 while reducing the thickness of the lens 153. In the infrared sensor module described above, the detection area of the infrared sensor 100 can be set by the lens 153. The lens 153 is formed using a semiconductor substrate (semiconductor wafer) different from the semiconductor substrate 1 of the infrared sensor 100. That is, the lens 153 has an anode whose contact pattern is designed with a semiconductor substrate (here, a silicon substrate) according to a desired lens shape so that the contact with the semiconductor substrate becomes ohmic contact with one surface side of the semiconductor substrate. After the formation, the porous portion is formed as a removal site by anodizing the other surface side of the semiconductor substrate in an electrolytic solution composed of a solution for removing the oxide of the constituent element of the semiconductor substrate by etching. It is comprised by the semiconductor lens (here silicon lens) formed by removing. Therefore, the lens 153 has conductivity. For example, a manufacturing method disclosed in Japanese Patent No. 3897055 and Japanese Patent No. 3897056 may be appropriately applied to a manufacturing method of a semiconductor lens to which this kind of anodization technology is applied.

  In the infrared sensor module, the detection area of the infrared sensor 100 can be set by the lens 153 made of the above-described semiconductor lens. In addition, since the infrared sensor module employs a semiconductor lens having a shorter focal point, a larger aperture diameter, and smaller aberration than the spherical lens as the lens 153, the package 133 can be made thinner by shortening the focal point.

  The lens 153 is fixed to the periphery of the opening 152a in the metal cap 152 by a joint 158 made of a conductive adhesive (for example, lead-free solder, silver paste, etc.). Thus, in the infrared sensor module, the lens 153 is electrically connected to the electromagnetic shield layer 144 of the package body 134 via the joint 158 and the metal cap 152, so that the shielding property against electromagnetic noise can be improved. A decrease in S / N ratio due to external electromagnetic noise can be prevented.

  The above-mentioned lens 153 is a filter formed of an optical multilayer film (multilayer interference filter film) that transmits infrared rays in a desired wavelength range including the wavelength of infrared rays to be detected by the infrared sensor 100 and reflects infrared rays outside the wavelength range. It is preferable to provide a part (not shown). By providing such a filter part, it becomes possible to cut infrared rays and visible light in an unnecessary wavelength range other than the desired wavelength range by the filter part, and it is possible to suppress the generation of noise due to sunlight, High sensitivity can be achieved.

  Hereinafter, in the package main body 134, a region where the infrared sensor 100 is mounted is referred to as a first region 140, and a region where the IC element 122 is mounted is referred to as a second region 142.

  In the infrared sensor module described above, the thickness of the second region 142 is made thinner in the package body 134 than in the first region 140. Here, the second region 142 of the package body 134 is made thinner than the first region 140 by providing a recess 134b on the one surface of the base body 134a. Further, the electromagnetic shield layer 144 is exposed in the second region 142 of the package body 134.

  Further, in the second region 142 of the package body 134, a plurality of vias (thermal vias) 145 made of a metal material (for example, Cu) are provided in the thickness direction of the base body 134a, and each via 145 is an electromagnetic shield. It is thermally bonded in contact with layer 144.

  Here, the IC element 122 is mounted on the electromagnetic shield layer 144 via the bonding portion 125 in the second region 142. Therefore, it is possible to efficiently dissipate heat generated in the IC element 122 to the outside of the package 133 through a portion of the electromagnetic shield layer 144 immediately below the IC element 122 and the via 145.

  In manufacturing the above-described infrared sensor module, after performing the mounting process of mounting the infrared sensor 100 and the IC element 122 on the package body 134, the bonding process of bonding the package lid 135 and the package body 134 in a desired atmosphere is performed. You just have to do it.

  Hereinafter, the infrared sensor 100 will be further described. In FIGS. 7, 9, 10, and 12, the connection relationship between the n-type polysilicon layer 34 and the p-type polysilicon layer 35 of the thermopile 30a is easily understood. The width of each of the n-type polysilicon layer 34 and the p-type polysilicon layer 35 is narrowly described.

  The infrared sensor 100 includes a plurality of (a × b) pixel units 2 each having a thermal infrared detection unit 3 and a MOS transistor 4 in which a temperature sensing unit 30 is embedded, two-dimensionally on the one surface side of the semiconductor substrate 1. Arranged in an array. Here, the one surface of the semiconductor substrate 1 is a Si (100) plane. The temperature sensing unit 30 is configured by connecting a plurality of (here, six) thermopiles 30a (see FIGS. 1 and 7) in series.

  The thermal infrared detector 3 of each pixel unit 2 is formed in a region for forming the thermal infrared detector 3 on the one surface side of the semiconductor substrate 1. Further, the MOS transistor 4 of each pixel unit 2 is formed in the formation region of the MOS transistor 4 on the one surface side of the semiconductor substrate 1.

  In the infrared sensor 100, a cavity 11 is formed immediately below a part of the thermal infrared detector 3 on the one surface side of the semiconductor substrate 1. The thermal infrared detector 3 includes a support 3d formed on the periphery of the cavity 11 on the one surface side of the semiconductor substrate 1, and a first cover that covers the cavity 11 in plan view on the one surface side of the semiconductor substrate 1. 1 thin film structure portion 3a. The first thin film structure portion 3a includes an infrared absorbing portion 33 (see FIG. 7) that absorbs infrared rays. Here, the first thin film structure portion 3a includes a plurality of second thin film structure portions 3aa arranged in parallel along the circumferential direction of the cavity portion 11 and supported by the support portion 3d, and adjacent second thin film structure portions. It has the connection piece 3c (refer FIG. 2 and FIG. 7) which connects 3aa. In the thermal infrared detector 3 in the example of FIG. 7, the first thin film structure 3 a is separated into six second thin film structures 3 aa by providing a plurality of linear slits 13. Below, each part divided | segmented corresponding to each 2nd thin film structure part 3aa among the infrared absorption parts 33 (it calls 1st infrared absorption part 33) is called 2nd infrared absorption part 33a.

  The thermal infrared detector 3 is provided with a thermopile 30a for each second thin film structure 3aa. Here, in the thermopile 30a, the hot junction T1 is provided in the second thin film structure portion 3aa, and the cold junction T2 is provided in the support portion 3d. In short, the hot junction T1 is formed in a region overlapping the cavity 11 in the thermal infrared detector 3, and the cold junction T2 is formed in a region not overlapping the cavity 11 in the thermal infrared detector 3.

  In addition, the temperature sensing unit 30 of the thermal infrared detection unit 3 has a connection relationship in which the output change with respect to the temperature change is larger than when the output is taken out for each thermopile 30a, and all the thermopile 30a are electrically connected. Yes. In the example of FIG. 7, the temperature sensing unit 30 has six thermopiles 30a connected in series. However, the connection relationship described above is not limited to the connection relationship in which all of the plurality of thermopiles 30a are connected in series. For example, if a series circuit of three thermopiles 30a is connected in parallel, the sensitivity can be increased as compared with the case where six thermopiles 30a are connected in parallel or the output is taken out for each thermopile 30a. . In addition, compared to the case where all of the six thermopiles 30a are connected in series, the electrical resistance of the temperature sensing unit 30 can be lowered and the thermal noise is reduced, so the S / N ratio is improved.

  Here, in the thermal-type infrared detection unit 3, for each second thin film structure unit 3aa, the two bridge portions 3bb and 3bb having a rectangular shape in plan view connecting the support unit 3d and the second infrared absorption unit 33a are hollow. The portions 11 are formed so as to be separated from each other in the circumferential direction. As a result, a slit 14 having a U-shape in plan view that spatially separates the two bridge portions 3bb, 3bb and the second infrared absorbing portion 33a and communicates with the cavity portion 11 is formed. The support part 3d which is a site | part surrounding the 1st thin film structure part 3a in planar view among the thermal-type infrared detection parts 3 has a rectangular frame shape. Note that the bridge portion 3bb has a space other than the second infrared absorption portion 33a and the support portion 3d, and the space between the second infrared absorption portion 33a and the support portion 3d. Separated. Here, in the second thin film structure portion 3aa, the dimension in the extending direction from the support part 3d is 93 μm, the dimension in the width direction orthogonal to the extending direction is 75 μm, the width dimension of each bridge portion 3bb is 23 μm, and each slit Although the widths 13 and 14 are set to 5 μm, these values are merely examples and are not particularly limited.

  The first thin film structure portion 3a includes a first silicon oxide film 31 formed on the one surface side of the semiconductor substrate 1 and a first silicon nitride film 32a formed on the first silicon oxide film 31. A second silicon nitride film 32b formed on the first silicon nitride film 32a, a temperature sensing part 30 formed on the surface side of the second silicon nitride film 32b, and a second silicon nitride film 32b It is formed by patterning a laminated structure portion of an insulating film 50 formed so as to cover most of the temperature sensitive portion 30 on the surface side thereof and a passivation film 60 formed on the insulating film 50. The insulating film 50 is composed of a laminated film of second to fifth silicon oxide films 52a to 52d each made of a BPSG film. The passivation film 60 is composed of a BPSG film, but is not limited thereto, and may be composed of, for example, a laminated film of a PSG film and an NSG film formed on the PSG film, a silicon nitride film, or the like. .

  In the thermal infrared detector 3 described above, the portions of the silicon nitride films 32a and 32b other than the bridge portions 3bb and 3bb of the first thin film structure portion 3a constitute the first infrared absorber 33. The support portion 3d is composed of the first silicon oxide film 31, the silicon nitride films 32a and 32b, the insulating film 50, and the passivation film 60.

  In addition, in the infrared sensor 100, the laminated film of the insulating film 50 and the passivation film 60 is formed on the one surface side of the semiconductor substrate 1 between the formation region of the thermal infrared detector 3 and the formation region of the MOS transistor 4. It is formed straddling.

  Further, in each pixel portion 2, the inner peripheral shape of the cavity portion 11 is rectangular, and the connecting piece 3c is formed in an X shape in plan view, and intersects with the extending direction of the second thin film structure portion 3aa. The second thin film structure portions 3aa and 3aa adjacent in the oblique direction, the second thin film structure portions 3aa and 3aa adjacent in the extension direction of the second thin film structure portion 3aa, and the extension direction of the second thin film structure portion 3aa The second thin film structure portions 3aa and 3aa adjacent to each other in the direction orthogonal to are connected to each other.

  The thermopile 30a has one end portion of an n-type polysilicon layer 34 and a p-type polysilicon layer 35 formed on the surface side of the second silicon nitride film 32b and straddling the second thin film structure portion 3aa and the support portion 3d. A plurality of thermocouples that are electrically connected to each other by a connecting portion (hereinafter referred to as a first connecting portion) 36 are provided. In addition, the thermopile 30a has a connection portion (hereinafter referred to as a first connection) between the other end portion of the n-type polysilicon layer 34 and the other end portion of the p-type polysilicon layer 35 of the thermocouple adjacent to each other on the one surface side of the semiconductor substrate 1. 2) (referred to as a connecting portion 2).

  In short, the thermopile 30a has the hot junction T1 including the one end portion of the n-type polysilicon layer 34, the one end portion of the p-type polysilicon layer 35, and the first connection portion 36, and the n-type polysilicon layer 34. The other end of the p-type polysilicon layer 35 and the second connecting portion 37.

  The n-type polysilicon layer 34 and the p-type polysilicon layer 35 are formed on different surfaces as shown in FIG. Here, in each bridge portion 3bb, as shown in FIGS. 1 and 2, the n-type polysilicon layer 34 and the p-type polysilicon layer 35 are arranged in stripes in plan view. More specifically, in the infrared sensor 100 of the present embodiment, the n-type polysilicon layers 34 and the p-type polysilicon layers 35 are alternately arranged in a plan view of each bridge portion 3bb. Since the p-type polysilicon layer 35 and the p-type polysilicon layer 35 are formed on different planes, the plane is larger than when the n-type polysilicon layer 34 and the p-type polysilicon layer 35 are formed on the same plane. The gap between the n-type polysilicon layer 34 and the p-type polysilicon layer 35 adjacent to each other can be shortened, the number of thermocouples in the thermopile 30a can be increased, and high sensitivity can be achieved.

In the thermopile 30a, a silicide layer 38 is stacked in a second portion of the n-type polysilicon layer 34 other than the first portion formed in each bridge portion 3bb described above. Similarly, a silicide layer 38 is stacked in a fourth portion of the p-type polysilicon layer 35 other than the third portion formed in each of the bridge portions 3bb described above. The silicide layer 38 is composed of a tungsten silicide (WSi ₂ ) layer that is a kind of refractory metal silicide, but is not limited thereto, and may be composed of, for example, a titanium silicide (TiSi ₂ ) layer.

  In short, in the thermopile 30a, two types of thermoelectric elements of the thermocouple are the p-type polysilicon layer 35 and the n-type polysilicon layer 34, and the hot junctions in the p-type polysilicon layer 35 and the n-type polysilicon layer 34, respectively. The end portion on the T1 side and the end portion on the cold junction T2 side are covered with the silicide layer 38.

  Further, in the infrared sensor 100, the cavity portion 11 has a quadrangular pyramid shape, and the central portion in plan view has a depth dimension larger than that of the peripheral portion, so the first thin film structure portion 3a. The planar layout of the thermopile 30a in each pixel unit 2 is designed so that the hot junction T1 gathers at the center of the pixel.

  That is, in the two second thin film structure portions 3aa in the middle in the vertical direction of FIG. 7, as shown in FIGS. 7 and 9, the hot junction T1 is arranged along the juxtaposed direction of the three second thin film structure portions 3aa. Are arranged side by side, in the upper two second thin film structure portions 3aa in the vertical direction, as shown in FIG. 7 and FIG. 10, the juxtaposed direction of the three second thin film structure portions 3aa In FIG. 7, the hot junctions T1 are concentratedly arranged on the side close to the middle second thin film structure portion 3aa, and in the two lower second thin film structure portions 3aa in the vertical direction, as shown in FIG. In the direction in which the three second thin film structure portions 3aa are arranged side by side, the hot junctions T1 are concentrated on the side close to the middle second thin film structure portion 3aa.

  Thus, in the infrared sensor 100 of the present embodiment, the arrangement of the plurality of hot junctions T1 of the upper and lower second thin film structure portions 3aa in the vertical direction in FIG. 7 is the same as that of the second thin film structure portion 3aa in the middle. Since the temperature change of the hot junction T1 can be increased compared to the case where the arrangement of the multiple hot junctions T1 is the same, the sensitivity can be improved. In the present embodiment, the depth of the deepest portion of the cavity portion 11 is set to 200 μm, but this value is an example and is not particularly limited.

  Further, the second thin film structure portion 3aa suppresses the warp of the second thin film structure portion 3aa and absorbs infrared rays in a region where the thermopile 30a is not formed on the infrared incident surface side of the second silicon nitride film 32b. An infrared absorption layer 39 made of a p-type polysilicon layer is formed. Further, a reinforcing layer 39b made of a p-type polysilicon layer that reinforces the connecting piece 3c is provided on the connecting piece 3c that connects the adjacent second thin film structures 3aa, 3aa (see FIGS. 7, 9, and 10). Is provided. Here, the reinforcing layer 39 b is formed integrally with the infrared absorption layer 39. Thus, in the infrared sensor 100, since the connecting piece 3c is reinforced by the reinforcing layer 39b, it is possible to prevent damage due to stress generated due to external temperature change or impact during use, and damage during manufacture. And the production yield can be improved. In the present embodiment, the length dimension of the connecting piece 3c is set to 24 μm, the width dimension is set to 5 μm, and the width dimension of the reinforcing layer 39b is set to 1 μm. However, these numerical values are merely examples and are not particularly limited. Absent. However, when a silicon substrate is used as the semiconductor substrate 1 and the reinforcing layer 39b is formed of a p-type polysilicon layer, in order to prevent the reinforcing layer 39b from being etched during the formation of the cavity 11, The width dimension of the reinforcing layer 39b is set to be smaller than the width dimension of the connecting piece 3c, and both side edges of the reinforcing layer 39b need to be positioned inside the both side edges of the connecting piece 3c in plan view.

  In addition, as shown in FIG. 11 (b), the infrared sensor 100 has chamfered portions 3d and 3d formed between both side edges of the connecting piece 3c and side edges of the second thin film structure portion 3aa, respectively. A chamfered portion 3e is also formed between the substantially perpendicular side edges of the connecting piece 3c. Therefore, in the infrared sensor 100, the stress concentration at the connection portion between the connection piece 3c and the second thin film structure portion 3aa is reduced as compared with the case where the chamfered portion is not formed as shown in FIG. In addition, it is possible to reduce the residual stress generated at the time of manufacturing, reduce the damage at the time of manufacturing, and improve the manufacturing yield. Further, it is possible to prevent damage due to stress generated due to an external temperature change or impact during use. In the illustrated example, each of the chamfered portions 3d and 3e is an R chamfered portion having an R (R) of 3 μm, but is not limited to the R chamfered portion, and may be a C chamfered portion, for example.

  The infrared sensor 100 is routed to each thermal infrared detector 3 so as to straddle the support 3d, one bridge 3bb, the second infrared absorber 33a, the other bridge 3bb, and the support 3d. A failure diagnosis wiring (heat failure diagnosis heater) 139 made of the p-type polysilicon layer is provided, and all the failure diagnosis wirings 139 are connected in series. Accordingly, it is possible to detect the presence or absence of breakage such as breakage of the bridge portion 3bb by energizing the series circuit of the a × b failure diagnosis wirings 139.

  In short, the infrared sensor 100 is configured such that the bridge portion 3bb is broken or the failure diagnosis wiring 139 is changed depending on whether or not the series circuit of the a × b failure diagnosis wirings 139 is energized at the time of inspection or use during manufacture. Disconnection can be detected. Further, in the infrared sensor 100, the temperature sensing unit 30 is detected by energizing the series circuit of the a × b failure diagnosis wirings 139 and detecting the output of each temperature sensing unit 30 during the above-described inspection and use. It is possible to detect the presence / absence of disconnection and variations in sensitivity (variations in the output of the temperature sensing unit 30). Here, regarding the sensitivity variation, it is possible to detect the sensitivity variation for each pixel unit 2. For example, the warp of the first thin film structure unit 3 a or the semiconductor substrate 1 of the first thin film structure unit 3 a. It is possible to detect variations in sensitivity due to sticking or the like. In addition, the infrared sensor 100 has a shape in which the fault diagnosis wiring 139 is folded and meandered in the vicinity of the group of the plurality of hot junctions T1 in a plan view. Therefore, each hot junction T1 can be efficiently warmed by Joule heat generated by energizing the failure diagnosis wiring 139. The above-described failure diagnosis wiring 139 is formed with the same thickness on the same plane as the p-type polysilicon layer 35 of the thermopile 30a.

The infrared absorption layer 39 and the failure diagnosis wiring 139 described above contain the same p-type impurity (for example, boron) as the p-type polysilicon layer 35 at the same impurity concentration (for example, 10 ¹⁸ to 10 ²⁰ cm ⁻³ ). The p-type polysilicon layer 35 is formed at the same time. In addition, the n-type polysilicon layer 34 may employ, for example, phosphorus as the n-type impurity, and the impurity concentration may be appropriately set within a range of, for example, about 10 ¹⁸ to 10 ²⁰ cm ⁻³ . In the present embodiment, the impurity concentration of each of the n-type polysilicon layer 34 and the p-type polysilicon layer 35 is 10 ¹⁸ to 10 ²⁰ cm ⁻³ , the resistance value of the thermocouple can be reduced, and the S / N ratio can be improved. I can plan. The infrared absorption layer 39 and the failure diagnosis wiring 139 are doped with the same p-type impurity as the p-type polysilicon layer 35 at the same impurity concentration. However, the present invention is not limited to this. For example, the n-type polysilicon layer 34 The same impurity may be doped with the same impurity concentration.

By the way, in the present embodiment, the refractive index of the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, and the failure diagnosis wiring 139 is n ₁ , and the center wavelength of the detection target infrared is λ. time, so as to set the n-type polysilicon layer 34, p-type polysilicon layer 35, the infrared-absorbing layer 39, and the failure diagnosis wirings 139 respectively thicknesses t1 to lambda / 4n _1. Therefore, the absorption efficiency of infrared rays having a wavelength to be detected (for example, 8 to 12 μm) can be increased, and high sensitivity can be achieved. For example, when n ₁ = 3.6 and λ = 10 μm, t 1 ≈0.69 μm may be set.

In the present embodiment, since the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, and the failure diagnosis wiring 139 have impurity concentrations of 10 ¹⁸ to 10 ²⁰ cm ⁻³ , the infrared The reflection of infrared rays can be suppressed while increasing the absorption rate of the light, and the S / N ratio of the output of the temperature sensing unit 30 can be increased. Further, since the infrared absorption layer 39 and the failure diagnosis wiring 139 can be formed in the same process as the p-type polysilicon layer 35, the cost can be reduced.

  Here, the first connection part 36 and the second connection part 37 of the temperature sensing part 30 are insulated and separated by the insulating film 50 on the one surface side of the semiconductor substrate 1 (see FIG. 1). The first connection portion 36 and the second connection portion 37 are formed along the surface of the silicide layer 38 on the polysilicon layers 34 and 35 and the inner peripheral surface of the contact hole 50a of the insulating film 50. An adhesion layer 53 made of a metal material (for example, titanium nitride) and a second metal material (for example, tungsten) buried in the contact hole 50a via the adhesion layer 53. Portion (metal plug) 54, a third metal material (straddling the embedded portion 54 connected to the p-type polysilicon layer 35 and the embedded portion 54 connected to the n-type polysilicon layer 34 ( For example, it has a conductive portion 55 made of aluminum or the like.

  Further, as described above, the MOS transistor 4 is formed in the formation region of the MOS transistor 4 on the one surface side of the semiconductor substrate 1.

In the MOS transistor 4, a p-type (p ⁺ ) well region 41, which is the first conductivity type, is formed on the one surface side of the semiconductor substrate 1, and the second conductivity is formed in the well region 41. The n-type (n ⁺ ) drain region 43 that is the type and the n-type (n ⁺ ) source region 44 that is the second conductivity type are formed apart from each other. Further, an inter-element isolation insulating film 42 is formed on the one surface side of the semiconductor substrate 1.

  A gate electrode 46 is formed on a portion of the well region 41 located between the drain region 43 and the source region 44 with a gate insulating film 45 interposed therebetween.

  The gate insulating film 45 is composed of a silicon oxide film (thermal oxide film), but is not limited to a silicon oxide film.

  The gate electrode 46 has a conductive polysilicon layer 46a made of an n-type polysilicon layer on the gate insulating film 45, and a silicide layer 46b covering the conductive polysilicon layer 46a. In the present embodiment, the p-type polysilicon layer 35 and the n-type polysilicon layer 34 in the thermopile 30a and the conductive polysilicon layer 46a in the gate electrode 46 have the same thickness. In the present embodiment, the thickness of the silicide layer 38 in the thermopile 30a and the thickness of the silicide layer 46b in the gate electrode 46 are the same. The silicide layer 46b in the gate electrode 46 is composed of a tungsten silicide layer, like the silicide layer 38 in the thermopile 30a, but is not limited to this, and may be composed of, for example, a titanium silicide layer.

  A drain electrode 47 is formed on the drain region 43, and a source electrode 48 is formed on the source region 44.

  The gate electrode 46, the drain electrode 47, and the source electrode 48 are insulated and separated by the silicon oxide film 45 b that is continuous with the insulating film 50 and the gate insulating film 45 described above. The drain electrode 47 is electrically connected to the drain region 43 through a contact hole 50b formed in the laminated film of the insulating film 50 and the silicon oxide film 45b, and the source electrode 48 is laminated of the insulating film 50 and the silicon oxide film 45b. It is electrically connected to the source region 44 through a contact hole 50c formed in the film.

  The drain electrode 47 described above is in close contact with the adhesion layer 53 made of a conductive material (for example, titanium nitride) formed along the surface of the drain region 43 and the inner peripheral surface of the contact hole 50b, and the contact hole 50b. An embedded portion 54 made of a metal material (for example, tungsten) embedded through the layer 53, and a metal material (for example, aluminum or the like) formed across the surface of the embedded portion 54 and the surface of the insulating film 50 ). Similarly, the source electrode 48 includes an adhesion layer 53 formed along the surface of the source region 44 and the inner peripheral surface of the contact hole 50c, and a buried portion 54 embedded in the contact hole 50c via the adhesion layer 53. And a conductive portion 56 formed across the surface of the embedded portion 54 and the surface of the insulating film 50.

  In each pixel unit 2 of the infrared sensor 100, the source electrode 48 of the MOS transistor 4 and one end of the temperature sensing unit 30 are electrically connected, and the other end of the temperature sensing unit 30 is electrically connected to the fourth wiring 104. Has been. In each pixel unit 2, the drain electrode 47 of the MOS transistor 4 is electrically connected to the first wiring 101, and the gate electrode 46 is electrically connected to the second wiring 102 made of n-type polysilicon wiring. It is connected. In each pixel portion 2, an electrode 49 is formed on a portion of the well region 41 near the element isolation insulating film 42. Thus, the well region 41 is electrically connected to the third wiring 103 through the electrode 49. Here, the electrode 49 is electrically connected to the well region 41 through a contact hole 50d formed in the laminated film of the silicon oxide film 45b and the insulating film 50. The electrode 49 includes an adhesion layer 53 formed along the surface of the well region 41 and the inner peripheral surface of the contact hole 50d, a buried portion 54 buried in the contact hole 50d through the barrier layer 53, and a buried layer 54. The conductive portion 56 is formed across the surface of the embedded portion 54 and the surface of the insulating film 50.

  In the above Zener diode ZD, as shown in FIG. 12, the anode electrode 83 is formed on the first diffusion region 81, and the two cathode electrodes 84a and 84b are formed on the second diffusion region 82. In this Zener diode ZD, the anode electrode 83 is electrically connected to the fifth pad Vzd, and one cathode electrode 84a is connected to the second wiring 102 via one second wiring 102. The MOS transistor 4 is electrically connected to the gate electrode 46, and the other cathode electrode 84 b is electrically connected to one of the second pads Vsel 1 to Vsel 8 connected to the second wiring 102.

  According to the infrared sensor 100 described above, since the failure diagnosis wiring 139 is provided, by energizing the failure diagnosis wiring 139, Joule heat is generated to warm the hot junction T1, and the output of the thermopile 30a is measured. Thus, it is possible to determine the presence or absence of a failure such as disconnection of the thermopile 30a, and the reliability can be improved. Moreover, the infrared sensor 100 is arranged so that the failure diagnosis wiring 139 does not overlap the thermopile 30a in a region where the failure detection wiring 139 overlaps the cavity 11 of the semiconductor substrate 1 in the thermal infrared detection unit 3. The increase in the heat capacity of the hot junction T1 of the thermopile 30a can be prevented, and the sensitivity and response speed can be improved.

  Here, the infrared sensor 100 also absorbs infrared rays from the outside in the normal state when the self-diagnosis is not performed during use, so that the temperature of the plurality of hot junctions T1 can be made uniform and the sensitivity can be improved. Improvements can be made. In the infrared sensor 100, since the infrared absorbing layer 39 and the reinforcing layer 39b also absorb infrared rays from the outside, the temperature of the plurality of hot junctions T1 can be made uniform, and the sensitivity can be improved. Further, the self-diagnosis when using the infrared sensor 100 is periodically performed by a self-diagnosis circuit (not shown) provided in the IC element 122, but it is not always necessary to perform it periodically.

  In addition, the infrared sensor 100 includes a plurality of linear slits 13 provided in the first thin film structure portion 3 a along the inner circumferential direction of the cavity portion 11. It is separated into a plurality of second thin film structure parts 3aa extending inward from the support part 3d that is a part surrounding the part 11, and a hot junction T1 of the thermopile 30a is provided for each second thin film structure part 3aa. Since all the thermopile 30a are electrically connected in a connection relationship in which the output change with respect to the temperature change is larger than when the output is taken out for each thermopile 30a, the response speed and the sensitivity can be improved. In addition, since the failure diagnosis wiring 139 is formed across all the second thin film structures 3aa, the infrared sensor 100 performs self-diagnosis of all the thermopiles 30a of the thermal infrared detection unit 3 at once. Is possible. Moreover, the infrared sensor 100 can reduce the curvature of each 2nd thin film structure part 3aa by forming the connection piece 3c which connects 2nd adjacent thin film structure parts 3aa and 3aa, and structural stability The sensitivity is stabilized.

  In the infrared sensor 100, the n-type polysilicon layer 34, the p-type polysilicon layer 35, the infrared absorption layer 39, the reinforcing layer 39b, and the failure diagnosis wiring 139 are set to the same thickness. The uniformity of the stress balance of the thin film structure portion 3aa can be improved, the warpage of the second thin film structure portion 3aa can be suppressed, and the variation in sensitivity among products and the variation in sensitivity among pixel portions 2 can be reduced. It becomes possible.

  Further, in the infrared sensor 100, the failure diagnosis wiring 139 is formed of the same material as the n-type polysilicon layer 34 as the first thermoelectric element or the p-type polysilicon layer 35 as the second thermoelectric element. The fault diagnosis wiring 139 can be formed simultaneously with the first thermoelectric element or the second thermoelectric element, and the cost can be reduced by simplifying the manufacturing process.

  In addition, since the infrared sensor 100 is provided with a plurality of pixel portions 2 including the infrared absorbing portion 33 and the failure diagnosis wiring 139 in a two-dimensional array on the one surface side of the semiconductor substrate 1, By energizing the failure diagnosis wiring 139 of each pixel unit 2 at the time of self-diagnosis at the time of use, it becomes possible to grasp variation in sensitivity of the temperature sensing unit 30 of each pixel unit 2.

  Hereinafter, an example of a method for manufacturing the infrared sensor 100 will be described with reference to FIGS. 13 to 21, (a) is a process sectional view corresponding to the section AB in FIG. 2, (b) is a process sectional view corresponding to the section CD in FIG. 2, and (c) is a diagram. It is process sectional drawing corresponding to the EF cross section of 2. FIG.

  First, an insulating layer forming step of forming an insulating layer made of a laminated film of the first silicon oxide film 31 and the first silicon nitride film 32a on the one surface side of the semiconductor substrate 1 made of the second conductivity type silicon substrate. I do. Thereafter, using the photolithography technique and the etching technique, the part corresponding to the formation region of the MOS transistor 4 is etched while leaving a part of the insulating layer corresponding to the formation region of the thermal infrared detector 3. By performing the insulating layer patterning step to be removed, the structure shown in FIG. 13 is obtained. Here, the first silicon oxide film 31 is formed by thermally oxidizing the semiconductor substrate 1, and the first silicon nitride film 32a is formed by LPCVD.

After the insulating layer patterning step, a well region forming step for forming a p-type (p ⁺ ) well region 41 of the first conductivity type on the one surface side of the semiconductor substrate 1 is performed. Subsequently, a structure shown in FIG. 14 is obtained by performing a groove forming process for forming a groove 42a in a portion corresponding to a region where the element isolation portion 42 is to be formed on the one surface side of the semiconductor substrate 1.

  In the well region forming step, first, a sixth silicon oxide film (thermal oxide film) 51 is selectively formed by pyrogenic oxidation of the exposed portion on the one surface side of the semiconductor substrate 1 at a predetermined temperature. Thereafter, the sixth silicon oxide film 51 is patterned using a photolithography technique and an etching technique using a mask for forming the well region 41. Subsequently, the well region 41 is formed by performing ion implantation of a first conductivity type impurity (here, p-type impurity, for example, boron) and then performing drive-in.

  In the groove forming step, first, the second silicon nitride film 32b is formed on the entire surface of the one surface side of the semiconductor substrate 1 by the LPCVD method or the like, and thereafter, the second silicon nitride film 32b is utilized using the photolithography technique and the etching technique. The silicon nitride film 32b is patterned. Subsequently, by using the second silicon nitride film 32b as a mask, the sixth silicon oxide film 51 and a portion of the semiconductor substrate 1 on the one surface side are etched, thereby forming a groove 42a.

  After the above-described groove forming process, an element isolation process is performed to form an element isolation insulating film 42 by a LOCOS (Local Oxidation of Silicon) method using the second silicon nitride film 32b as a mask, thereby obtaining the structure shown in FIG. .

  Thereafter, unnecessary portions of the sixth silicon oxide film 51 and the second silicon film 32 b are removed by etching on the one surface side of the semiconductor substrate 1. Subsequently, a gate insulating film forming step for forming a gate insulating film 45 made of a silicon oxide film (thermal oxide film) on the one surface side of the semiconductor substrate 1 by, for example, thermal oxidation is performed. Thereafter, the conductive polysilicon layer 46a of the gate electrode 46, the second wiring 102 (see FIG. 7), the p-type polysilicon layer 35, the infrared absorption layer 39, and the fault diagnosis are formed on the entire surface of the semiconductor substrate 1 on the one surface side. A first polysilicon layer forming step is performed in which the first non-doped polysilicon layer 120 which is the basis of the wiring 139 is formed by the LPCVD method. Subsequently, a structure shown in FIG. 16 is obtained by performing a first polysilicon layer patterning step of patterning the first non-doped polysilicon layer 120 using photolithography technology and etching technology. In the first polysilicon layer patterning step, the conductive polysilicon layer 46a of the gate electrode 46, the second wiring 102, the p-type polysilicon layer 35, the infrared absorption layer 39 and the first non-doped polysilicon layer 120 The first non-doped polysilicon layer 120 is patterned so that portions corresponding to the respective fault diagnosis wirings 139 remain.

  After the above-described first polysilicon layer patterning step, p-type impurities (in the portions corresponding to the p-type polysilicon layer 35, the infrared absorption layer 39, and the failure diagnosis wiring 139 in the first non-doped polysilicon layer 120). For example, a p-type polysilicon layer forming step of forming the p-type polysilicon layer 35, the infrared absorption layer 39, and the failure diagnosis wiring 139 by performing drive-in after ion implantation of boron or the like is performed. Subsequently, a second silicon oxide film forming step for forming a second silicon oxide film 52a made of a BPSG film on the one surface side of the semiconductor substrate 1 is performed. Thereafter, in the second silicon oxide film 52a, a portion where the silicide layer 38 is stacked in the p-type polysilicon layer 35, a portion serving as the basis of the conductive polysilicon layer 46a in the first non-doped polysilicon layer 120, the first The non-doped polysilicon layer 120 is formed above the portion serving as the basis of the second wiring 102, the region where the drain region 43 is to be formed in the well region 41, and the region where the source region 44 is to be formed in the well region 41. Etch the part. Subsequently, a portion of the first non-doped polysilicon layer 120 corresponding to the conductive polysilicon layer 46a and a portion corresponding to the second wiring 102, a region where the drain region 43 is to be formed in the well region 41, and the source region 44 Conductive polysilicon layer 46a and second wiring 102, drain region 43 and source region 44 are formed by performing drive-in after ion implantation of an n-type impurity (for example, phosphorus) into the region to be formed. By forming, the structure shown in FIG. 17 is obtained.

  Thereafter, silicide layers 38 and 46b are formed on the p-type polysilicon layer 35 and the conductive polysilicon layer 46a, respectively, and a silicide layer (not shown) is formed on the second wiring 102. To obtain the structure shown in FIG. In forming the silicide layers 38 and 46b in the first silicide layer forming step, a tungsten layer is formed on the entire surface of the one surface side of the semiconductor substrate 1 by a sputtering method or the like, and then a silicide reaction generated by heat treatment is used. Then, silicide layers 38 and 46b made of tungsten silicide layers are selectively formed, and then unnecessary tungsten layers are removed by etching. In the case where the silicide layers 38 and 46b are titanium silicide layers, instead of the tungsten layer, a titanium layer is formed by sputtering or the like, and then the silicide layers 38 and 46b made of a titanium silicide layer are selectively formed. Thereafter, an unnecessary titanium layer may be removed by etching.

  Subsequently, a third silicon oxide film forming step for forming a third silicon oxide film 52b made of a BPSG film on the one surface side of the semiconductor substrate 1 is performed. Thereafter, a second polysilicon layer forming step of forming a second non-doped polysilicon layer (not shown) serving as a base of the n-type polysilicon layer 34 on the entire surface of the one surface side of the semiconductor substrate 1 by the LPCVD method. Do. Subsequently, a second polysilicon layer patterning step of patterning the second non-doped polysilicon layer using a photolithography technique and an etching technique is performed. Thereafter, an n-type polysilicon layer forming step of forming an n-type polysilicon layer by performing ion implantation of an n-type impurity (for example, phosphorus) into the second non-doped polysilicon layer and then driving in. By doing so, the structure shown in FIG. 19 is obtained. In the second polysilicon layer patterning step described above, the second non-doped polysilicon layer is patterned so that a portion corresponding to the n-type polysilicon layer 34 remains in the second non-doped polysilicon layer.

  After the above-described n-type polysilicon layer forming step, a fourth silicon oxide film forming step for forming a fourth silicon oxide film 52c made of a BPSG film on the one surface side of the semiconductor substrate 1 is performed. Thereafter, a portion of the fourth silicon oxide film 52c formed above the second non-doped polysilicon layer is etched. Subsequently, by performing a second silicide layer forming step of forming a silicide layer 38 on the n-type polysilicon layer 34, the structure shown in FIG. 20 is obtained. In forming the silicide layer 38 in the second silicide layer forming step, a tungsten layer is formed on the entire surface of the one surface side of the semiconductor substrate 1 by sputtering or the like, and then selected using a silicide reaction generated by heat treatment. A silicide layer 38 made of a tungsten silicide layer is formed, and then the tungsten layer is removed by etching. When the silicide layer 38 is a titanium silicide layer, a titanium layer may be employed instead of the tungsten layer.

  After the second silicide layer forming step, a fifth silicon oxide film forming step for forming a fifth silicon oxide film 52d made of a BPSG film is performed. Subsequently, the contact holes 50a are formed in the insulating film 50 using photolithography technology and etching technology, and the contact holes 50b, 50c, and 50d are formed in the laminated film of the silicon oxide film 45b and the insulating film 50. A hole formation process is performed. In the second to fifth silicon oxide film forming steps described above, a BPSG film is deposited on the one surface side of the semiconductor substrate 1 by the CVD method, and then planarized by reflowing at a predetermined temperature (for example, 800 ° C.). The formed second to fifth silicon oxide films 52a to 52d are formed.

  After the contact hole forming step, the first connection portion 36, the second connection portion 37, the drain electrode 47, the source electrode 48, the electrode 49, the fourth wiring 104, The structure shown in FIG. 21 is obtained by forming the first wiring 101, the third wiring 103, the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, and the like (see FIGS. 3 and 4). Here, in forming the first connection portion 36, the second connection portion 37, the drain electrode 47, the source electrode 48, and the electrode 49, for example, a Ti film is formed on the one surface side of the semiconductor substrate 1 by a sputtering method or the like. By performing heat treatment after the film formation, the adhesion layer 53 made of a titanium nitride film is formed. Subsequently, after a tungsten film is formed on the one surface side of the semiconductor substrate 1 by a CVD method, the buried portion 54 is formed by performing planarization on the one surface side of the semiconductor substrate 1 by performing etch back. After that, an aluminum film is formed on the one surface side of the semiconductor substrate 1 by a sputtering method or the like, and then the aluminum film is patterned using a photolithography technique and an etching technique to thereby conduct the conductive portions 55 and 56. The fourth wiring 104, the first wiring 101, the third wiring 103, the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, Vsu, and the like are formed.

  After obtaining the structure of FIG. 21 described above, a passivation film forming step of forming a passivation film 60 made of a BPSG film on the one surface side of the semiconductor substrate 1 (that is, the surface side of the insulating film 50) is performed. A laminated structure portion including the first silicon oxide film 31, the first silicon nitride film 32 a, the second silicon nitride film 32 b, the insulating film 50, the passivation film 60, etc., in which the temperature sensitive portion 30 is embedded. By patterning, a laminated structure portion patterning step for forming the second thin film structure portion 3aa, the connecting piece 3c, and the slits 13 and 14 is performed. Thereafter, an opening forming process for forming openings (not shown) for exposing the pads Vout1 to Vout8, Vsel1 to Vsel8, Vrefin, and Vsu using a photolithography technique and an etching technique is performed. Next, the cavity is formed by forming the cavity 11 in the semiconductor substrate 1 by introducing the etchant with the slits 13 and 14 as the etchant introduction holes and anisotropically etching the semiconductor substrate 1 (crystal anisotropic etching). By performing the process, the infrared sensor 100 having the structure shown in FIG. 1 is obtained. Here, the etching in the opening forming step is performed by RIE. In the cavity forming step, a TMAH solution heated to a predetermined temperature (for example, 85 ° C.) is used as the etching solution. However, the etching solution is not limited to the TMAH solution, and other alkaline solutions (for example, a KOH solution, etc.) ) May be used. In addition, since all the processes until the cavity part forming process is completed are performed at the wafer level, a separation process for separating the individual infrared sensors 100 may be performed after the cavity part forming process is completed. In the manufacturing method described above, the description of the manufacturing process of the Zener diode ZD is omitted, but a general method of manufacturing a Zener diode may be adopted as appropriate.

  In the infrared sensor 100 described above, the cavity 11 is formed by anisotropic etching using the crystal plane orientation dependence of the etching rate, using the single crystal silicon substrate whose one surface is the (100) plane as the semiconductor substrate 1. However, the shape is not limited to the quadrangular pyramid shape, and may be a quadrangular frustum shape. The plane orientation of the one surface of the semiconductor substrate 1 is not particularly limited. For example, a single crystal silicon substrate having the Si (110) surface as the one surface may be used as the semiconductor substrate 1.

Further, the conductivity type of the semiconductor substrate 1 is not limited to the n-type, and may be, for example, a p-type as shown in FIGS. FIG. 22 shows an example in which the p-type semiconductor substrate 1 forms a channel formation region, and the conductivity type of the drain region 43 and the source region 44 is n-type (n ⁺ ). In FIG. 23, a p-type (p ⁺ ) well region 41 formed in the p-type semiconductor substrate 1 constitutes a channel formation region, and the conductivity type of the drain region 43 and the source region 44 is n-type (n ⁺ ). FIG. 24 shows an example in which the n-type well region 41 formed in the p-type semiconductor substrate 1 constitutes a channel formation region, and the conductivity type of the drain region 43 and the source region 44 is p-type (p ⁺ ). It is.

  The infrared sensor 100 according to the present embodiment described above includes the thermal infrared detector 3 that is formed on the one surface side of the semiconductor substrate 1 and is supported on the semiconductor substrate 1, having the temperature-sensitive portion 30 constituted by the thermopile 30 a. And a MOS transistor 4 formed on the one surface side of the semiconductor substrate 1 for taking out the output voltage of the temperature sensing unit 30, and the gate electrode 46 of the MOS transistor 4 is a conductive polysilicon layer on the gate insulating film 45. 46a and the silicide layer 38 covering the conductive polysilicon layer 46a, the resistance of the gate electrode 46 of the MOS transistor 4 can be reduced, and the thermal noise can be reduced.

  Further, in the infrared sensor 100 of the present embodiment, two types of thermoelectric elements of the thermocouple of the thermopile 30a are the p-type polysilicon layer 35 and the n-type polysilicon layer 34, and the p-type polysilicon layer 35 and the n-type polysilicon layer 34 are included. Since the end portion on the warm junction T1 side and the end portion on the cold junction T2 side in each of the polysilicon layers 34 are covered with the silicide layer 38, the resistance of the thermopile 30a can be reduced while suppressing a decrease in sensitivity. In addition, thermal noise can be further reduced.

  In addition, the infrared sensor 100 of this embodiment includes the thickness of the silicide layer 38 formed on at least one of the p-type polysilicon layer 35 and the n-type polysilicon layer 34 in the thermopile 30a, and the conductive polysilicon in the gate electrode 46. Since the thickness of the silicide layer 46b formed in the layer 46a is the same, the silicide layer 38 in the thermopile 30 and the silicide layer 46b in the gate electrode 46 can be formed at the same time, and the manufacturing cost can be reduced.

  In manufacturing the infrared sensor 100, after forming a non-doped polysilicon layer on the one surface side of the semiconductor substrate 1, at least one of the p-type polysilicon layer 35 and the n-type polysilicon layer 34 among the non-doped polysilicon layers. The non-doped polysilicon layer is patterned so as to leave a portion corresponding to the conductive polysilicon layer 46a and a portion corresponding to the conductive polysilicon layer 46a, and then impurities are implanted into the non-doped polysilicon layer to form the p-type polysilicon layer 35 and the n-type polysilicon. At least one of the silicon layer 34 and the conductive polysilicon layer 46a are formed, and then a silicide layer 38 in the thermopile 30a is formed on at least one surface side of the p-type polysilicon layer 35 and the n-type polysilicon layer 34. At the same time, the gate electrode 46 is formed on the surface side of the conductive polysilicon layer 46a. May be formed takes silicide layer 46b.

  In the example of FIG. 1 described above, the silicide layer 38 of the p-type polysilicon layer 35 and the silicide layer 46b of the gate electrode 46 can be formed simultaneously. Further, in the example of the manufacturing method described with reference to FIGS. 13 to 21 and FIG. 1 described above, after forming the first non-doped polysilicon layer 120, the p-type poly-silicon in the first non-doped polysilicon layer 120 is formed. The first non-doped polysilicon layer 120 is patterned so that a portion corresponding to the silicon layer 35 and a portion corresponding to the conductive polysilicon layer 46a remain, and then impurities are implanted into the first non-doped polysilicon layer 120. Then, the p-type polysilicon layer 35 and the conductive polysilicon layer 46a are formed. Thereafter, the silicide layer 38 in the thermopile 30a is formed on the surface side of the p-type polysilicon layer 35, and at the same time, the conductive polysilicon layer 46a. A silicide layer 46b in the gate electrode 46 is formed on the surface side of the substrate.

  The p-type polysilicon layer 35 and the n-type polysilicon layer 34 in the thermopile 30a and the conductive polysilicon layer 46a in the gate electrode 46 have the same thickness, and the silicide layer 38 in the thermopile 30 and the silicide layer 46b in the gate electrode 46 The silicide layer 38 in the thermopile 30 and the silicide layer 46b in the gate electrode 46 can be formed at the same time, and the manufacturing cost can be reduced.

  Further, in the infrared sensor 100 of the present embodiment, a cavity 11 is formed immediately below a part of the thermal infrared detector 3 on the one surface side of the semiconductor substrate 1, and the thermal infrared detector 3 is a semiconductor. A support portion 3d formed on the peripheral portion of the cavity portion 11 on the one surface side of the substrate 1 and a first thin film structure portion 3a that covers the cavity portion 11 in plan view on the one surface side of the semiconductor substrate 1 are provided. The first thin film structure portion 3a is arranged in parallel along the circumferential direction of the cavity portion 11 and the plurality of second thin film structure portions 3aa supported by the support portion 3d, and the second thin film structure portions 3aa facing each other. Each of the second thin film structure portions 3aa is provided with a thermopile 30a straddling the second thin film structure portion 3aa and the support portion 3d, and an output is provided for each thermopile 30a. Take out the temperature compared to All of the thermopile 30a are electrically connected with output change becomes large connection relationship of. Therefore, in the infrared sensor 100 of the present embodiment, all the thermopile 30a is electrically connected in a connection relationship in which the output change with respect to the temperature change is larger than when the output is taken out for each thermopile 30a. The sensitivity can be improved. Further, in the infrared sensor 100 of the present embodiment, the first thin film structure portion 3a includes a plurality of second thin film structure portions 3aa arranged in parallel along the circumferential direction of the cavity portion 11 and supported by the support portion 3d; The second thin film structure portions 3aa, 3aa facing each other, and a connecting piece 3c for connecting the two thin film structure portions 3aa to each other, and the thermopile straddling the second thin film structure portion 3aa and the support portion 3d for each second thin film structure portion 3aa. By providing 30a, the warpage of each second thin film structure portion 3aa can be reduced, the structural stability can be improved, and the sensitivity is stabilized.

  Further, in the infrared sensor 100 of the present embodiment, the thermopile 30a is formed on the surfaces where the p-type polysilicon layer 35 and the n-type polysilicon layer 34 are different from each other, and therefore the p-type polysilicon layer 35 and the n-type polysilicon layer 35 are formed. Compared with the case where the polysilicon layer 34 is formed on the same surface, the number of thermocouples in the thermopile 30a can be increased, and high sensitivity can be achieved.

  By the way, in the infrared sensor 100 described above, the n-type polysilicon layer 34 and the p-type polysilicon layer 35 are divided into two different layers, but the present invention is not limited to this. For example, as shown in FIG. In addition, the n-type polysilicon layer 34 and the p-type polysilicon layer 35 may be separately arranged in four different layers.

  In the infrared sensor 100 described above, the cavity 11 of the semiconductor substrate 1 may be formed so as to penetrate in the thickness direction of the semiconductor substrate 1. In this case, in the cavity forming process for forming the cavity 11. An anisotropic etching technique using, for example, an inductively coupled plasma (ICP) type dry etching apparatus, to form a region where the cavity 11 is to be formed in the semiconductor substrate 1 from the other surface side opposite to the one surface of the semiconductor substrate 1 What is necessary is just to form using. In addition, the infrared sensor 100 is not limited to a plurality of thermopiles 30a constituting the temperature sensing unit 30, and may be one.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 3 Thermal infrared detection part 3a 1st thin film structure part 3aa 2nd thin film structure part 3c Connection piece 3d Support part 4 MOS transistor 11 Cavity part 30 Temperature sensing part 30a Thermopile 34 n-type polysilicon layer 35 p-type Polysilicon layer 38 Silicide layer 45 Gate insulating film 46 Gate electrode 46a Conductive polysilicon layer 46b Silicide layer 100 Infrared sensor 120 First non-doped polysilicon layer T1 Hot junction T2 Cold junction

Claims (6)

  A thermal infrared detector formed on one surface side of a semiconductor substrate having a temperature sensitive portion constituted by a thermopile and supported by the semiconductor substrate; and the temperature sensitive portion formed on the one surface side of the semiconductor substrate And an MOS sensor for taking out the output voltage of the MOS transistor, wherein the gate electrode of the MOS transistor includes a conductive polysilicon layer on a gate insulating film, a silicide layer covering the conductive polysilicon layer, and An infrared sensor characterized by comprising:   Two types of thermoelectric elements of the thermopile thermocouple are a p-type polysilicon layer and an n-type polysilicon layer, and the end portions on the hot junction side in the p-type polysilicon layer and the n-type polysilicon layer, respectively 2. The infrared sensor according to claim 1, wherein an end portion on the cold junction side is covered with a silicide layer.   The thickness of the silicide layer formed on at least one of the p-type polysilicon layer and the n-type polysilicon layer in the thermopile, and the thickness of the silicide layer formed on the conductive polysilicon layer in the gate electrode The infrared sensor according to claim 2, wherein the infrared sensors are the same.   4. The infrared sensor according to claim 2, wherein the thermopile includes the p-type polysilicon layer and the n-type polysilicon layer formed on different surfaces. 5.   A cavity is formed immediately below a part of the thermal infrared detector on the one surface side of the semiconductor substrate, and the thermal infrared detector is formed on the one surface side of the semiconductor substrate. A support portion formed on a peripheral portion; and a first thin film structure portion that covers the cavity portion in plan view on the one surface side of the semiconductor substrate, and the first thin film structure portion is formed of the cavity portion. A plurality of second thin film structure portions arranged side by side along the circumferential direction and supported by the support portion; and a connecting piece for connecting the second thin film structure portions facing each other; A connection relationship in which the thermopile is provided across the second thin film structure portion and the support portion for each thin film structure portion, and the output change with respect to the temperature change is larger than when the output is taken out for each thermopile. In all the thermopies There infrared sensor according to any one of claims 1 to 3, characterized by comprising electrically connected.   4. The method of manufacturing an infrared sensor according to claim 3, wherein after forming a non-doped polysilicon layer on the one surface side of the semiconductor substrate, the p-type polysilicon layer and the n-type polysilicon in the non-doped polysilicon layer. The non-doped polysilicon layer is patterned so that a portion corresponding to at least one of the silicon layers and a portion corresponding to the conductive polysilicon layer remain, and then impurities are implanted into the non-doped polysilicon layer to form the p Forming at least one of a p-type polysilicon layer and the n-type polysilicon layer and the conductive polysilicon layer, and then forming at least one surface side of the p-type polysilicon layer and the n-type polysilicon layer; Simultaneously with forming the silicide layer in the thermopile, the gate is formed on the surface side of the conductive polysilicon layer. Method for manufacturing an infrared sensor, and forming the silicide layer in the gate electrode.

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