KR20120088046A - Light emitting device, method for fabricating the light emitting device, light emitting device package and lighting system - Google Patents

Abstract

PURPOSE: A light emitting device, a light emitting device package and a lighting system are provided to minimize the amount of light reflected from the surface of a light emitting structure layer by forming a light extraction pattern on the upper surface of the light emitting structure layer. CONSTITUTION: The first electrode(115) is electrically connected to the first conductive semiconductor layer(110). The first conductive semiconductor layer includes an undoped semiconductor layer. An active layer(120) is formed under the first conductive semiconductor layer. The second conductive semiconductor layer(130) is formed under the active layer. A reflection layer(160) is formed on a junction layer(170). An ohmic layer(150) is formed on the reflection layer.

Description

LIGHT EMITTING DEVICE, METHOD FOR FABRICATING THE LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM}

The present invention relates to a light emitting device, a light emitting device package and an illumination system.

Group III-V nitride semiconductors have been spotlighted as core materials of light emitting devices such as light emitting diodes (LEDs) or laser diodes (LDs) due to their physical and chemical properties. Ⅲ? Ⅴ group conductivity type semiconductor is made of a semiconductor material having a compositional formula of normal _{In x Al y Ga 1 -x- y} N (0≤≤x≤1, 0≤y≤1, 0≤x + y≤1) have.

Light emitting diodes (LEDs) are a type of semiconductor device that transmits and receives signals by converting electricity into infrared rays or light using characteristics of a compound semiconductor.

It is widely used as a light emitting device for obtaining light of a light emitting diode or a laser diode using such a conductive semiconductor material, and is applied as a light source of various products such as keypad light emitting part of a mobile phone, an electronic board, a lighting device, and the like.

The embodiment provides a light emitting device, a light emitting device package and a lighting system having a new structure.

The embodiment provides a semiconductor light emitting device, a light emitting device package, and an illumination system having improved light extraction efficiency.

The light emitting device according to the embodiment may include a first conductivity type semiconductor layer; A first electrode electrically connected to the first conductive semiconductor layer; An active layer formed under the first conductivity type semiconductor layer; A second conductivity type semiconductor layer formed under the active layer; And a second electrode electrically connected to the second conductive semiconductor layer, wherein the first conductive semiconductor layer includes an undoped semiconductor layer, and the undoped semiconductor layer is formed to have a metal cluster therein. .

The embodiment provides a light emitting device, a light emitting device package and a lighting system having a new structure.

The embodiment provides a semiconductor light emitting device, a light emitting device package, and an illumination system having improved light extraction efficiency.

1 is a side cross-sectional view of a light emitting device according to an embodiment
2 to 15 are views showing a method of manufacturing a light emitting device according to the embodiment
16 is a side cross-sectional view of a light emitting device according to another embodiment;
17 to 21 illustrate a method of manufacturing a light emitting device according to another embodiment.
22 is a cross-sectional view of a light emitting device package including a light emitting device according to embodiments.
FIG. 23 illustrates a backlight unit including a light emitting device package according to embodiments. FIG.
24 is a perspective view of a lighting unit including a light emitting device package according to the embodiments.

In the description of the embodiments, each layer (film), region, pattern or structure layer is formed on or "under" the substrate, each layer (film), region, pad or pattern. In the case where it is described as "to", "on" and "under" include both "directly" or "indirectly" formed. In addition, the criteria for the top or bottom of each layer will be described with reference to the drawings.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

Hereinafter, a light emitting device, a light emitting device package, and a lighting system according to an embodiment will be described with reference to the accompanying drawings.

1 is a side cross-sectional view of a light emitting device 100 according to an embodiment of the present invention.

Referring to FIG. 1, the light emitting device 100 according to the embodiment includes a conductive support member 175, a first conductive semiconductor layer 110 formed on the conductive support member 175, and the first conductive semiconductor. A first un-GaN layer 112 formed below the layer 110, a metal cluster 114 formed below the first un-GaN layer 112, the first un-GaN layer 112 and a metal. A second un-GaN layer 116 formed under the cluster 114, a first conductive semiconductor layer 110 formed under the second un-GaN layer 116, and a first conductive semiconductor layer ( An active layer 120 formed under the active layer 120 and a second conductive semiconductor layer 130 formed under the active layer 120 may be included. In addition, a first electrode 115 formed on the first conductive semiconductor layer 110 and an upper surface of the first conductive semiconductor layer 110, the active layer 120, and the second conductive semiconductor layer 130 are formed. And a passivation layer 180 formed on the side surface.

In addition, a protective member 140, an ohmic layer 150, a reflective layer 160, a bonding layer 170, and a current blocking layer 145 are disposed between the conductive support member 175 and the second conductive semiconductor layer 130. This can be formed.

The light emitting structure layer 135 includes a first conductive semiconductor layer 110, an active layer 120, and a second conductive semiconductor layer 130, and is provided from the first and second conductive semiconductor layers 110 and 130. Electrons and holes may be recombined in the active layer 120 to generate light.

The conductive support member 175 may support the light emitting structure layer 135 and provide power to the light emitting structure layer 135 together with the first electrode 115. The conductive support member 175 may include, for example, at least one of Cu, Au, W, Al, Ni, Mo, Si, Ge, GaAs, ZnO, GaN, Ga ₂ O ₃ or SiC, SiGe, CuW. Can be. The thickness of the conductive support member 175 may vary depending on the design of the light emitting device 100, but may have, for example, a thickness of 30 μm to 500 μm.

The bonding layer 170 may be formed on the conductive support member 175. The bonding layer 170 is a bonding layer, and is formed under the reflective layer 160 and the protective member 140. An outer surface of the bonding layer 170 may be exposed, and the bonding layer 170 may be in contact with the reflective layer 160, an end of the ohmic layer 150, and the protective member 140 to enhance adhesion between the layers.

The bonding layer 170 includes a barrier metal or a bonding metal, and for example, at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Al, Si, Ag, or Ta. It may include.

The reflective layer 160 may be formed on the bonding layer 170. The reflective layer 160 may reflect light incident from the light emitting structure layer 135, thereby improving the light emitting efficiency of the light emitting device 100.

The reflective layer 160 may be formed of, for example, a metal or an alloy including at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, or Hf. Alternatively, the metal or alloy may be formed in a multilayer using light transmitting conductive materials such as ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, and ATO, and specifically, IZO / Ni, AZO / Ag, and IZO. / Ag / Ni, AZO / Ag / Ni, Ag / Cu, Ag / Pd / Cu and the like can be laminated.

An ohmic layer 150 may be formed on the reflective layer 160. The ohmic layer 150 is in ohmic contact with the second conductive semiconductor layer 130 to smoothly supply power to the light emitting structure layer 135.

The ohmic layer 150 may selectively use a transparent conductive layer and a metal, and may include indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZAO), and IGZO. (indium gallium zinc oxide), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IrO _x , RuO _x , RuO _x / ITO, Ni, Ag , Pt, Ni / IrO _x / Au, or Ni / IrO _x / Au / ITO can be implemented in a single layer or multiple layers.

A current blocking layer (CBL) 145 may be formed between the ohmic layer 150 and the second conductive semiconductor layer 130. The current blocking layer 145 may be formed such that at least a portion of the current blocking layer 145 overlaps with the first electrode 115 in the vertical direction, and thus the shortest distance between the first electrode 115 and the conductive support member 175. The light emitting efficiency of the light emitting device 100 may be improved by alleviating a phenomenon in which furnace current is concentrated.

The current blocking layer 145 may be formed of a Schottky contact with a material having electrical insulation, a material having a lower electrical conductivity than the reflective layer 160 or the bonding layer 170, and the second conductive semiconductor layer 130. It may be formed using at least one of the materials, for example, ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, ZnO, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , At least one of Al ₂ O ₃ , TiO _x , TiO ₂ , Ti, Al, and Cr.

The current blocking layer 145 may be formed between the reflective layer 160 and the ohmic layer 150, but is not limited thereto.

The protective member 140 may be formed in the circumferential region of the upper surface of the bonding layer 170.

The protection member 140 may be in contact with the second conductivity-type semiconductor layer 130 and may be formed in a ring shape, a loop shape, a frame shape, and the like in the light emitting device 100.

The protection member 140 may minimize the electrical short between the light emitting structure 135 and the conductive support member 175, and may form a gap between the light emitting structure 135 and the conductive support member 175. The penetration of moisture and the like can be prevented.

The protection member 140 is a material having electrical insulation, a material having a lower electrical conductivity than the reflective layer 160 or the bonding layer 170, and a material forming a schottky contact with the second conductive semiconductor layer 130. It may be formed using at least one of, for example, ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, ZnO, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al It may include at least one of ₂ O ₃ , TiO _x , TiO _{2 ,} Ti, Al or Cr.

The light emitting structure layer 135 may be formed on the ohmic layer 150 and the protection member 140.

The light emitting structure layer 135 may include a plurality of group III-V compound semiconductor layers. For example, the first conductive semiconductor layer 110 and the first conductive semiconductor layer 110 may be disposed under the light emitting structure layer 135. The second conductive semiconductor layer 130 may be included in the active layer 120 and under the active layer 120.

The first conductive semiconductor layer 110 is a first conductive type dopant is doped Ⅲ? A compound semiconductor of group elements Ⅴ formula is _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤ y ≦ 1, 0 ≦ x + y ≦ 1), and may be selected from, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like. When the first conductivity type semiconductor layer 110 is an N type semiconductor layer, the first conductivity type dopant includes an N type dopant such as Si, Ge, Sn, Se, Te, or the like. The first conductivity type semiconductor layer 110 may be formed as a single layer or a multilayer, but is not limited thereto.

A first un-GaN layer 112 may be formed between the first conductive semiconductor layer 110. The first un-GaN layer 112 is intentionally formed of a material having low electrical conductivity to which a first conductive dopant or a second conductive dopant is not added but a part of which the first conductive dopant or the second conductive dopant is added. And may be formed to a thickness of 1 to 200 nm.

A metal cluster 114 may be formed under the first un-GaN layer 112. The metal cluster 114 may be formed by stacking a metal layer (113 of FIG. 3) in contact with the first un-GaN 112 to a thickness of 1˜100 μs and then heat treating the metal layer 114. As described above, the metal layer 113 may be heat-treated to form a metal cluster 114, and the metal cluster 114 may form crystals, thus, under the first un-GaN layer 112 and the metal cluster 114. The second un-GaN layer 116 may be formed.

The first un-GaN layer 112 and the second un-GaN layer 116 may be formed of an undoped semiconductor layer, and do not add a first conductivity type dopant or a second conductivity type dopant, or a first conductivity type. It may be formed of a material having a low electrical conductivity, in which part type dopants or second conductivity type dopants are added.

When the thickness of the second un-GaN layer 116 becomes thick, the distance between the active layer 120 and the metal cluster 114 increases and the surface plasmon effect is drastically reduced, so that the second un-GaN layer 116 The thickness can be formed in the range of 1 to 50 nm.

It is preferable to alleviate the phenomenon in which the current is concentrated at the shortest distance between the first electrode 115 and the conductive support member 175. As described above, the metal cluster 114 having excellent electrical conductivity has high electrical conductivity. Since the current may be horizontally spread between the low first un-GaN layer 112 and the second un-GaN layer 116, the electron injection efficiency into the active layer 120 may be improved. have.

In addition, even if the light generated from the active layer 120 is incident above the critical angle by the surface plasmon phenomenon, the amount of total reflection is reduced, so that the amount of light reflected or scattered on the upper portion of the light emitting device 100 is increased. Therefore, the light extraction efficiency can be improved.

The first conductivity type semiconductor layer 110 may be formed under the second un-GaN layer 116, and the active layer 120 may be formed under the first conductivity type semiconductor layer 110. The active layer 120 may include any one of a single quantum well structure, a multi quantum well structure (MQW), a quantum dot structure, or a quantum line structure. The active layer 120 may be formed using a compound semiconductor material of a group III-V element in a cycle of a well layer and a barrier layer, for example, an InGaN well layer / GaN barrier layer or an InGaN well layer / AlGaN barrier layer. .

A conductive clad layer (not shown) may be formed on or under the active layer 120, and the conductive clad layer may be formed of an AlGaN-based semiconductor.

The second conductive type semiconductor layer 130 is formed under the active layer 120, the second conductive dopant is doped Ⅲ? A compound semiconductor of group elements Ⅴ formula is In _x Al _y Ga _{1 -x- y} N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), for example, in GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like. Can be selected. When the second conductivity type semiconductor layer 130 is a P type semiconductor layer, the second conductivity type dopant may include a P type dopant such as Mg and Zn.

The light emitting structure layer 135 may include a third conductive semiconductor layer having a polarity opposite to that of the second conductive semiconductor layer under the second conductive semiconductor layer 130. In addition, the first conductivity type semiconductor layer 110 may be a P type semiconductor layer, and the second conductivity type semiconductor layer 130 may be implemented as an N type semiconductor layer. Accordingly, the light emitting structure layer 135 may include at least one of an N-P junction, a P-N junction, an N-P-N junction, and a P-N-P junction structure.

Sides of the light emitting structure layer 135 may have an inclination by an isolation etching for dividing the plurality of chips into individual chip units.

In addition, the light extraction pattern 111 may be formed on an upper surface of the light emitting structure layer 135. The light extraction pattern 111 may improve the light extraction efficiency of the light emitting device 100 by minimizing the amount of light totally reflected from the surface.

Meanwhile, at least some regions of the light extraction pattern 111 and the passivation layer 180 may overlap each other in the vertical direction. As a result, the peeling between the passivation layer 180 and the first conductivity-type semiconductor layer 110 can be prevented from being easily peeled off, thereby improving reliability of the light emitting device 100.

The light extraction pattern 111 may have a random shape and arrangement, or may be formed to have a specific shape and arrangement.

For example, the light extraction pattern 111 may be formed by being arranged in a photonic crystal structure having a period of 50nm to 3000nm. The photonic crystal structure can efficiently extract light of a specific wavelength region to the outside by an interference effect or the like.

In addition, the light extraction pattern 111 may be formed to have a variety of shapes, such as a cylinder, a polygonal pillar, a cone, a polygonal pyramid, a truncated cone, a polygonal truncated cone, but is not limited thereto.

The first electrode 115 may be formed on an upper surface of the light emitting structure layer 135. The first electrode 115 may be branched in a predetermined pattern shape, but is not limited thereto.

In addition, the first electrode 115 may have at least one pad and an electrode pattern having at least one shape connected to the pads having the same or different stacked structure, but is not limited thereto.

The passivation layer 180 may be formed on the top and side surfaces of the light emitting structure layer 135.

The passivation layer 180 may prevent the light emitting structure layer 135 from causing an electrical short such as an external electrode, and may be formed of a material having electrical insulation and transparency, for example, SiO.₂, SiO_x, SiO_xN_y, Si₃N₄, TiO₂ Or Al₂O₃ To be formed of at least one material .

The passivation layer 180 may be formed in a region other than a region in which the first electrode 115 is formed on the first conductive semiconductor layer.

The light emitting device 100 according to the embodiment has an advantage of excellent light extraction efficiency and current spreading effect.

Hereinafter, a method of manufacturing the light emitting device 100 according to the embodiment will be described in detail. However, the description overlapping with the above description will be omitted or briefly described.

2 to 13 illustrate a method of manufacturing the light emitting device 100 according to the embodiment.

Referring to FIG. 2, the first conductivity type semiconductor layer 110 and the first un-GaN layer 112 may be formed on the growth substrate 101.

The growth substrate 101 may be formed of, for example, at least one of sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, or Ge, but is not limited thereto.

The first conductive semiconductor layer 110 and the first un-GaN layer 112 may be, for example, a metal organic chemical vapor deposition (MOCVD), a chemical vapor deposition (CVD), or a plasma. Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), etc. It is not limited.

Meanwhile, a buffer layer (not shown) may be formed between the first conductive semiconductor layer 110 and the growth substrate 101 to alleviate the lattice constant difference between the first conductive semiconductor layer 110 and the growth substrate 101.

3 and 4, a metal layer 113 may be stacked on the first un-GaN layer 112. The metal layer 113 may be formed of a metal material having good electrical conductivity, for example, Au, Ag, Ni, Al, Ga, In, or the like. Next, the metal layer 113 is heat-treated to form a metal cluster 114. The heat treatment temperature may vary depending on the material and the thickness of the metal layer 113, but the metal cluster 114 may be formed by heat treatment for 1 to 30 minutes in the range of 500 to 1000 °.

Since the semiconductor layer is not grown on the metal layer 113, a part of the metal is evaporated by the heat treatment to form a metal cluster 114, and a part of the first un-GaN layer 112 is exposed. The second un-GaN layer 116 and the first conductivity type semiconductor layer 110 can be grown.

Referring to FIG. 5, a second un-GaN layer 116 may be formed on the first un-GaN layer 112 and the metal cluster 114. The second un-GaN layer 116 may be formed of a material having low electrical conductivity, such as the first un-GaN layer 112, without adding a first conductivity type dopant or a second conductivity type dopant.

The first un-GaN layer 112, the metal cluster 114, and the second un-GaN layer 116 may be repeatedly formed.

Referring to FIG. 6, a first conductive semiconductor layer 110, an active layer 120, and a second conductive semiconductor layer 130 may be formed on the second un-GaN layer 116 in order. The light emitting structure layer 135 may include a second conductive semiconductor layer 130 formed on the active layer 120 from the first conductive semiconductor layer 110 in contact with the growth substrate 101. . The light emitting structure layer 135 may be formed by, for example, metal organic chemical vapor deposition (MOCVD).

Referring to FIG. 7, the protection member 140 may be formed on the light emitting structure layer 135 along the chip boundary region of the light emitting device.

The protection member 140 may be formed around the individual chip area by using a patterned mask, and may be formed in a ring shape, a loop shape, a frame shape, or the like. The protective member 140 may be formed using, for example, a method such as electron beam (E-beam) deposition, sputtering, plasma enhanced chemical vapor deposition (PECVD), or the like.

The protective member 140 is, for example, ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, ZnO, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , It may include at least one of TiO _x , TiO _{2 ,} Ti, Al or Cr.

Referring to FIG. 8, the current blocking layer 145 may be formed on the second conductive semiconductor layer 130. The current blocking layer 145 may be formed using a patterned mask.

The current blocking layer 145 may be formed at a position overlapping at least a portion of the electrode 115 in the vertical direction, thereby alleviating a phenomenon in which the current is biased to a specific region in the light emitting structure layer 135.

Referring to FIG. 9, the ohmic layer 150 is formed on the second conductive semiconductor layer 130 and the current blocking layer 145, and the reflective layer 160 is formed on the ohmic layer 150. Can be formed.

The ohmic layer 150 and the reflective layer 160 may be formed by, for example, any one of an electron beam (E-beam) deposition, sputtering, and plasma enhanced chemical vapor deposition (PECVD).

Referring to FIG. 10, a bonding layer 170 may be formed on the ohmic layer 150 and the reflective layer 160, and a conductive support member 175 may be formed on the bonding layer 170.

The bonding layer 170 may be formed between the second protection member 140 and the conductive support member 175 to strengthen the adhesive force between the layers.

The conductive support member 175 may be formed by a bonding method attached to the bonding layer 170 by preparing a separate sheet, or may be formed by a plating method, a deposition method, or the like, but is not limited thereto. Do not.

Referring to FIG. 11, the growth substrate 101 may be removed from the light emitting device of FIG. 10.

The growth substrate 101 may be removed by at least one of laser lift off or etching.

As the growth substrate 101 is removed, the surface of the first conductivity type semiconductor layer 110 may be exposed.

Referring to FIG. 12, the light emitting structure layer 135 is isolated by a plurality of light emitting structure layers 135 by isolation etching according to a unit chip region. The isolation etching may be performed using, for example, dry etching such as inductively coupled plasma (ICP) or wet etching using an etchant such as KOH, H ₂ SO ₄ , H ₃ PO ₄ , but is not limited thereto. Do not.

The side surface of the light emitting structure layer 135 may have an inclined side surface as shown by the isolation etching. In addition, the upper surface of the protective member 140 may be partially exposed by the isolation etching.

Referring to FIG. 13, the light extraction pattern 111 is formed on an upper surface of the first conductive semiconductor layer 110. The light extraction pattern 111 may have a random shape and arrangement, or may be formed to have a specific shape and arrangement.

The light extraction pattern 111 having a random shape may be formed through a physical method such as performing wet etching on the upper surface of the light emitting structure layer 135 or polishing the surface.

The light extraction pattern 111 having a specific shape and arrangement forms a pattern mask including a pattern corresponding to the shape of the desired light extraction pattern 111 on the upper surface of the first conductivity type semiconductor layer 110, It may be formed by performing an etching process along the pattern mask.

In addition, a passivation layer 180 may be formed on the side surface of the light emitting structure layer 135 and the first conductive semiconductor layer 110. The passivation layer 180 may be formed of a material having electrical insulation and light transmittance, for example, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O _3, or the like.

The passivation layer 180 may be formed using a method such as electron beam (E-beam) deposition, sputtering, plasma enhanced chemical vapor deposition (PECVD), or the like.

Referring to FIG. 14, a first electrode 115 may be formed on a portion of the first conductivity type semiconductor layer 110. The first electrode 115 may be formed of a metal, and may include, for example, at least one of Cr, Ni, Au, Ti, or Al.

The first electrode 115 may be a method such as an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporator sputtering, or the like. It can be formed by.

The first electrode 115 may supply power to the light emitting structure layer 135.

Referring to FIG. 15, the light emitting device 100 according to the embodiment may be provided by performing a chip separation process of separating the light emitting devices of FIG. 14 into individual light emitting device units.

The chip separation process includes, for example, a breaking process of separating a chip by applying a physical force using a blade, a laser scrubbing process of separating a chip by irradiating a laser to a chip boundary, and a wet or dry etching process. An etching process may be included, but is not limited thereto.

16 is a cross-sectional view of a light emitting device 100B according to another embodiment. The light emitting device 100B according to another embodiment may include a conductive support member 175, a first conductive semiconductor layer 110 formed on the conductive support member 175, and a lower portion of the first conductive semiconductor layer 110. A first un-GaN layer 112 formed on the metal cluster 114 formed under the first un-GaN layer 112, under the first un-GaN layer 112 and the metal cluster 114. A second un-GaN layer 116 formed on the first conductive semiconductor layer 110 and a first conductive semiconductor layer 110 formed below the second un-GaN layer 116. The active layer 120, the second conductive semiconductor layer 130 formed under the active layer 120, the first conductive semiconductor layer 110, the active layer 120, and the second conductive semiconductor layer 130. It may include a protective film 180 formed on the upper and side surfaces of the.

The first electrode 115 penetrates through the conductive support substrate 175 and the light emitting structure layer 135 to be electrically connected to the first conductive semiconductor layer 110, and the second electrode 131 is turned on. It is different from the light emitting device 100 of FIG. 1 in that it is electrically connected to the second conductivity-type semiconductor layer 130 through the mix layer 150.

As described above, a via hole (210 of FIG. 17) is formed in the light emitting structure layer 135, and the first electrode 115 formed in the via hole 210 is connected to a conductive substrate formed under the light emitting device 100B. The heat generated from the well is emitted, the first electrode is formed under the light emitting structure layer 135 and the second electrode 131 is formed on the side of the light emitting structure layer 135, so the active layer 120 The light generated in the C) may be prevented from being absorbed by the first and second electrodes 115 and 131, thereby improving light extraction efficiency.

17 to 21 are views illustrating a method of manufacturing the light emitting device 100B according to another embodiment.

Referring to FIG. 17, a first conductive semiconductor layer 110, a first un-GaN layer 112, a metal cluster 114, and a second un-GaN layer 116 may be sequentially formed on the growth substrate 101. ), A first conductive semiconductor layer 110, an active layer 120, a second conductive semiconductor layer 130, an ohmic layer 150, and a reflective layer 160 may be formed, and the light emitting structure layer 135, The via hole 210 may be formed through the ohmic layer 150 and the reflective layer 160. An upper surface of the first conductive semiconductor layer 110 adjacent to the growth substrate 101 may be partially exposed by the via hole 210.

The via hole 210 may be performed by using dry etching such as inductively coupled plasma (ICP) or wet etching using an etchant such as KOH, H ₂ SO ₄ , or H ₃ PO ₄ , but is not limited thereto.

Referring to FIG. 18, a first passivation layer 185 may be formed to fill the via hole 210. The first passivation layer 185 prevents the first conductive semiconductor layer 110 and the second conductive semiconductor layer 130 from being electrically shorted.

The first passivation layer 185 may be formed to fill the via hole 210 and to contact the top surface of the first conductivity-type semiconductor layer 110 adjacent to the growth substrate 101. The ohmic layer 150 and the reflective layer ( 160 may be formed on the substrate.

The first passivation layer 185 may be formed of a material having electrical insulation and light transmittance, for example, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O _3, or the like.

Referring to FIG. 19, a mask may be formed through photo lithography and the first passivation layer 185 may be etched using a dry etching method such as an inductively coupled plasma (ICP). The first passivation layer 185 may be etched by the etching process except for portions formed on the inner surface of the via hole 210 and the ohmic layer 150 and the reflective layer 160.

Next, the mask may be removed to form the first electrode 115. The first electrode 115 may be formed to contact the upper surface of the first conductive semiconductor layer 110 adjacent to the growth substrate 101, and may supply power to the first conductive semiconductor layer 110. have.

Next, a conductive support member 175 may be formed on the first electrode 115. The conductive support member 175 may support the light emitting structure layer 135 and provide power to the light emitting structure layer 135 together with the first electrode 115. The conductive support member 175 may include, for example, at least one of Cu, Au, W, Al, Ni, Mo, Si, Ge, GaAs, ZnO, or Sic.

Referring to FIG. 20, the growth substrate 101 may be removed from the light emitting device of FIG. 19.

The growth substrate 101 may be removed by at least one of laser lift off or etching.

As the growth substrate 101 is removed, the surface of the first conductivity type semiconductor layer 110 may be exposed. The light extraction pattern 111 may be formed on an upper surface of the first conductivity type semiconductor layer 110. The light extraction pattern 111 may have a random shape and arrangement, or may be formed to have a specific shape and arrangement.

Referring to FIG. 21, the light emitting structure layer 135 is isolated by a plurality of light emitting structure layers 135 by isolation etching according to a unit chip region. The isolation etching may be performed using, for example, dry etching such as inductively coupled plasma (ICP) or wet etching using an etchant such as KOH, H ₂ SO ₄ , H ₃ PO ₄ , but is not limited thereto. Do not.

The top surface of the ohmic layer 150 may be partially exposed by the isolation etching.

Next, as shown in FIG. 16, a passivation layer 180 may be formed on the side surface of the light emitting structure layer 135 and the first conductive semiconductor layer 110. The passivation layer 180 may be formed of a material having electrical insulation and light transmittance, for example, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O _3, or the like.

Next, the second electrode 131 may be formed on a portion of the exposed upper surface of the ohmic layer 150. The second electrode 131 serves to supply power to the second conductive semiconductor layer 130.

As described above, since the first electrode 115 is formed to fill the via hole 210, heat generated in the light emitting structure layer 135 may be effectively released, and the second electrode 131 may be Since it is formed on the side of the light emitting structure layer 135 can prevent the light generated by the active layer 120 is absorbed by the electrode can improve the light extraction efficiency.

22 is a cross-sectional view of a light emitting device package including a light emitting device according to embodiments.

Referring to FIG. 22, the light emitting device package according to the embodiments may include a body 20, a first electrode layer 31 and a second electrode layer 32 installed on the body 20, and installed on the body 20. And a light emitting device 100 according to an embodiment in which the first electrode layer 31 and the second electrode layer 32 are electrically connected to each other, and a molding member 40 surrounding the light emitting device 100.

The body 20 may include a silicon material, a synthetic resin material, or a metal material, and an inclined surface may be formed around the light emitting device 100.

The first electrode layer 31 and the second electrode layer 32 are electrically separated from each other, and provide power to the light emitting device 100. In addition, the first electrode layer 31 and the second electrode layer 32 may increase light efficiency by reflecting the light generated from the light emitting device 100, and externally generate heat generated from the light emitting device 100. May also act as a drain.

The light emitting device 100 may be installed on the body 20 or on the first electrode layer 31 or the second electrode layer 32.

The light emitting device 100 may be electrically connected to the first electrode layer 31 and the second electrode layer 32 by any one of a wire method, a flip chip method, or a die bonding method.

The molding member 40 may surround the light emitting device 100 to protect the light emitting device 100. In addition, the molding member 40 may include a phosphor to change the wavelength of the light emitted from the light emitting device 100.

A plurality of light emitting device packages according to embodiments may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, a fluorescent sheet, and the like, which are optical members, may be disposed on a path of light emitted from the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a backlight unit or as a lighting unit. For example, the lighting system may include a backlight unit, a lighting unit, an indicator device, a lamp, and a street lamp.

FIG. 23 illustrates a backlight unit using a light emitting device package according to example embodiments. However, the backlight unit 1100 of FIG. 23 is an example of a lighting system, but is not limited thereto.

Referring to FIG. 23, the backlight unit 1100 may include a bottom frame 1140, an optical guide member 1120 disposed in the bottom frame 1140, and at least one side or bottom surface of the optical guide member 1120. It may include a light emitting module 1110 disposed in. In addition, a reflective sheet 1130 may be disposed under the light guide member 1120.

The bottom frame 1140 may be formed by forming a box having an upper surface open to accommodate the light guide member 1120, the light emitting module 1110, and the reflective sheet 1130. Or it may be formed of a resin material but is not limited thereto.

The light emitting module 1110 may include a substrate and a light emitting device package according to a plurality of embodiments mounted on the substrate. The plurality of light emitting device packages may provide light to the light guide member 1120.

As shown, the light emitting module 1110 may be disposed on at least one of the inner surfaces of the bottom frame 1140, thereby providing light toward at least one side of the light guide member 1120. can do.

However, the light emitting module 1110 may be disposed under the bottom frame 1140 to provide light toward the bottom surface of the light guide member 1120, which is according to the design of the backlight unit 1100. Since various modifications are possible, the present invention is not limited thereto.

The light guide member 1120 may be disposed in the bottom frame 1140. The light guide member 1120 may guide the light provided from the light emitting module 1110 to a display panel by surface light source.

The light guide member 1120 may be, for example, a light guide panel (LGP). The light guide plate may be formed of, for example, one of an acrylic resin series such as polymethyl metaacrylate (PMMA), polyethylene terephthlate (PET), polycarbonate (PC), COC, and polyethylene naphthalate (PEN) resin.

The optical sheet 1150 may be disposed above the light guide member 1120.

The optical sheet 1150 may include at least one of, for example, a diffusion sheet, a light collecting sheet, a luminance rising sheet, and a fluorescent sheet. For example, the optical sheet 1150 may be formed by stacking the diffusion sheet, the light collecting sheet, the luminance increasing sheet, and the fluorescent sheet. In this case, the diffusion sheet 1150 may evenly diffuse the light emitted from the light emitting module 1110, and the diffused light may be focused onto a display panel (not shown) by the light collecting sheet. In this case, the light emitted from the light collecting sheet is randomly polarized light, and the luminance increasing sheet may increase the degree of polarization of the light emitted from the light collecting sheet. The light collecting sheet may be, for example, a horizontal or / and vertical prism sheet. In addition, the luminance increase sheet may be, for example, a roughness enhancement film. In addition, the fluorescent sheet may be a translucent plate or film containing a phosphor.

The reflective sheet 1130 may be disposed under the light guide member 1120. The reflective sheet 1130 may reflect light emitted through the bottom surface of the light guide member 1120 toward the exit surface of the light guide member 1120.

The reflective sheet 1130 may be formed of a resin material having good reflectance, for example, PET, PC, PVC resin, etc., but is not limited thereto.

24 is a perspective view of a lighting unit using a light emitting device package according to the embodiments. However, the lighting unit 1200 of FIG. 24 is an example of a lighting system, but is not limited thereto.

Referring to FIG. 24, the lighting unit 1200 is installed in the case body 1210, the light emitting module 1230 installed in the case body 1210, and the case body 1210, and provides power from an external power source. It may include a receiving connection terminal 1220.

The case body 1210 is preferably formed of a material having good heat dissipation characteristics, for example, may be formed of a metal material or a resin material.

The light emitting module 1230 may include a substrate 300 and a light emitting device package 200 according to at least one embodiment mounted on the substrate 300.

The substrate 300 may have a circuit pattern printed on an insulator, and for example, a general printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB, and the like. It may include.

In addition, the substrate 300 may be formed of a material that reflects light efficiently, or the surface may be formed of a color that reflects light efficiently, for example, white, silver, or the like.

The light emitting device package 200 according to the at least one embodiment may be mounted on the substrate 300. Each of the light emitting device packages 200 may include at least one light emitting diode (LED). The light emitting diodes may include colored light emitting diodes emitting red, green, blue, or white colored light, and UV light emitting diodes emitting ultraviolet (UV) light.

The light emitting module 1230 may be arranged to have a combination of various light emitting diodes in order to obtain color and brightness. For example, a white light emitting diode, a red light emitting diode, and a green light emitting diode may be combined to secure high color rendering (CRI). In addition, a fluorescent sheet may be further disposed on a path of the light emitted from the light emitting module 1230, and the fluorescent sheet changes the wavelength of light emitted from the light emitting module 1230. For example, when the light emitted from the light emitting module 1230 has a blue wavelength band, the fluorescent sheet may include a yellow phosphor, and the light emitted from the light emitting module 1230 finally passes white light through the fluorescent sheet. Will be shown.

The connection terminal 1220 may be electrically connected to the light emitting module 1230 to supply power. According to FIG. 24, the connection terminal 1220 is inserted into and coupled to an external power source in a socket manner, but is not limited thereto. For example, the connection terminal 1220 may be formed in a pin shape and inserted into an external power source, or may be connected to the external power source by a wire.

In the lighting system as described above, at least one of a light guide member, a diffusion sheet, a light collecting sheet, a luminance rising sheet, and a fluorescent sheet may be disposed on a propagation path of light emitted from the light emitting module to obtain a desired optical effect.

As described above, the lighting system according to the embodiments may be improved reliability by including the light emitting device package according to the embodiments.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of illustration, It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (8)

A first conductive semiconductor layer;
A first electrode electrically connected to the first conductive semiconductor layer;
An active layer formed under the first conductivity type semiconductor layer;
A second conductivity type semiconductor layer formed under the active layer; And
A second electrode electrically connected to the second conductivity type semiconductor layer,
The first conductive semiconductor layer includes an undoped semiconductor layer, and the undoped semiconductor layer has a metal cluster therein. The method of claim 1,
The light emitting device of claim 1, wherein the first conductive semiconductor layer is disposed on upper and lower surfaces of the undoped semiconductor layer. The method of claim 1,
The metal cluster has a thickness of 1 to 100 소자. The method of claim 1,
The first semiconductor layer has a thickness of 1 to 50nm formed. The method of claim 1,
The second semiconductor layer has a thickness of 1 ~ 200nm light emitting device. The method of claim 1,
The thickness of the first conductivity-type semiconductor layer in contact with the active layer is formed of 1 ~ 100nm. The method of claim 1,
The first electrode may be connected to a first conductive semiconductor layer through the active layer, the second conductive semiconductor layer, the first semiconductor layer, the metal cluster, and the second semiconductor layer in the form of a via hole. The method of claim 1,
The metal cluster includes at least one of Au, Ag, Ni, Ga or In.

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