KR20120008958A - Light emitting device - Google Patents

Abstract

PURPOSE: A light emitting device is provided to maximize a contact area with a semiconductor layer by contacting a conductive layer with the semiconductor layer with a line type. CONSTITUTION: A first conductive layer is formed on a conductive substrate. A first semiconductor layer is formed on the first conductive layer. An active layer(340) is formed on the first semiconductor layer. A second conductive layer is formed on the upper side of the first conductive layer. A second semiconductor layer(360) is formed on the active layer and the second conductive layer. The second conductive layer is arranged along the outer circumference of the second semiconductor layer and the sidewalls of the first semiconductor layer and the active layer. An insulation layer(370) is arranged between the first conductive layer and the second conductive layer, and between the second conductive layer and the sidewalls of the first semiconductor layer and the active layer.

Description

[0001] LIGHT EMITTING DEVICE [0002]

An embodiment relates to a light emitting device.

Light emitting diodes (LEDs) are a type of semiconductor device that converts electrical energy into light. The light emitting diode has advantages of low power consumption, semi-permanent life, fast response speed, safety and environmental friendliness compared to conventional light sources such as fluorescent and incandescent lamps. Accordingly, many researches are being conducted to replace existing light sources with light emitting diodes, and the use of light emitting diodes is increasing as a light source for lighting devices such as various lamps, liquid crystal displays, electronic signs, and street lamps that are used indoors and outdoors.

1 is a cross-sectional view of a conventional vertical light emitting device 100.

Hereinafter, for convenience of description, the semiconductor layer in contact with the substrate 120 illustrated in FIG. 1 is an n-type semiconductor layer, and the semiconductor layer formed on the active layer 140 will be described as a p-type semiconductor layer. .

Referring to FIG. 1, the light emitting device 100 includes an n-type electrode 110, a conductive substrate 120 formed on the n-type electrode layer 110, an n-type semiconductor layer 130 formed on the conductive substrate 120, an active layer 140 formed on the n-type semiconductor layer 130, a p-type semiconductor layer 150 formed on the active layer 140, and a p-type electrode layer 160 formed on the p-type semiconductor layer 150. .

As shown in FIG. 1, when the conductive substrate 120 is used, since the voltage can be applied to the n-type semiconductor layer 130 through the conductive substrate 120, an electrode may be formed on the substrate itself. . Accordingly, the n-type electrode 110 is formed on the conductive substrate 120, and the p-type electrode 160 is formed on the p-type semiconductor layer 150, thereby manufacturing a vertical light emitting device.

However, in the light emitting device 100 illustrated in FIG. 1, the p-type electrode 160 is disposed at the top of the light emitting device 100, and moves from the active layer 140 to the outside when the light emitting device 100 is operated. It blocks some of the emitted light. Accordingly, in the case of the vertical light emitting device 100 shown in FIG. 1, the light loss is large and the light emitting efficiency is reduced.

The embodiment aims to provide a light emitting device in which light loss due to the reduction of the light emitting area is minimized and activation of current flow is maximized.

The light emitting device according to the embodiment includes a conductive substrate, a first conductive layer on the conductive substrate, a first semiconductor layer on the first conductive layer, an active layer on the first semiconductor layer, a second conductive layer on the first conductive layer, A second semiconductor layer and an insulating layer on the active layer and the second conductive layer, the second conductive layer being disposed along the sidewalls of the first semiconductor layer and the active layer and the outer periphery of the second semiconductor layer, And between the first conductive layer and the second conductive layer, and between the sidewalls of the first semiconductor layer and the active layer and the second conductive layer.

According to the embodiment, it is possible to provide a light emitting device in which the light loss due to the reduction of the light emitting area is minimized and the activation of the current flow is maximized.

1 is a cross-sectional view of a conventional vertical light emitting device.
2 and 3 are cross-sectional views of light emitting devices according to embodiments.
4 is a top view of the light emitting device taken along the line AA ′ of FIG. 3.
5 is a view schematically showing a package of a light emitting device.

Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings. However, the accompanying drawings are only described in order to more easily disclose the contents of the embodiments, the scope of the present invention is not limited to the scope of the accompanying drawings will be readily understood by those of ordinary skill in the art. Could be.

2 is a cross-sectional view of a conventional vertical light emitting device 200 having a via hole electrode as an example. The vertical light emitting device 200 illustrated in FIG. 2 is a structure for increasing light emission efficiency of the conventional vertical light emitting device 100 illustrated in FIG. 1.

Hereinafter, for convenience of description, the semiconductor layer contacting the n-type electrode layer 220 through the via holes 220a, 220b, and 220c is an n-type semiconductor layer, and is formed between the p-type electrode layer 240 and the active layer 260. The semiconductor layer will be described assuming a p-type semiconductor layer.

In the light emitting device 200 illustrated in FIG. 2, the n-type electrode layer 220 penetrates through the p-type electrode layer 240, the p-type semiconductor layer 250, and the active layer 260. Via holes 220a, 220b, and 220c extending to a predetermined region are formed. This structure, unlike the conventional light emitting device 100 shown in Figure 1, because the upper portion of the n-type semiconductor layer 270, which actually emits light, is not blocked by the electrode has the advantage of good light extraction efficiency have.

3 is a sectional view showing a light emitting device 300 according to another embodiment. FIG. 4 is a diagram illustrating an upper surface of the light emitting device 300 cut along the line AA ′ of FIG. 3.

3 and 4, the light emitting device 300 according to the embodiment may include a conductive substrate 310, a first conductive layer 320, a first semiconductor layer 330, an active layer 340, and a second conductivity. The layer 350, the second semiconductor layer 360, and the insulating layer 370 are included.

Hereinafter, for convenience of description, the first conductive layer 320 is a p-type conductive layer, the first semiconductor layer 330 is a p-type semiconductor layer, the second conductive layer 350 is an n-type conductive layer, The second semiconductor layer 360 will be described assuming an n-type semiconductor layer.

The conductive substrate 310 may be formed including one or more materials of Au, Ni, Al, Cu, W, Si, Se, and GaAs. For example, the conductive substrate 310 may be made of a material in the form of an alloy of Si and Al.

The p-type conductive layer 320 may be formed on the conductive substrate 310. The p-type conductive layer 320 may be formed of at least one of Ag, Al, Pt, Ni, Pt, Pd, Au, Ir, and transparent conductive oxides (ITO, GZO). Since the p-type conductive layer 320 is in electrical contact with the p-type semiconductor layer 330, the p-type conductive layer 320 has a property of minimizing contact resistance of the p-type semiconductor layer 330 and at the same time light generated in the active layer 340. By reflecting the light toward the outside can improve the luminous efficiency. The p-type conductive layer 320 may have a multilayer structure including a reflective layer.

The p type semiconductor layer 330 is formed on the p type conductive layer 320, the active layer 340 is formed on the p type semiconductor layer 330, and the n type semiconductor layer 360 is formed on the active layer 340. Can be formed on.

The n-type semiconductor layer 360 is a semiconductor material having a composition formula of In _x AlyGa _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1), for example, InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN, etc. may be selected, and n-type dopants such as Si, Ge, Sn, and the like may be doped.

The p-type semiconductor layer 330 is a semiconductor material having a composition formula of In _x AlyGa _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x ₊ y≤1), for example, InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN and the like may be selected, and p-type dopants such as Mg and Zn may be doped.

The active layer 340 may be formed of any one of a single quantum well structure, a multi quantum well structure (MQW), a quantum line structure, and a quantum dot structure, but is not limited thereto.

The active layer 340 may be formed of a semiconductor material having a composition formula of In _x AlyGa _(1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). When the active layer 340 is formed of a multi-quantum well structure (MQW), the active layer 340 may be formed by stacking a plurality of well layers and a plurality of barrier layers, for example, an InGaN well layer / GaN barrier layer. It may be formed in a cycle.

In addition, the active layer 340 may be formed by selecting a different material according to the materials constituting the p-type semiconductor layer 330 and the n-type semiconductor layer 360. That is, since the active layer 340 is a layer that converts and radiates energy due to recombination of electrons and holes into light, energy smaller than the energy band gaps of the p-type semiconductor layer 330 and the n-type semiconductor layer 360. It is preferred to be formed of a material having a band gap.

The n-type conductive layer 350 may be formed on the p-type conductive layer 320 and vertically formed from the p-type conductive layer 320. In addition, it is formed along the sidewalls of the p-type semiconductor layer 330 and the active layer 340, it may be connected in one line. That is, the n-type conductive layer 350 is located at the edge of the device, not in the form of a via hole electrode formed at the center portion of the device.

In the embodiment, the n-type conductive layer 350 is described as being connected by one line, but is not limited thereto. For example, the n-type conductive layer 350 may have a predetermined period or include a non-periodic pattern.

In addition, the n-type conductive layer 350 may be formed higher than the active layer 340. Accordingly, some regions of the n-type conductive layer 350 are present on the same layer as the p-type semiconductor layer 330 and the active layer 340, and the remaining regions are present in the region of the n-type semiconductor layer 360. Done. Here, the remaining region of the n-type conductive layer 350 is in contact with the n-type semiconductor layer 360. Since the n-type conductive layer 350 is electrically connected to the n-type semiconductor layer 360, it is preferable that the n-type conductive layer 350 is made of a material in which contact resistance is minimized with the n-type semiconductor layer 360.

In addition, the n-type conductive layer 350 may include at least one region where a portion thereof is exposed to the outside, that is, exposed regions 351a and 353b. On the exposed regions 351a and 351b, n-type electrode pad portions 353a and 353b for connecting an external power source to the n-type conductive layer 350 may be formed, respectively. The exposed areas 351a and 351b may be formed at the corners of the light emitting device 300, which may maximize the light emitting area.

The n-type conductive layer 350 may be formed including one or more materials of Al, Au, Pt, Ti, Cr, and W.

The insulating layer 370 may be formed such that the n-type conductive layer 350 is electrically insulated from other layers except for the n-type semiconductor layer 360. More specifically, the insulating layer 370 is between the p-type conductive layer 320 and the n-type conductive layer 350, the sidewalls of the p-type semiconductor layer 330 and the active layer 340, and the n-type conductive layer 350. It may be formed between.

In addition, the insulating layer 350 may or may not be formed on sidewalls of the region of the n-type conductive layer 350 that protrudes from the n-type semiconductor layer 360. In the latter case, the contact area between the n-type conductive layer 350 and the n-type semiconductor layer 360 may be maximized by minimizing the insulating region between the n-type conductive layer 350 and the n-type semiconductor layer 360.

In addition, the insulating layer 370 is not formed on the n-type conductive layer 350. The upper portion of the n-type conductive layer 350 and the n-type semiconductor layer 360 may be electrically connected.

The insulating layer 370 may be any one of silicon oxide (SiO ₂ ), silicon nitride (SiO _x N _y , Si _x N _y ), metal oxide (Al ₂ O ₃ ), and fluoride-based compounds. It may be formed including the above.

Meanwhile, in order to suppress leakage current generated during the operation of the light emitting device 300, a passivation layer (not shown) may be formed on the side surface of the light emitting device 300. The passivation layer (not shown) is for protecting the light emitting structure from the outside and suppressing leakage current, and includes silicon oxide (SiO ₂ ), silicon nitride (SiO _x N _y , Si _x N _y ), and metal oxide (Al ₂ O). ₃ ) and fluoride-based compounds may be formed including any one or more.

In the light emitting device according to the embodiment, since the conductive layer is positioned at the edge of the device, the reduction of the area of the activation layer can be minimized. In addition, since the conductive layer is formed in a line shape and contacts the semiconductor layer, the contact area with the semiconductor layer may be maximized.

Hereinafter, a light emitting device package according to an embodiment will be described with reference to FIG. 5. 5 is a schematic cross-sectional view of a package 1000 of a light emitting device.

As shown in FIG. 5, the light emitting device package 1000 according to the embodiment may include a package body 1100, a first electrode layer 1110, a second electrode layer 1120, a light emitting device 1200, and a filler 1300. Include.

The package body 1100 may be formed of a silicon material, a synthetic resin material, or a metal material. An inclined surface may be formed around the light emitting device 1200 to increase light extraction efficiency.

The first electrode layer 1110 and the second electrode layer 1120 are installed in the package body 1100. The first electrode layer 1100 and the second electrode layer 1120 are electrically separated from each other, and provide power to the light emitting device 1200. In addition, the first electrode layer 1110 and the second electrode layer 1120 may increase light efficiency by reflecting light generated from the light emitting device 1200, and discharge heat generated from the light emitting device 1200 to the outside. It can also play a role.

The light emitting device 1200 is electrically connected to the first electrode layer 1100 and the second electrode layer 1120. The light emitting device 1200 may be installed on the package body 1100 or on the first electrode layer 1100 or the second electrode layer 1120.

The light emitting device 1200 may be electrically connected to the first electrode layer 1110 and the second electrode layer 1120 by any one of a wire method, a flip chip method, or a die bonding method.

The filler 1300 may be formed to surround and protect the light emitting device 1200. In addition, the filler 1300 may include a phosphor 1310 to change the wavelength of light emitted from the light emitting device 1200.

The light emitting device package 1000 may mount at least one of the light emitting devices of the above-described embodiments as one or more, but is not limited thereto.

A plurality of light emitting device packages 1000 according to the exemplary embodiment may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, or the like, which is an optical member, may be disposed on an optical path of the light emitting device package 1000. The light emitting device package 1000, the substrate, and the optical member may function as a light unit.

Another embodiment may be implemented as a display device, an indicator device, or a lighting system including the semiconductor light emitting device or the light emitting device package described in the above embodiments, and for example, the lighting system may include a lamp or a street lamp. .

As described above, those skilled in the art to which the present invention pertains will understand that the present invention may be implemented in other specific forms without changing the technical spirit or essential features.

Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive, and the scope of the present invention is indicated by the following claims rather than the above description, and the meaning and scope of the claims And all changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

300: light emitting element
310: conductive substrate
320: first conductive layer
330: first semiconductor layer
340: active layer
350: second conductive layer
360: second semiconductor layer
370: insulation layer

Claims (12)

Conductive substrates;
A first conductive layer on the conductive substrate;
A first semiconductor layer on the first conductive layer;
An active layer on the first semiconductor layer;
A second conductive layer on the first conductive layer;
A second semiconductor layer on the active layer and the second conductive layer; And
Insulation layer,
The second conductive layer is disposed along sidewalls of the first semiconductor layer and the active layer and an outer circumferential portion of the second semiconductor layer.
And the insulating layer is disposed between the first conductive layer and the second conductive layer, and between the sidewalls of the first semiconductor layer and the active layer and the second conductive layer.
The method of claim 1,
The second conductive layer is in contact with the bottom and side surfaces of the second semiconductor layer.
The method of claim 1,
The second conductive layer is a light emitting device having a line shape connected along the sidewalls of the first semiconductor layer and the active layer, and the outer peripheral portion of the second semiconductor layer.
The second conductive layer includes a sidewall of the first semiconductor layer and the active layer, and a plurality of patterns spaced apart from each other along the outer periphery of the second semiconductor layer.
The method of claim 1,
The second conductive layer has at least one region, part of which is exposed to the outside,
And an electrode pad portion formed on the exposed area of the second conductive layer.
The method of claim 2,
The electrode pad portion is formed on the corner of the light emitting device.
The method of claim 1,
And the conductive substrate comprises at least one of Au, Ni, Al, Cu, W, Si, Se, and GaAs.
The method of claim 1,
The first conductive layer comprises at least one of Ag, Al, Pt, Ni, Pt, Pd, Au, Ir, and a transparent conductive oxide,
The transparent conductive oxide, at least one of ITO and GZO, the light emitting device.
The method of claim 1,
The first conductive layer includes a reflective layer that reflects light generated from the active layer.
The method of claim 1,
The second conductive layer, Al, Au, Pt, Ti, Cr, and W, the light emitting device comprising at least one material.
The method of claim 1,
The insulating layer is a light emitting device comprising any one or more of silicon oxide, silicon nitride, metal oxide and fluoride series compounds.
The method of claim 1,
The upper surface of the side surface of the said 1st semiconductor layer and the said active layer, and the said 2nd conductive layer arrange | positioned along the outer periphery of the said 2nd semiconductor layer is located higher than the said active layer.

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