KR20120006348A - Light emitting device - Google Patents

Light emitting device Download PDF

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Publication number
KR20120006348A
KR20120006348A KR1020100067029A KR20100067029A KR20120006348A KR 20120006348 A KR20120006348 A KR 20120006348A KR 1020100067029 A KR1020100067029 A KR 1020100067029A KR 20100067029 A KR20100067029 A KR 20100067029A KR 20120006348 A KR20120006348 A KR 20120006348A
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KR
South Korea
Prior art keywords
layer
light emitting
semiconductor layer
emitting device
conductive pattern
Prior art date
Application number
KR1020100067029A
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Korean (ko)
Inventor
민복기
Original Assignee
엘지이노텍 주식회사
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Publication date
Application filed by 엘지이노텍 주식회사 filed Critical 엘지이노텍 주식회사
Priority to KR1020100067029A priority Critical patent/KR20120006348A/en
Publication of KR20120006348A publication Critical patent/KR20120006348A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/42Transparent materials

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

An embodiment relates to a light emitting device.
The light emitting device according to the embodiment includes a conductive substrate, a first conductive layer formed on the conductive substrate, a first semiconductor layer formed on the first conductive layer, an active layer formed on the first semiconductor layer, and a first formed on the first conductive layer. A second conductive layer, a second semiconductor layer formed on the active layer and the second conductive layer, and an insulating layer, the second conductive layer being disposed along sidewalls of the first semiconductor layer and the active layer and the outer periphery of the second semiconductor layer; The insulating layer is formed between the first conductive layer and the second conductive layer, and between the sidewalls of the first semiconductor layer and the active layer and the second conductive layer.

Description

Light Emitting Device {LIGHT EMITTING DEVICE}

An embodiment relates to a light emitting device.

Light emitting diodes (LEDs) are a type of semiconductor device that converts electrical energy into light. The light emitting diode has advantages of low power consumption, semi-permanent life, fast response speed, safety and environmental friendliness compared to conventional light sources such as fluorescent and incandescent lamps. Accordingly, many researches are being conducted to replace existing light sources with light emitting diodes, and the use of light emitting diodes is increasing as a light source for lighting devices such as various lamps, liquid crystal displays, electronic signs, and street lamps that are used indoors and outdoors.

1 is a cross-sectional view of a conventional vertical light emitting device 10.

Hereinafter, for convenience of description, it is assumed that the semiconductor layer in contact with the substrate 100 illustrated in FIG. 1 is an n-type semiconductor layer, and the semiconductor layer formed on the active layer 120 is a p-type semiconductor layer 130. Let's do it.

Referring to FIG. 1, the light emitting device 10 includes a substrate 100, an n-type semiconductor layer 110 formed on the substrate 100, an active layer 120 and an active layer 120 formed on the n-type semiconductor layer 110. P-type semiconductor layer 130 formed on the p-type, n-type electrode 170 formed on a portion of the n-type semiconductor layer 110, p-type electrode 160 formed on the p-type semiconductor layer 130, ITO layer ( 140, and a conductive pattern 150 formed on the ITO layer 140.

The embodiment aims to provide a light emitting device in which light loss due to the reduction of the light emitting area is minimized, current is prevented, and current diffusion is maximized.

The light emitting device according to the embodiment includes a substrate; A first semiconductor layer formed on the substrate; An active layer formed on the first semiconductor layer; A second semiconductor layer formed in the first region on the active layer; A first electrode pad formed in a second region on the active layer; A transparent electrode layer formed in the first region on the second semiconductor layer; A current blocking layer formed in the transparent electrode layer; A conductive pattern formed on the current blocking layer; And a second electrode pad formed in a second region on the second semiconductor layer.

According to the embodiment, it is possible to provide a light emitting device in which the light loss due to the reduction of the light emitting area is minimized, the induction of current is prevented, and the spread of the current is maximized.

1 is a cross-sectional view of a conventional vertical light emitting device.
2A and 2B are cross-sectional views of vertical light emitting devices according to embodiments.
3 is a perspective view of a light emitting device according to the embodiment of FIGS. 2A and 2B;
4 schematically shows a package of a light emitting device.

Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings. However, the accompanying drawings are only described in order to more easily disclose the contents of the embodiments, the scope of the present invention is not limited to the scope of the accompanying drawings will be readily understood by those of ordinary skill in the art. Could be.

2A and 2B are cross-sectional views of a horizontal light emitting device 20 including a current blocking layer (CBL) as an embodiment. The horizontal light emitting device 20 shown in FIGS. 2A and 2B obtains a current spreading effect similar to that of the conventional horizontal light emitting device 10 shown in FIG. It is a structure for improving the luminous efficiency of 20).

3 is a perspective view of a light emitting device according to the embodiment of FIGS. 2A and 2B. The light emitting device 20 of the embodiment includes a substrate 100, a first semiconductor layer 110 formed on the substrate 100, an active layer 120 formed on the first semiconductor layer 110, and a first layer on the active layer 120. The second semiconductor layer 130 formed in the region, the first electrode pad 170 formed in the second region on the active layer 120, the transparent electrode layer 220 formed in the first region on the second semiconductor layer 130, and the transparent electrode layer The current blocking layer 200 formed in the 220, the conductive pattern 210 formed on the current blocking layer 200, and the second electrode pad 160 formed in the second region on the second semiconductor layer 130. ).

Hereinafter, for convenience of description, the first semiconductor layer 110 is described as an n-type semiconductor layer 110 and the second semiconductor layer 130 as a p-type semiconductor layer 130, but the description of the present embodiment Though not limited thereto, the first semiconductor layer 110 may be a p-type semiconductor layer, and the second semiconductor layer 130 may be an n-type semiconductor layer. Preferably, the p-type semiconductor layer 130 may include P-GaN, and the n-type semiconductor layer may include N-GaN.

n-type semiconductor layer 110 contains a semiconductor material, for example, having a compositional formula of In x Al y Ga 1 -x- y N (0 = x = 1, 0 = y = 1, 0 = x + y = 1) InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN and the like may be selected, and n-type dopants such as Si, Ge, Sn, and the like may be doped.

The p-type semiconductor layer 130 is a semiconductor material having a composition formula of In x Al y Ga 1 -x- y N (0 = x = 1, 0 = y = 1, 0 = x + y = 1), for example InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN and the like may be selected, and p-type dopants such as Mg and Zn may be doped.

The active layer 120 may be formed of any one of a single quantum well structure, a multi quantum well structure (MQW), a quantum line structure, and a quantum dot structure, but is not limited thereto.

The active layer 120 may be formed of a semiconductor material having a composition formula of In x Al y Ga 1 -x- y N (0 = x = 1, 0 = y = 1, 0 = x + y = 1). When the active layer 120 is formed of a multi-quantum well structure (MQW), the active layer 120 may be formed by stacking a plurality of well layers and a plurality of barrier layers, for example, an InGaN well layer / GaN barrier layer. It may be formed in a cycle.

In addition, the active layer 120 may be formed by selecting a different material according to the materials constituting the p-type semiconductor layer 130 and the n-type semiconductor layer 110. That is, since the active layer 120 is a layer that converts and emits energy due to recombination of electrons and holes into light, energy smaller than the energy band gap of the p-type semiconductor layer 130 and the n-type semiconductor layer 110. It is preferred to be formed of a material having a band gap.

The conductive pattern 210 may be an Au pattern, the transparent electrode layer 220 may include a transparent conductive oxide, and the transparent conductive oxide may include one or more of ITO and GZO.

Since the conductive pattern 210 is disposed inside the transparent electrode layer 220 formed on the p-type semiconductor 130, current spreading is improved. It is preferable to use Au as the conductive pattern 210, but if a material having a higher electrical conductivity than the transparent electrode layer 220 is used, the effect of current diffusion can be obtained. Therefore, the material constituting the conductive pattern 210 is not limited to Au.

The current blocking layer 200 is disposed under the conductive pattern 210 positioned inside the transparent electrode layer 220. As shown in FIG. 2B, the transparent electrode layer 220 surrounds the conductive pattern 210 and the current blocking layer 200. The current blocking layer 200 serves to prevent the current from escaping and to increase the current spreading.

In the conventional light emitting device 10 illustrated in FIG. 1, when the line width is about 10 μm, in the light emitting device of the embodiment, when the thickness of the conductive pattern (eg, Au pattern) is deposited to 2 μm, the conductive pattern is considered in consideration of the contact cross-sectional area. The thickness of can be reduced to 3 um. By reducing the line width of the conductive pattern, the light transmission area is increased, and thus the light efficiency can be increased.

The current blocking layer 200 may include, for example, any one or more of silicon oxide, silicon nitride, metal oxide, and fluoride series compounds, but is not limited thereto.

The current blocking layer 200 may be formed by deposition. Specifically, a portion of the transparent electrode 220 may be first formed thin on the p-type semiconductor 130, and then the current blocking layer 200 may be deposited first. After depositing the conductive pattern 210 on the deposited current blocking layer 200, the rest of the transparent electrode 200 may be deposited to cover the conductive pattern 210.

In addition, the current blocking layer 200 may be directly formed on the p-type semiconductor 130 without forming the transparent electrode 220 between the p-type semiconductor 130 and the current blocking layer 200.

On the other hand, the substrate 100 may use a sapphire substrate.

As illustrated in FIG. 3, the conductive pattern 210 may be connected to the second electrode pad 160 and disposed on the second semiconductor layer 130. The conductive pattern 210 may be branched from the second electrode pad 160 as a branch for dispersing a current input from the outside through the second electrode pad 160 on the second semiconductor layer 130. It is not limited to the shape.

The embodiment has been described based on the horizontal chip structure, but this is only an example for description and is not limited thereto. That is, the present invention may also be applied to a hybrid structure including a vertical structure and a via hole.

Hereinafter, a light emitting device package according to an exemplary embodiment will be described with reference to FIG. 4. 4 is a schematic cross-sectional view of a package 1000 of a light emitting device.

As illustrated in FIG. 4, the light emitting device package 1000 according to the embodiment may include a package body 1100, a first electrode layer 1110, a second electrode layer 1120, a light emitting device 1200, and a filler 1300. Include.

The package body 1100 may be formed of a silicon material, a synthetic resin material, or a metal material. An inclined surface may be formed around the light emitting device 1200 to increase light extraction efficiency.

The first electrode layer 1110 and the second electrode layer 1120 are installed in the package body 1100. The first electrode layer 1100 and the second electrode layer 1120 are electrically separated from each other, and provide power to the light emitting device 1200. In addition, the first electrode layer 1110 and the second electrode layer 1120 may increase light efficiency by reflecting light generated from the light emitting device 1200, and discharge heat generated from the light emitting device 1200 to the outside. It can also play a role.

The light emitting device 1200 is electrically connected to the first electrode layer 1100 and the second electrode layer 1120. The light emitting device 1200 may be installed on the package body 1100 or on the first electrode layer 1100 or the second electrode layer 1120.

The light emitting device 1200 may be electrically connected to the first electrode layer 1110 and the second electrode layer 1120 by any one of a wire method, a flip chip method, or a die bonding method.

The filler 1300 may be formed to surround and protect the light emitting device 1200. In addition, the filler 1300 may include a phosphor 1310 to change the wavelength of light emitted from the light emitting device 1200.

The light emitting device package 1000 may mount at least one of the light emitting devices of the above-described embodiments as one or more, but is not limited thereto.

A plurality of light emitting device packages 1000 according to the exemplary embodiment may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, or the like, which is an optical member, may be disposed on an optical path of the light emitting device package 1000. The light emitting device package 1000, the substrate, and the optical member may function as a light unit.

Another embodiment may be implemented as a display device, an indicator device, or a lighting system including the semiconductor light emitting device or the light emitting device package described in the above embodiments, and for example, the lighting system may include a lamp or a street lamp. .

As described above, those skilled in the art to which the present invention pertains will understand that the present invention may be implemented in other specific forms without changing the technical spirit or essential features.

Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive, and the scope of the present invention is indicated by the following claims rather than the above description, and the meaning and scope of the claims And all changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

10: light emitting element
100: substrate
110: first semiconductor layer
120: active layer
130: second semiconductor layer
160: second electrode pad
170: first electrode pad
200: current blocking layer
210: challenge pattern
220: transparent electrode layer

Claims (12)

Board;
A first semiconductor layer on the substrate;
An active layer on the first semiconductor layer;
A second semiconductor layer on the active layer;
A current blocking layer disposed in a first region on the second semiconductor layer;
A second electrode pad disposed in a second region on the second semiconductor layer;
A conductive pattern disposed on the current blocking layer, one end of which is connected to the second electrode pad and branched from the second electrode pad; And
A light emitting device comprising a first transparent electrode layer covering an upper surface of the conductive pattern.
The method of claim 1,
The line width of the conductive pattern is 3um or less light emitting device.
The method of claim 1,
The first semiconductor layer is an n-type semiconductor layer, the second semiconductor layer is a p-type semiconductor layer.
The method of claim 1,
The conductive pattern includes Au.
The method of claim 1,
The transparent electrode layer includes a transparent conductive oxide,
The transparent conductive oxide, light emitting device comprising at least one of ITO and GZO.
The method of claim 1,
The substrate is a sapphire substrate light emitting device.
The method of claim 1,
The substrate is a light emitting device comprising at least one of Au, Ni, Al, Cu, W, Si, Se, and GaAs.
The method of claim 1,
The current blocking layer is a light emitting device comprising any one or more of silicon oxide, silicon nitride, metal oxide and fluoride series compounds.
The method of claim 1,
And a second transparent electrode layer disposed between the current blocking layer and the second semiconductor layer.
10. The method of claim 9,
The light emitting device of which the thickness of the second transparent electrode layer is thinner than the thickness of the first transparent electrode layer.
The method of claim 1,
The first semiconductor layer includes a region where an upper surface is exposed, and includes a first electrode pad on the exposed upper surface.
The method of claim 1,
And the conductive pattern and the current blocking layer are aligned in a thickness direction.
KR1020100067029A 2010-07-12 2010-07-12 Light emitting device KR20120006348A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020100067029A KR20120006348A (en) 2010-07-12 2010-07-12 Light emitting device

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Application Number Priority Date Filing Date Title
KR1020100067029A KR20120006348A (en) 2010-07-12 2010-07-12 Light emitting device

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KR20120006348A true KR20120006348A (en) 2012-01-18

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KR1020100067029A KR20120006348A (en) 2010-07-12 2010-07-12 Light emitting device

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014094536A1 (en) * 2012-12-21 2014-06-26 厦门市三安光电科技有限公司 Light emitting diode and manufacturing method thereof
CN104103728A (en) * 2014-08-06 2014-10-15 湘能华磊光电股份有限公司 Machining method and machining device for preventing light-emitting diode chip electrode from falling
KR20160018046A (en) * 2014-08-07 2016-02-17 엘지이노텍 주식회사 Light emitting device and lighting system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014094536A1 (en) * 2012-12-21 2014-06-26 厦门市三安光电科技有限公司 Light emitting diode and manufacturing method thereof
CN104103728A (en) * 2014-08-06 2014-10-15 湘能华磊光电股份有限公司 Machining method and machining device for preventing light-emitting diode chip electrode from falling
KR20160018046A (en) * 2014-08-07 2016-02-17 엘지이노텍 주식회사 Light emitting device and lighting system

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