KR20110122495A - Optical package and manufacturing method of the same - Google Patents

Optical package and manufacturing method of the same Download PDF

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Publication number
KR20110122495A
KR20110122495A KR1020100042045A KR20100042045A KR20110122495A KR 20110122495 A KR20110122495 A KR 20110122495A KR 1020100042045 A KR1020100042045 A KR 1020100042045A KR 20100042045 A KR20100042045 A KR 20100042045A KR 20110122495 A KR20110122495 A KR 20110122495A
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KR
South Korea
Prior art keywords
layer
package
insulating layer
optical
optical package
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Application number
KR1020100042045A
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Korean (ko)
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KR101146659B1 (en
Inventor
백지흠
Original Assignee
엘지이노텍 주식회사
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Priority to KR1020100042045A priority Critical patent/KR101146659B1/en
Priority to TW99133993A priority patent/TWI472067B/en
Priority to PCT/KR2010/006895 priority patent/WO2011136446A1/en
Publication of KR20110122495A publication Critical patent/KR20110122495A/en
Application granted granted Critical
Publication of KR101146659B1 publication Critical patent/KR101146659B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

The present invention provides a metal layer having a circuit pattern, an insulating layer formed on the metal layer and including a hole, a white reflecting layer formed on the surface of the insulating layer, and a light reflecting layer plated on the metal layer exposed by the hole, and a die on the light reflecting layer. The present invention relates to an optical package and a method for manufacturing the same, comprising an optical device mounted by bonding and a connection part electrically connecting the optical device and a circuit pattern and a resin part to bury the optical device and the connection part. As a result, the package according to the conventional lead frame method may be formed into a package using a tape substrate, thereby reducing the volume and thickness of the entire package. In addition, it is possible to form a package of the surface emitting method in the point emission method is possible to produce a package of high integration. Furthermore, the light reflecting layer and the white reflecting layer can enhance the light efficiency.

Description

Optical package and manufacturing method {OPTICAL PACKAGE AND MANUFACTURING METHOD OF THE SAME}

The present invention relates to an optical package and a method for manufacturing the same, and more particularly, to an optical package and a method for manufacturing the same, which reduce the volume and thickness of the package, increase the degree of integration, and increase the light efficiency.

Light Emitting Diodes (LEDs) produce a small number of carriers (electrons or holes) injected using the pn junction structure of a semiconductor, and intermetallic compound junctions that emit light by converting electrical energy into light energy by recombination. Refers to a diode. In other words, when a forward voltage is applied to a semiconductor of a specific element, electrons and holes move through the junction of the anode and the cathode and recombine with each other, which is less energy than when the electrons and holes are separated. Release. Such LEDs are applied to a wide range of applications, such as not only general display devices but also lighting devices or backlight devices of LCD displays. In particular, LED has the advantage of low heat generation and long life due to high energy efficiency while being able to drive at a relatively low voltage, and most of the currently used technologies have been developed to provide high brightness of white light, which was difficult to implement in the past. It is expected to replace the light source device.

1A shows a cross-sectional view of an LED package according to one embodiment of the prior art. Referring to FIG. 1A, the LED package is configured to conduct conductive wires through bonding a gold wire 102 to a light emitting GaN chemical chip and to form heat sinks 10 at a lower portion thereof to allow heat emission. In addition, the external support and the LED package portion of the metal lead 20 through the wire bonding to the electricity and the structure that can shine. This structure forms a package for each individual chip 60.

Such a conventional LED package is in the form of a lead frame type package. However, the lead frame type has a high package utilization area, making it difficult to integrate LED chips, and the package size is relatively large compared to the chip size.

In addition, in order to dissipate the heat generated by the LED chip, a separate heat sink is required, thereby increasing thickness and volume.

1B shows a cross-sectional view of an LED package according to another embodiment of the prior art. Referring to FIG. 1B, a plastic lens 25 is used to increase linearity and light efficiency to light after applying a phosphor and a resin composite in an encapsulation process to protect the bonding of the wire 102. This acts as a cause of the limitation of the miniaturization of the LED package described above, and causes a cost problem in the process.

Therefore, there is a need for a technology capable of manufacturing LED packages that can be miniaturized at a lower cost and simplify the process.

The present invention has been made to solve the above-described problems, the object of the present invention is to reduce the volume of the optical package itself and reduce the thickness and the outer volume of the final product at a lower cost, as well as miniaturization and integration The present invention provides an optical package and a method of manufacturing the same, in which a metal layer serving as a heat sink and a support plate is plated with a light reflecting layer and a white reflecting layer is formed on the surface of the insulating layer to reduce light absorption to the insulating layer and increase light efficiency.

The configuration of the present invention provided to solve the above problems is a metal layer formed circuit pattern; An insulating layer formed on the metal layer and including a hole; A white reflective layer formed on the surface of the insulating layer; A light reflection layer plated on the metal layer exposed by the hole; An optical device mounted by die bonding on the light reflection layer and a connection part electrically connecting the optical device to a circuit pattern; Resin portion to fill the optical element and the connecting portion; provides a light package comprising a tape type insulating film without using a lead frame to realize the miniaturization and integration of the optical package, and the light reflection layer and the white reflection layer Through this, the light efficiency can be increased.

In particular, the white reflective layer may be printed on any one of a silver paste, a white solder resist, or a white epoxy.

The light reflecting layer may be plated on the back surface of the metal layer on which the insulating layer is laminated, and the light reflecting layer is preferably a light reflecting layer containing silver (Ag) or silver.

Here, the metal layer may be a copper (Cu) layer.

In addition, the insulating layer may be a polyimide film.

The resin unit may include a phosphor and a transparent resin as a convex lens shape.

In addition, the transparent resin may be made of silicon (Si).

An optical package manufacturing method according to the present invention, (a) forming a hole in the insulating layer; (b) laminating a metal layer under the insulating layer and forming a circuit pattern; (c) forming a white reflective layer on the surface of the insulating layer; (d) plating a light reflective layer on the metal layer exposed by the hole; (e) mounting an optical device on the light reflection layer and electrically connecting the optical device and a circuit pattern through a connection part; (f) forming a resin part to bury the optical device and the connection part.

In particular, step (c) is a step of forming a white reflective layer by applying any one of silver paste, white solder resist or white epoxy on the surface of the insulating layer. It is possible to increase the light efficiency.

In addition, the step (d) may further comprise the step of plating a light reflection layer on the back surface of the metal layer on which the insulating layer is laminated.

In addition, the step (d) may be characterized in that the step of forming a light reflecting layer containing silver (Ag) or silver.

In addition, the step (e) may be characterized in that the step of mounting the LED chip as an optical device and electrically connecting the LED chip and the circuit pattern using the gold (Au) wire as a connecting portion.

In addition, the step (f) may be characterized in that the step of forming a convex lens-shaped resin portion by over-coating a phosphor and a transparent resin (Resin).

According to the present invention, the volume and thickness of the entire package can be reduced by forming the package according to the conventional lead frame method into a package using a tape substrate. In addition, it is possible to form a package of the surface emitting method in the point emission method it is possible to produce a package of high integration. In addition, it is possible to increase the productivity by lowering the cost and simplifying the process by manufacturing the bag and the lens at the same time, and increase the light efficiency through the plated light reflecting layer and the white reflecting layer formed on the surface of the insulating layer.

1A is a cross-sectional view of an LED package according to one embodiment of the prior art.
1B is a cross-sectional view of an LED package according to another embodiment of the prior art.
2A is a cross-sectional view of a LED package according to an embodiment of the conventional method and an optical package according to an embodiment of the present invention.
2B is a top view of the polyimide surface and the circuit pattern portion of the optical package according to the embodiment of the present invention.
2C is a cross-sectional view of an optical package manufacturing process according to one embodiment of the present invention.
3 is a cross-sectional view and a top view showing the integration degree of the optical package according to the present invention and one embodiment of the present invention in more detail.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Therefore, the shapes and the like of the elements in the drawings are exaggerated in order to emphasize a clearer description, and elements denoted by the same symbols in the drawings denote the same elements.

2A is a comparative cross-sectional view of an LED package according to an embodiment of the conventional method and an optical package according to an embodiment of the present invention. As shown in FIG. 2A, in the structure of the present invention, a metal layer 120 having a circuit pattern is formed under an insulating layer 110 having holes 115 and 116 formed thereon, and a white layer is formed on the surface of the insulating layer 110. The reflective layer 130 is formed, and the light reflective layer 140 is plated on the metal layer 120 exposed by the holes 115 and 116. In this case, the insulating layer 110 is preferably a polyimide film, and the metal layer 120 is preferably a copper (Cu) layer. In addition, in the present invention, a white reflective layer 130 is formed on a surface of the insulating layer 110, that is, an upper surface and a side surface thereof, and the white reflective layer 130 includes a silver paste and a white solder resist. Or it is preferable to form by printing any one of a white epoxy. Since a general polyimide is brown or yellow based, it absorbs light rather than reflecting light, and thus, luminance is lowered. Therefore, the white reflective layer 130 is formed not only on the upper surface of the insulating layer 110 but on the side of the insulating layer 110. In this way, the luminance can be increased. In this case, the white reflective layer 130 may be formed such that an inclined surface exists to better reflect the light generated from the optical device 150 to the top. As described above, the white reflective layer 130 not only increases the light efficiency by serving as a reflective layer, but also plays a role of separating the barrier and the boundary when forming the resin part 170 thereafter. In addition, the light reflecting layer 140 may be plated with the light reflecting layer 140 on the metal layer 120 exposed by the holes 115 and 116, as shown in the figure, the metal layer 120 in which the insulating layer 110 is stacked. It is preferable to also be plated on the back surface of, and the plating of the light reflection layer 140 is preferably silver (Ag) plating. As such, by eliminating gold plating for wire bonding and forming a silver plating layer, luminance is improved, thermal conductivity is increased, and heat dissipation effect due to heat generated from the LED chip is increased. You can do it. In addition, the present invention is mounted to the LED chip as the optical device 150 on the light reflecting layer 140 to perform the bonding (Au) wire 160 for the electrical connection between the chip 150 and the circuit pattern It is preferable that the LED chip 150 and the wire 160 are formed in the form of a tape-type LED package that is embedded through the resin unit 170. In this case, the resin unit 170 is formed in a convex lens shape and includes a phosphor and a transparent resin (Resin), the transparent resin is preferably silicon (Si). Thus, the present invention can realize a miniaturized and integrated optical package through an insulating film in the form of a film and a lower circuit pattern layer without using a lower heat sink and a metal lead. In addition, the circuit pattern layer 120 is formed under the insulating layer 110 and the circuit pattern layer 120 serves as a heat sink as well as a circuit board. In addition, in the case of wire bonding, the bonding force is excellent due to the difference in RZ according to the roughness of the surface. 2B is a top view of a polyimide surface and a top view of a circuit pattern portion of the optical package according to the embodiment of the present invention. As shown in FIG. 2B, the top view of the conventional LED package (shown on the right side of FIG. 2A) shows much better integration.

2C is a cross-sectional view of an optical package manufacturing process according to an embodiment of the present invention. Referring to FIG. 2C, first, holes 115 and 116 are formed by punching the insulating film 110 (S2). In this case, the insulating film 110 is preferably a polyimide film, and the holes 115 and 116 supply power to the device hole 115 and the optical device 150, which are central holes in which the optical device is to be located. In order to include the via hole 116 to which the wire is to be bonded as the connection portion 160. In addition, the metal layer 120 is laminated, but the metal layer 120 is preferably copper (Cu) (S3). Then, after activating the surface through various chemical treatments, a photoresist is applied, and an exposure and development process are performed. After the development process is completed, the circuit pattern layer 120 is formed by forming a necessary circuit through the etching process and peeling off the photoresist. In addition, the white reflective layer 130 is formed on the side surface as well as the upper surface of the insulating layer 110 (S4). In general, the polyimide is electrically stable, but the color is brown or yellow, and the reflectance is not good, and thus the light efficiency is lowered. Therefore, the polyimide is coated with a color through the white reflective layer 130 to increase the light efficiency. 130 is preferably printed by applying any one of silver paste, white solder resist, or white epoxy, which is not a general green solder resist. In this case, unlike the drawing, the white reflective layer 130 may be formed such that an inclined surface exists to reflect the light generated from the optical device 150 upward. Thereafter, the lower via holes 115 and 116, that is, the metal layer 120 exposed by the holes are plated to form the light reflection layer 140, thereby performing surface treatment to enable bonding (S5). In this case, as shown in the drawing, the light reflecting layer 140 may be plated on a circuit surface that is the back surface of the metal layer 120 on which the insulating layer 110 is stacked. In addition, the plating of the light reflection layer 140 is preferably silver (Ag) plating. By removing the gold (Au) plating in this way it is possible to reduce the light absorption to the polyimide film 110 and increase the light efficiency. Next, the optical device 150 is mounted by die bonding on the plated light reflecting layer 140 where the optical device 150 is to be located among the via holes formed in the insulating layer 110 (S6). It is preferable that the element 150 mounts a chip using an adhesive agent as an LED chip. Subsequently, bonding is performed by bonding gold (Au) wire 160 to the silver-plated light reflecting layer 140 to electrically connect the circuit pattern layer 120 and the LED chip 150 (S7). The resin part 170 is formed to bury the 150 and the wire 160 (S8). More specifically, the optical package is completed by forming a convex lens-shaped resin part 170 by over-coating a phosphor and a transparent resin prepared for a white LED at the boundary of the white solder resist. In the case of over-coating the phosphor and the transparent resin, the resin portion 170 of the convex lens formation as shown is formed due to the surface tension. As a result, an existing encapsulation and a plastic lens can be simultaneously formed.

3 is a cross-sectional view and a top view illustrating the integration degree of the optical package according to the present invention and one embodiment of the present invention in more detail. Referring to FIG. 3, when the package is formed based on the same area, the present invention on the right side is much larger than the LED chip arrangement on the left side having the structure of the metal lead portion 20 and the lower heat sink 10. LED package is formed.

The best embodiments have been disclosed in the drawings and specification above. Although specific terms have been used herein, they are used only for the purpose of describing the present invention and are not used to limit the scope of the present invention as defined in the meaning or claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

10: heat sink 20: metal lead portion
30: stitch bond 40: silicon sub-mount
50: ball bond 60: LED chip
70: solder ball 90: electrically / thermally conductive epoxy
102: gold wire 110: insulating layer
115: device hole 116: via hole
120: metal layer 130: white reflective layer
140: light reflection layer 150: optical element
160: gold wire 170: resin part

Claims (14)

A metal layer on which a circuit pattern is formed;
An insulating layer formed on the metal layer and including a hole;
A white reflective layer formed on the surface of the insulating layer;
A light reflection layer plated on the metal layer exposed by the hole;
An optical device mounted by die bonding on the light reflection layer and a connection part electrically connecting the optical device to a circuit pattern;
A resin part filling the optical element and the connection part;
Optical package comprising a.
The method according to claim 1,
The white reflective layer,
An optical package comprising any one of silver paste, white solder resist, and white epoxy.
The method according to claim 1 or 2,
The light reflection layer,
And the insulating layer is plated on the back surface of the stacked metal layer.
The method according to claim 3,
The light reflection layer,
An optical package which is a light reflecting layer containing silver (Ag) or silver.
The method according to claim 1 or 2,
The metal layer,
An optical package, characterized in that the copper (Cu) layer.
The method according to claim 1 or 2,
The insulating layer,
Optical package, characterized in that the polyimide film (polyimide film).
The method according to claim 1 or 2,
The resin portion,
An optical package comprising a phosphor and a transparent resin as a convex lens shape.
The method according to claim 7,
The transparent resin is a material of the optical package, characterized in that the silicon (Si).
(a) forming a hole in the insulating layer;
(b) laminating a metal layer under the insulating layer and forming a circuit pattern;
(c) forming a white reflective layer on the surface of the insulating layer;
(d) plating a light reflective layer on the metal layer exposed by the hole;
(e) mounting an optical device on the light reflection layer and electrically connecting the optical device and a circuit pattern through a connection part;
(f) forming a resin part to fill the optical element and the connection part;
Optical package manufacturing method comprising a.
The method according to claim 9,
In step (c),
The method of manufacturing an optical package, characterized in that to form a white reflective layer by applying any one of silver paste, white solder resist or white epoxy on the surface of the insulating layer.
The method according to claim 9 or 10,
In step (d),
And plating a light reflecting layer on the back surface of the metal layer on which the insulating layer is stacked.
The method of claim 11,
In step (d),
Forming a light reflection layer containing silver (Ag) or silver, The optical package manufacturing method characterized by the above-mentioned.
The method according to claim 9 or 10,
In step (e),
Mounting an LED chip as an optical element and electrically connecting the LED chip and a circuit pattern using a gold (Au) wire as a connection part.
The method according to claim 9 or 10,
The step (f)
An optical package manufacturing method, characterized in that the step of forming a convex lens-shaped resin portion by over-coating a phosphor and a transparent resin (Resin).
KR1020100042045A 2010-04-28 2010-05-04 Optical package and manufacturing method of the same KR101146659B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020100042045A KR101146659B1 (en) 2010-05-04 2010-05-04 Optical package and manufacturing method of the same
TW99133993A TWI472067B (en) 2010-04-28 2010-10-06 Optical package and method of manufacturing the same
PCT/KR2010/006895 WO2011136446A1 (en) 2010-04-28 2010-10-08 Optical package and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020100042045A KR101146659B1 (en) 2010-05-04 2010-05-04 Optical package and manufacturing method of the same

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KR20110122495A true KR20110122495A (en) 2011-11-10
KR101146659B1 KR101146659B1 (en) 2012-05-22

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014196833A1 (en) * 2013-06-07 2014-12-11 서울반도체 주식회사 Light-emitting device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4205135B2 (en) * 2007-03-13 2009-01-07 シャープ株式会社 Semiconductor light emitting device, multiple lead frame for semiconductor light emitting device
KR100853963B1 (en) * 2007-04-12 2008-08-25 주식회사 이츠웰 Very high current smd led lamp using pcb

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014196833A1 (en) * 2013-06-07 2014-12-11 서울반도체 주식회사 Light-emitting device

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