KR20110002641A - 초저 표면거칠기를 갖는 강유전성 pvdf/pmma 박막의 제조방법 및 상기 박막을 적용한 비휘발성 메모리 디바이스의 제조방법 - Google Patents
초저 표면거칠기를 갖는 강유전성 pvdf/pmma 박막의 제조방법 및 상기 박막을 적용한 비휘발성 메모리 디바이스의 제조방법 Download PDFInfo
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- KR20110002641A KR20110002641A KR1020090060214A KR20090060214A KR20110002641A KR 20110002641 A KR20110002641 A KR 20110002641A KR 1020090060214 A KR1020090060214 A KR 1020090060214A KR 20090060214 A KR20090060214 A KR 20090060214A KR 20110002641 A KR20110002641 A KR 20110002641A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6684—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a ferroelectric gate insulator
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
Claims (12)
- PVDF와 PMMA의 혼합박막을 제조함에 있어서, PVDF(poly(vinylidene fluoride))와 PMMA(poly(methylmethacrylate))의 혼합용액을 스핀코팅하는 단계(I); 상기 스핀코팅된 박막을 PVDF와 PMMA의 융점 이상의 온도에서 용융하는 단계(II); 상기 용융된 박막을 퀀칭(quenching)하는 단계(III); 및 상기 퀀칭된 박막을 열적 어닐링하는 단계(IV)를 포함하는 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 제조방법.
- 제1항에서, PMMA의 혼합비율은 상기 PVDF와 PMMA의 혼합 총 중량 중 10 ~ 20중량%인 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 제조방법.
- 제1항에서, 상기 단계(II)의 용융온도가 170 ~ 300℃ 사이인 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 제조방법.
- 제1항에서, 상기 단계(III)의 퀀칭온도가 0℃ 이하인 것을 특징으로 하는 초 저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 제조방법.
- 제1항에서, 상기 단계(IV)의 어닐링온도가 100 ~ 155℃ 사이인 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 제조방법.
- 제1항에서, 상기 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 RMS 표면거칠기(Root Mean Square Roughness)가 0.1 ~ 2 nm인 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 제조방법.
- 제1항에서, 상기 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막에서 β 결정분율이 90% 이상인 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 제조방법.
- 제1항에서, 상기 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 두께가 100~ 200 nm인 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막의 제조방법.
- 상부전극/강유전체/하부전극으로 이루어진 커패시터의 제조방법에 있어서, 하부전극 위에 PVDF(poly(vinylidene fluoride))와 PMMA(poly(methylmethacrylate))의 혼합용액을 스핀코팅하는 단계(I); 상기 스핀코팅된 박막을 PVDF와 PMMA의 융점 이상의 온도에서 용융하는 단계(II); 상기 용융된 박막을 퀀칭(quenching)하는 단계(III); 상기 퀀칭된 박막을 어닐링하는 단계(IV); 및 상부전극을 형성하는 단계(V)를 포함하는 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막을 적용한 커패시터의 제조방법.
- 제9항에서, 상기 단계(V)의 상부전극의 형성은 증착에 의하여 형성하는 것을 특징으로 하는 초저 표면거칠기를 갖는 강유전성 PVDF/PMMA 박막을 적용한 커패시터의 제조방법.
- 게이트전극과, 상기 게이트전극 상부의 PVDF/PMMA 게이트 절연층과, 상기 게이트 절연층 상부의 단결정 TIPS-PEN 반도체층과, 상기 반도체층 상부의 소스전극 및 드레인전극을 갖는 전계효과트랜지스터(FeFET, Ferroelectric Field Effect Transistor)의 제조방법에 있어서, 상기 게이트전극 위에 PVDF(poly(vinylidene fluoride))와 PMMA(poly(methylmethacrylate))의 혼합용액을 스핀코팅하는 단계(I); 상기 스핀코팅된 박막을 PVDF와 PMMA의 융점 이상의 온도에서 용융하는 단계(II); 상기 용융된 박막을 퀀칭(quenching)하는 단계(III); 및 상기 퀀칭된 박막을 어닐링하는 단계(IV)를 포함하여 PVDF/PMMA 게이트 절연층을 제조하는 것을 특징으로 하는 전계효과트랜지스터의 제조방법.
- 제11항에서, 상기 게이트전극에 PVDF/PMMA 게이트 절연층을 형성하기 전에 상기 게이트전극 위에 스핀코팅을 통하여 PVP(poly(vinyl pyrrolidone))층을 먼저 형성하는 단계를 더 갖는 것을 특징으로 하는 전계효과트랜지스터의 제조방법.
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20140002854A (ko) * | 2012-06-27 | 2014-01-09 | 한밭대학교 산학협력단 | 유기절연막 조성물, 유기절연막의 형성방법, 및 상기 유기절연막을 포함하는 유기박막트랜지스터 |
CN105932205A (zh) * | 2016-07-11 | 2016-09-07 | 四川理工学院 | 一种高强度纳米网络状纤维膜的制备方法 |
KR20170034435A (ko) * | 2014-09-12 | 2017-03-28 | 사빅 글로벌 테크놀러지스 비.브이. | 앰비언트-로버스트 용액을 이용한 나노단위 유기적 강유전체 막의 제조방법 |
CN112391018A (zh) * | 2020-11-03 | 2021-02-23 | 华中科技大学 | 一种三元共混的高储能聚合物基介电薄膜及其制备方法 |
CN114989464A (zh) * | 2022-06-02 | 2022-09-02 | 华东师范大学 | 一种pvdf/pmma复合薄膜及其制备方法 |
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2009
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20140002854A (ko) * | 2012-06-27 | 2014-01-09 | 한밭대학교 산학협력단 | 유기절연막 조성물, 유기절연막의 형성방법, 및 상기 유기절연막을 포함하는 유기박막트랜지스터 |
KR20170034435A (ko) * | 2014-09-12 | 2017-03-28 | 사빅 글로벌 테크놀러지스 비.브이. | 앰비언트-로버스트 용액을 이용한 나노단위 유기적 강유전체 막의 제조방법 |
CN105932205A (zh) * | 2016-07-11 | 2016-09-07 | 四川理工学院 | 一种高强度纳米网络状纤维膜的制备方法 |
CN112391018A (zh) * | 2020-11-03 | 2021-02-23 | 华中科技大学 | 一种三元共混的高储能聚合物基介电薄膜及其制备方法 |
CN114989464A (zh) * | 2022-06-02 | 2022-09-02 | 华东师范大学 | 一种pvdf/pmma复合薄膜及其制备方法 |
CN114989464B (zh) * | 2022-06-02 | 2024-02-13 | 华东师范大学 | 一种pvdf/pmma复合薄膜及其制备方法 |
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