KR20080096278A - 인쇄회로기판 및 그 제조 방법 - Google Patents
인쇄회로기판 및 그 제조 방법 Download PDFInfo
- Publication number
- KR20080096278A KR20080096278A KR1020070041536A KR20070041536A KR20080096278A KR 20080096278 A KR20080096278 A KR 20080096278A KR 1020070041536 A KR1020070041536 A KR 1020070041536A KR 20070041536 A KR20070041536 A KR 20070041536A KR 20080096278 A KR20080096278 A KR 20080096278A
- Authority
- KR
- South Korea
- Prior art keywords
- insulating layer
- circuit pattern
- printed circuit
- thickness
- circuit board
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09845—Stepped hole, via, edge, bump or conductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09972—Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0228—Cutting, sawing, milling or shearing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laser Beam Processing (AREA)
Abstract
Description
Claims (6)
- 회로패턴층과 절연층을 교대로 적층하되, 일부 영역의 소정의 두께는절연층만으로 적층된 다층기판을 형성하는 단계: 및상기 다층기판의 상기 일부 영역의 상기 절연층을 제거하는 단계를 포함하는 인쇄회로기판의 제조방법
- 제1항에 있어서,상기 일부 영역의 상기 절연층을 제거하는 단계는 기계적인 방법으로 이루어지는 것을 특징으로 하는 인쇄회로기판의 제조방법.
- 제2항에 있어서,상기 기계적인 방법은 밀링머신으로 이루어지는 인쇄회로기판의 제조방법.
- 제1항에 있어서,상기 일부영역의 절연층을 제거하는 단계는, 기계적인 방법으로 상기 소정의 두께의 일부 두께를 제거하는 단계; 및레이져를 이용하여 상기 소정의 두께의 나머지 두께를 제거하여 회로패턴층이 드러나도록 하는 단계를 포함하는 인쇄회로기판의 제조방법.
- 제4항에 있어서,상기 레이져는 이산화탄소 레이져인 것을 특징으로 하는 인쇄회로기판의 제조방법.
- 절연층과 회로패턴층으로 이루어진 제1 다층기판과;상기 제1 기판부 상면에 일부 영역에만 회로패턴층과 절연층이 적층된 제2 다층기판을 포함하는 인쇄회로기판.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070041536A KR100885899B1 (ko) | 2007-04-27 | 2007-04-27 | 인쇄회로기판 및 그 제조 방법 |
JP2007291253A JP2008277732A (ja) | 2007-04-27 | 2007-11-08 | 印刷回路基板及びその製造方法 |
CN2007101879919A CN101296569B (zh) | 2007-04-27 | 2007-11-16 | 印刷电路板及其制造方法 |
US12/007,127 US7665206B2 (en) | 2007-04-27 | 2008-01-07 | Printed circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070041536A KR100885899B1 (ko) | 2007-04-27 | 2007-04-27 | 인쇄회로기판 및 그 제조 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20080096278A true KR20080096278A (ko) | 2008-10-30 |
KR100885899B1 KR100885899B1 (ko) | 2009-02-26 |
Family
ID=39885650
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020070041536A KR100885899B1 (ko) | 2007-04-27 | 2007-04-27 | 인쇄회로기판 및 그 제조 방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7665206B2 (ko) |
JP (1) | JP2008277732A (ko) |
KR (1) | KR100885899B1 (ko) |
CN (1) | CN101296569B (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109848567A (zh) * | 2019-01-30 | 2019-06-07 | 无锡深南电路有限公司 | 一种封装基板的镭射铣边设备和方法 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011105346A1 (de) | 2011-06-21 | 2012-12-27 | Schweizer Electronic Ag | Elektronische Baugruppe und Verfahren zu deren Herstellung |
DE102012203318A1 (de) * | 2011-12-22 | 2013-06-27 | Rohde & Schwarz Gmbh & Co. Kg | Verfahren zum Freilegen einer Schicht einer Leiterplatte und entsprechend freigelegte Leiterplatte |
US9648744B2 (en) * | 2012-07-24 | 2017-05-09 | Apple Inc. | Ejectable component assemblies in electronic devices |
CN203072246U (zh) * | 2012-12-31 | 2013-07-17 | 奥特斯(中国)有限公司 | 用于生产印制电路板的半成品 |
US10219384B2 (en) | 2013-11-27 | 2019-02-26 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Circuit board structure |
AT515101B1 (de) | 2013-12-12 | 2015-06-15 | Austria Tech & System Tech | Verfahren zum Einbetten einer Komponente in eine Leiterplatte |
AT515447B1 (de) | 2014-02-27 | 2019-10-15 | At & S Austria Tech & Systemtechnik Ag | Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte |
US11523520B2 (en) | 2014-02-27 | 2022-12-06 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Method for making contact with a component embedded in a printed circuit board |
KR101720264B1 (ko) | 2015-09-04 | 2017-04-03 | 대덕전자 주식회사 | 회로기판 제조방법 |
CN112038243B (zh) * | 2020-09-10 | 2022-11-04 | 英华达(上海)科技有限公司 | 集成电路封装方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4800461A (en) * | 1987-11-02 | 1989-01-24 | Teledyne Industries, Inc. | Multilayer combined rigid and flex printed circuits |
JP2601182B2 (ja) * | 1994-03-31 | 1997-04-16 | 日本電気株式会社 | マイクロ波回路の多層回路基板 |
JPH07336055A (ja) * | 1994-06-06 | 1995-12-22 | Hitachi Seiko Ltd | レーザ加工方法及びその装置 |
DE69626747T2 (de) * | 1995-11-16 | 2003-09-04 | Matsushita Electric Ind Co Ltd | Gedruckte Leiterplatte und ihre Anordnung |
JP3400634B2 (ja) * | 1996-02-28 | 2003-04-28 | 富士通株式会社 | プリント基板の配線パターン改造方法およびプリント基板の配線パターンの切断方法 |
JP2001244606A (ja) * | 2000-03-01 | 2001-09-07 | Cmk Corp | 積層基板の孔明け方法 |
JP2006019441A (ja) * | 2004-06-30 | 2006-01-19 | Shinko Electric Ind Co Ltd | 電子部品内蔵基板の製造方法 |
JP2007080976A (ja) * | 2005-09-12 | 2007-03-29 | Shinko Electric Ind Co Ltd | 多層回路基板及びその製造方法ならびに電子部品パッケージ |
CN1761378A (zh) * | 2005-09-20 | 2006-04-19 | 沪士电子股份有限公司 | 直接co2激光钻孔方法 |
JP2007088058A (ja) * | 2005-09-20 | 2007-04-05 | Denso Corp | 多層基板、及びその製造方法 |
-
2007
- 2007-04-27 KR KR1020070041536A patent/KR100885899B1/ko active IP Right Grant
- 2007-11-08 JP JP2007291253A patent/JP2008277732A/ja active Pending
- 2007-11-16 CN CN2007101879919A patent/CN101296569B/zh active Active
-
2008
- 2008-01-07 US US12/007,127 patent/US7665206B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109848567A (zh) * | 2019-01-30 | 2019-06-07 | 无锡深南电路有限公司 | 一种封装基板的镭射铣边设备和方法 |
Also Published As
Publication number | Publication date |
---|---|
US20080264687A1 (en) | 2008-10-30 |
JP2008277732A (ja) | 2008-11-13 |
CN101296569A (zh) | 2008-10-29 |
KR100885899B1 (ko) | 2009-02-26 |
CN101296569B (zh) | 2011-09-21 |
US7665206B2 (en) | 2010-02-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100885899B1 (ko) | 인쇄회로기판 및 그 제조 방법 | |
US20150022982A1 (en) | Wiring board and method for manufacturing the same | |
KR101084250B1 (ko) | 전자소자 내장 인쇄회로기판 및 그 제조 방법 | |
US7789989B2 (en) | Method for manufacturing rigid-flexible printed circuit board | |
US9504169B2 (en) | Printed circuit board having embedded electronic device and method of manufacturing the same | |
US20070287281A1 (en) | Circuit carrier and manufacturing process thereof | |
US20130256007A1 (en) | Wiring board with built-in electronic component and method for manufacturing the same | |
WO2014162478A1 (ja) | 部品内蔵基板及びその製造方法 | |
US20150040389A1 (en) | Method for manufacturing wiring board with built-in electronic component | |
US20180061555A1 (en) | Inductor and method of manufacturing the same | |
US20140182899A1 (en) | Rigid-flexible printed circuit board and method for manufacturing same | |
JP2013183029A (ja) | 電子部品内蔵配線板及びその製造方法 | |
US8083954B2 (en) | Method for fabricating component-embedded printed circuit board | |
KR20160064386A (ko) | 연성 인쇄회로기판 및 그 제조방법 | |
KR20090123032A (ko) | 반도체 칩 내장형 인쇄회로기판 제조 방법 | |
KR101872525B1 (ko) | 인쇄회로기판 및 그 제조 방법 | |
KR101283164B1 (ko) | 인쇄회로기판 및 그의 제조 방법 | |
JP2007081274A (ja) | フレキシブル回路用基板 | |
JP2013183028A (ja) | 電子部品内蔵配線板、チップコンデンサ、及び電子部品内蔵配線板の製造方法 | |
KR102119604B1 (ko) | 연성 인쇄회로기판 및 그 제조방법 | |
US20130146337A1 (en) | Multi-layered printed circuit board and manufacturing method thereof | |
JP5409480B2 (ja) | 配線基板の製造方法 | |
KR101262534B1 (ko) | 인쇄회로기판 및 그의 제조 방법 | |
KR20120035634A (ko) | 인쇄회로기판 제조 방법 | |
KR100952640B1 (ko) | 인쇄회로기판 및 그 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20130111 Year of fee payment: 5 |
|
FPAY | Annual fee payment |
Payment date: 20131224 Year of fee payment: 6 |
|
FPAY | Annual fee payment |
Payment date: 20150202 Year of fee payment: 7 |
|
FPAY | Annual fee payment |
Payment date: 20170102 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20180102 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20190103 Year of fee payment: 11 |
|
FPAY | Annual fee payment |
Payment date: 20200102 Year of fee payment: 12 |