KR20080080571A - 대면적의 반도체-온-글래스 인슐레이터 - Google Patents

대면적의 반도체-온-글래스 인슐레이터 Download PDF

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Publication number
KR20080080571A
KR20080080571A KR1020087015144A KR20087015144A KR20080080571A KR 20080080571 A KR20080080571 A KR 20080080571A KR 1020087015144 A KR1020087015144 A KR 1020087015144A KR 20087015144 A KR20087015144 A KR 20087015144A KR 20080080571 A KR20080080571 A KR 20080080571A
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KR
South Korea
Prior art keywords
layer
semiconductor
glass substrate
semiconductor layer
exfoliation
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KR1020087015144A
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English (en)
Korean (ko)
Inventor
키숄 피. 가드카리
알렉산드레 엠. 메이올렛
Original Assignee
코닝 인코포레이티드
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Application filed by 코닝 인코포레이티드 filed Critical 코닝 인코포레이티드
Publication of KR20080080571A publication Critical patent/KR20080080571A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
KR1020087015144A 2005-11-22 2006-10-26 대면적의 반도체-온-글래스 인슐레이터 Withdrawn KR20080080571A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US73963105P 2005-11-22 2005-11-22
US60/739,631 2005-11-22
US11/517,908 2006-09-08
US11/517,908 US7691730B2 (en) 2005-11-22 2006-09-08 Large area semiconductor on glass insulator

Publications (1)

Publication Number Publication Date
KR20080080571A true KR20080080571A (ko) 2008-09-04

Family

ID=37636113

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020087015144A Withdrawn KR20080080571A (ko) 2005-11-22 2006-10-26 대면적의 반도체-온-글래스 인슐레이터

Country Status (5)

Country Link
US (2) US7691730B2 (https=)
EP (1) EP1955371A1 (https=)
JP (1) JP2009516929A (https=)
KR (1) KR20080080571A (https=)
WO (1) WO2007061563A1 (https=)

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WO2013002227A1 (ja) 2011-06-30 2013-01-03 シャープ株式会社 半導体基板の製造方法、半導体基板作成用基板、積層基板、半導体基板、及び電子デバイス
JP5725430B2 (ja) * 2011-10-18 2015-05-27 富士電機株式会社 固相接合ウエハの支持基板の剥離方法および半導体装置の製造方法
US9041147B2 (en) 2012-01-10 2015-05-26 Sharp Kabushiki Kaisha Semiconductor substrate, thin film transistor, semiconductor circuit, liquid crystal display apparatus, electroluminescent apparatus, semiconductor substrate manufacturing method, and semiconductor substrate manufacturing apparatus
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Also Published As

Publication number Publication date
US20070117354A1 (en) 2007-05-24
US7691730B2 (en) 2010-04-06
EP1955371A1 (en) 2008-08-13
JP2009516929A (ja) 2009-04-23
US20100112784A1 (en) 2010-05-06
WO2007061563A1 (en) 2007-05-31

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