KR20080079226A - 전류 입력 adc내의 전하 밸런싱 방법 - Google Patents
전류 입력 adc내의 전하 밸런싱 방법 Download PDFInfo
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- KR20080079226A KR20080079226A KR1020080017358A KR20080017358A KR20080079226A KR 20080079226 A KR20080079226 A KR 20080079226A KR 1020080017358 A KR1020080017358 A KR 1020080017358A KR 20080017358 A KR20080017358 A KR 20080017358A KR 20080079226 A KR20080079226 A KR 20080079226A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
- H03M1/0607—Offset or drift compensation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45183—Long tailed pairs
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
- H03F3/45744—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction
- H03F3/45766—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction by using balancing means
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/264—An operational amplifier based integrator or transistor based integrator being used in an amplifying circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45136—One differential amplifier in IC-block form being shown
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45212—Indexing scheme relating to differential amplifiers the differential amplifier being designed to have a reduced offset
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45342—Indexing scheme relating to differential amplifiers the AAC comprising control means on a back gate of the AAC
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45352—Indexing scheme relating to differential amplifiers the AAC comprising a combination of a plurality of transistors, e.g. Darlington coupled transistors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Amplifiers (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Description
Claims (7)
- 전류 입력 ADC 내의 전하 밸런싱(charge balancing)을 위한 방법으로서, 상기 전류 입력 ADC는 적분기 출력 노드에서 적분기 출력 전압을 제공하는 적분기 및 복수 개의 능동 장치 스위치들에 의하여 형성되는 전하 밸런싱 변조기를 포함하고, 상기 변조기는 능동 장치 스위치에 의하여 교번적(alternate) 적분 및 자동-영점 조정 페이즈(autozero phase)들에서 동작하도록 구성되는 방법에 있어서,상기 적분기 출력 노드에서, 상기 적분기 출력 전압으로부터 독립적이고 상기 전류 입력 ADC의 동작 조건을 변경시키지 않는 낮은 커패시턴스 값을 유지하는 단계;상기 변조기의 상기 자동-영점 조정 페이즈의 종료시에, 상기 적분기 출력 노드에서 제1 능동 장치 스위치에 의하여 제1 전압 극성을 가지고 제1 크기를 가지는 제1 전압 페데스털(voltage pedestal)을 생성하는 단계;상기 변조기의 상기 적분 페이즈의 종료시에, 상기 적분기 출력 노드에서 제2 능동 장치 스위치에 의하여 상기 제1 전압 극성과 반대인 제2 전압 극성을 가지고 상기 제1 크기를 가지는 제2 전압 페데스털을 생성하는 단계; 및상기 적분기 출력 노드에서 상기 제1 전압 페데스털을 상기 제2 전압 페데스털과 합산하는 단계로서, 상기 제1 전압 페데스털 및 상기 제2 전압 페데스털 간의 차이가 순수 전압 에러를 야기하는 단계를 포함하며,상기 제1 및 제2 전압 페데스털들은 상기 전류 입력 ADC 및 상기 두 개의 전 압 페데스털들의 모든 동작 조건에서 동일한 제1 크기를 가지고, 상기 두 개의 전압 페데스털들은 상쇄되어 적분기 출력 전압에서 거의 0인 순수 전압 에러를 제공하는 것을 특징으로 하는 전류 입력 ADC 내의 전하 밸런싱 방법.
- 제1항에 있어서, 상기 적분기 출력 노드에서 낮은 커패시턴스 값을 유지하는 상기 단계는,저입력 커패시턴스 버퍼 회로를 제공하는 단계; 및상기 버퍼 회로의 입력 단자를 적분기 출력 단자에 연결하는 단계를 포함하며,상기 버퍼 회로는 저입력 커패시턴스를 가지고, 상기 입력 커패시턴스는 상기 적분기 출력 전압으로부터 독립적이고 상기 전류 입력 ADC의 동작 조건의 변화에 따라서 변경되지 않는 것을 특징으로 하는 전류 입력 ADC 내의 전하 밸런싱 방법.
- 제1항에 있어서,상기 동작 조건은, 제조 공정, 온도 및 파워 서플라이 전압 변화 중 어느 하나를 포함하는 것을 특징으로 하는 전류 입력 ADC 내의 전하 밸런싱 방법.
- 제2항에 있어서,상기 동작 조건은, 제조 공정, 온도 및 파워 서플라이 전압 변화 중 어느 하 나를 포함하는 것을 특징으로 하는 전류 입력 ADC 내의 전하 밸런싱 방법.
- 제1항에 있어서,상기 제1 전압 페데스털은 음의 값으로 변화하는(negative going) 전압 페데스털을 포함하고, 상기 제2 전압 페데스털은 양의 값으로 변화하는 전압 페데스털을 포함하는 것을 특징으로 하는 전류 입력 ADC 내의 전하 밸런싱 방법.
- 제1항에 있어서, 제1 능동 장치 스위치에서 제1 전압 페데스털을 생성하는 상기 단계는,상기 자동-영점 조정 페이즈의 종료시에 상기 제1 능동 장치 스위치를 개방하는 단계; 및상기 제1 능동 장치 스위치의 채널 전하를 분배(dividing)하는 단계를 포함하며,분배된 채널 전하의 일부는 상기 제1 전압 페데스털로서 상기 적분기의 출력 단자에 연결되는 것을 특징으로 하는 전류 입력 ADC 내의 전하 밸런싱 방법.
- 제1항에 있어서, 제2 능동 장치 스위치에서 제2 전압 페데스털을 생성하는 상기 단계는,상기 적분 페이즈의 종료시에 상기 제2 능동 장치 스위치를 개방하는 단계; 및상기 제2 능동 장치 스위치의 채널 전하를 분배하는 단계를 포함하며,분배된 채널 전하의 일부는 상기 제2 전압 페데스털로서 상기 적분기의 출력 단자에 연결되는 것을 특징으로 하는 전류 입력 ADC 내의 전하 밸런싱 방법.
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US11/679,070 | 2007-02-26 | ||
US11/679,070 US7372392B1 (en) | 2007-02-26 | 2007-02-26 | Charge balancing method in a current input ADC |
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KR20080079226A true KR20080079226A (ko) | 2008-08-29 |
KR100995314B1 KR100995314B1 (ko) | 2010-11-19 |
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US (1) | US7372392B1 (ko) |
JP (1) | JP4533438B2 (ko) |
KR (1) | KR100995314B1 (ko) |
CN (1) | CN101394182B (ko) |
DE (1) | DE102008010952B4 (ko) |
TW (1) | TWI350056B (ko) |
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WO2006034311A2 (en) * | 2004-09-20 | 2006-03-30 | The Trustees Of Columbia University In The City Of New York | Low voltage track and hold circuits |
WO2006108452A1 (en) * | 2005-04-15 | 2006-10-19 | Semtech Neuchâtel SA | Electronic circuit for the analog-to-digital conversion of an analog input signal |
FR2914427B1 (fr) * | 2007-03-30 | 2010-04-30 | Commissariat Energie Atomique | Dispositif de mesure d'une charge electrique sous forme numerisee. |
TWI402492B (zh) * | 2010-05-25 | 2013-07-21 | Univ Nat Chiao Tung | 電流式雙斜率溫度數位轉換裝置 |
WO2012002496A1 (ja) * | 2010-07-01 | 2012-01-05 | パナソニック電工株式会社 | 対象物検出装置 |
CZ2011757A3 (cs) | 2011-11-22 | 2013-05-29 | Sithold S.R.O | Zarízení pro udrzování a zmenu tlaku v pneumatice |
CN102832938A (zh) * | 2012-09-03 | 2012-12-19 | 江苏国石半导体有限公司 | 一种电流输入的adc电路 |
US8981437B2 (en) * | 2012-11-15 | 2015-03-17 | Kenton Veeder | Wide bias background subtraction pixel front-end with short protection |
US9407478B1 (en) | 2015-08-27 | 2016-08-02 | Telefonaktiebolaget Lm Ericsson (Publ) | Low power and area bootstrapped passive mixer with shared capacitances |
US9401727B1 (en) | 2015-08-27 | 2016-07-26 | Telefonaktiebolaget Lm Ericsson (Publ) | Shared circuit configurations for bootstrapped sample and hold circuits in a time-interleaved analog to digital converter |
KR101912032B1 (ko) | 2017-01-24 | 2018-10-25 | 주식회사 인터메트릭스 | 전류 버퍼의 출력 전류를 디지털 코드로 변환하는 장치 및 방법 |
US10193507B1 (en) * | 2017-07-31 | 2019-01-29 | Analog Devices Global | Current switching circuit |
EP3729659B1 (en) * | 2017-12-21 | 2023-05-31 | ams International AG | Method to operate an optical sensor arrangement with improved conversion accuracy and optical sensor arrangement |
CN111865307B (zh) * | 2020-07-09 | 2022-03-01 | 同济大学 | 噪声整形模数转换器 |
US20230115156A1 (en) * | 2021-10-07 | 2023-04-13 | Alexander Lopez | Systems, Devices, and/or Methods for Making Cast Articles |
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JP2000196453A (ja) | 1998-12-24 | 2000-07-14 | Rohm Co Ltd | A−d変換器 |
JP4074023B2 (ja) | 1999-01-26 | 2008-04-09 | 富士通株式会社 | 半導体集積回路 |
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DE102008010952B4 (de) | 2020-11-26 |
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CN101394182A (zh) | 2009-03-25 |
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US7372392B1 (en) | 2008-05-13 |
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