KR20080057034A - Liquid crystal display device and method of fabricating the same - Google Patents

Abstract

An LCD(Liquid Crystal Display) and a manufacturing method thereof are provided to form an etch stopper and an active pattern at one time by using a mask process without using a diffraction mask. A gate electrode(121) and a gate line(116') are formed on the first substrate. The first insulating layer is formed on the first substrate. An active pattern is formed on the upper portion of the gate electrode. An etch stopper(150') with an inverse tape shape is formed on the upper portion of the active pattern and constructed as the second insulating layer. Source and drain electrodes(122,123) are connected with the source and drain areas of the active pattern electrically. The third insulating layer is formed on the first substrate and has the first and second contact holes. A pixel electrode(118) is connected with the drain electrode electrically through the first contact hole. The first and second substrates are bonded with each other.

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME}

1 is an exploded perspective view schematically showing a general liquid crystal display device.

2A to 2F are cross-sectional views sequentially showing a manufacturing process of an array substrate in the liquid crystal display shown in FIG.

3 is a plan view schematically illustrating a portion of an array substrate of a liquid crystal display according to a first exemplary embodiment of the present invention.

4A through 4E are cross-sectional views sequentially illustrating a manufacturing process along line III-III ′ of the array substrate illustrated in FIG. 3.

5A to 5D are cross-sectional views illustrating the second mask process shown in FIG. 4B in detail.

6A through 6E are cross-sectional views sequentially illustrating a process of manufacturing an array substrate of a liquid crystal display according to a second exemplary embodiment of the present invention.

7A to 7D are cross-sectional views illustrating the second mask process illustrated in FIG. 6B in detail.

** Explanation of symbols for main parts of drawings **

110,210: array substrate 116,116 ', 216': gate line

117: data line 118,218: pixel electrode

121,221 gate electrode 122,222 source electrode

123,223 Drain electrode 124,224 Active pattern

150 ', 250 ": Etch stopper

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a manufacturing method thereof, and more particularly, to a liquid crystal display device including a thin film transistor having an etch stopper structure and a manufacturing method thereof.

Recently, with increasing interest in information display and increasing demand for using a portable information carrier, a lightweight flat panel display (FPD), which replaces a conventional display device, a cathode ray tube (CRT), is used. The research and commercialization of Korea is focused on. In particular, the liquid crystal display (LCD) of the flat panel display device is an image representing the image using the optical anisotropy of the liquid crystal, is excellent in resolution, color display and image quality, and is actively applied to notebooks or desktop monitors have.

The liquid crystal display is largely composed of a color filter substrate and an array substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

The active matrix (AM) method, which is a driving method mainly used in the liquid crystal display device, uses an amorphous silicon thin film transistor (a-Si TFT) as a switching device to drive the liquid crystal in the pixel portion. to be.

As such, when an active pattern is used as an amorphous silicon thin film, a staggered type thin film transistor having a gate electrode formed below is used, and the staggered thin film transistor is etched back. It can be divided into back structure and etch stopper structure.

Since the manufacturing process of the liquid crystal display device basically requires a plurality of mask processes (ie, photolithography process) for fabricating an array substrate including a thin film transistor, a method of reducing the number of masks in terms of productivity is required. ought.

Hereinafter, a structure of a general liquid crystal display device will be described in detail with reference to FIG. 1.

1 is an exploded perspective view schematically illustrating a general liquid crystal display.

As shown in the figure, the liquid crystal display device is largely a liquid crystal layer (liquid crystal layer) formed between the color filter substrate 5 and the array substrate 10 and the color filter substrate 5 and the array substrate 10 ( 30).

The color filter substrate 5 includes a color filter C composed of a plurality of sub-color filters 7 for implementing colors of red (R), green (G), and blue (B); A black matrix 6 which distinguishes between the sub-color filters 7 and blocks light passing through the liquid crystal layer 30, and a transparent common electrode which applies a voltage to the liquid crystal layer 30. It consists of (8).

In addition, the array substrate 10 may be arranged vertically and horizontally to define a plurality of gate lines 16 and data lines 17 and a plurality of gate lines 16 and data lines 17 that define a plurality of pixel regions P. The thin film transistor T, which is a switching element formed in the cross region, and the pixel electrode 18 formed on the pixel region P, are formed.

The color filter substrate 5 and the array substrate 10 configured as described above are joined to face each other by sealants (not shown) formed on the outer side of the image display area to form a liquid crystal display panel. 5) and the array substrate 10 are bonded through a bonding key (not shown) formed in the color filter substrate 5 or the array substrate 10.

As described above, the thin film transistor having the etch back structure has a simple manufacturing process, but the back channel of the thin film transistor may be damaged during the etching of the n + amorphous silicon thin film on the upper channel. There is a problem with reliability.

In addition, a black matrix is formed on the color filter substrate to block the exposed back channel of the active pattern from an external light source, but a backlight light source is reflected by the black matrix and penetrates into the back channel of the active pattern. Will occur. In this case, an off current is generated in the thin film transistor having the etch back structure, thereby degrading image quality.

In order to solve the problems occurring in the above-described thin film transistor having an etch back structure, a thin film transistor having an etch stopper structure has been proposed. However, the thin film transistor having the etch stopper structure has a disadvantage in that a mask process is added to form the etch stopper.

2A to 2F are cross-sectional views sequentially illustrating a manufacturing process of an array substrate in the liquid crystal display shown in FIG. 1 and schematically illustrating a manufacturing process of a thin film transistor having an etch stopper structure.

As shown in FIG. 2A, a gate electrode 21 made of a conductive metal material is formed on the array substrate 10 using a photolithography process (first mask process).

Next, as shown in FIG. 2B, the first insulating film 15a and the amorphous silicon thin film are sequentially deposited on the entire surface of the array substrate 10 on which the gate electrode 21 is formed, and then a photolithography process ( By selectively patterning the amorphous silicon thin film using a second mask process), an active pattern 24 made of the amorphous silicon thin film is formed on the gate electrode 21.

Thereafter, as illustrated in FIG. 2C, an insulating material is deposited on the entire surface of the array substrate 10, and then selectively patterned the insulating material using a photolithography process (third mask process) to form the active pattern 24. ) Forms an etch stopper 50 covering the channel region.

As shown in FIG. 2D, an n + amorphous silicon thin film and a conductive metal material are deposited on the entire surface of the array substrate 10, and then selectively patterned using a photolithography process (fourth mask process). The source electrode 22 and the drain electrode 23 are formed on the pattern 24. In this case, the n + amorphous silicon thin film is patterned in the form of the source electrode 22 and the drain electrode 23 through the fourth mask process, so that the source / drain region and the source / drain electrode 22 of the active pattern 24 are formed. 23) to form an ohmic contact layer 25 for ohmic contact therebetween.

Next, as shown in FIG. 2E, the second insulating film 15b is deposited on the entire surface of the array substrate 10 on which the source electrode 22 and the drain electrode 23 are formed, and then a photolithography process (fifth mask). The contact hole 40 exposing a part of the drain electrode 23 is formed by removing a part of the second insulating layer 15b through the process).

Finally, as shown in FIG. 2F, a transparent conductive metal material is deposited on the entire surface of the array substrate 10, and then selectively patterned using a photolithography process (sixth mask process) to form the contact hole 40. The pixel electrode 18 is formed to be electrically connected to the drain electrode 23 through the pixel electrode 18.

As described above, in the fabrication of an array substrate including a thin film transistor having an etch stopper structure, a total of six photolithography methods for patterning a gate electrode, an active pattern, an etch stopper, a source / drain electrode, a contact hole, and a pixel electrode are performed. It requires a process.

The photolithography process is a series of processes in which a pattern drawn on a mask is transferred onto a substrate on which a thin film is deposited to form a desired pattern. The photolithography process includes a plurality of processes such as photoresist coating, exposure, and development processes. There is a downside to dropping.

In particular, a mask designed to form a pattern is very expensive, and as the number of masks applied to the process increases, the manufacturing cost of the liquid crystal display device increases in proportion thereto.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same, by reducing an off current and improving device reliability by adopting an etch stopper structure.

Another object of the present invention is to form the etch stopper and the active pattern in a single mask process without using a diffraction mask, thereby simplifying the manufacturing process and reducing the number of masks used in the manufacture of a thin film transistor, and a manufacturing method thereof. The purpose is to provide a method.

Other objects and features of the present invention will be described in the configuration and claims of the invention described below.

In order to achieve the above object, the liquid crystal display of the present invention comprises a gate electrode and a gate line formed on the first substrate; A first insulating film formed on the first substrate; An active pattern formed on the gate electrode; An etch stopper formed on the channel of the active pattern with a second insulating film and having an inverse tapered shape; A source electrode and a drain electrode formed on the first substrate and electrically connected to the source region and the drain region of the active pattern, respectively; A third insulating layer formed on the first substrate and having a first contact hole and a second contact hole; A pixel electrode formed on the first substrate and electrically connected to the drain electrode through the first contact hole; And a second substrate bonded to face the first substrate.

In addition, the manufacturing method of the liquid crystal display of the present invention comprises the steps of forming a gate electrode and a gate line on the first substrate; Forming a first insulating film on the first substrate; Forming an active pattern on the gate electrode and forming an inverse tapered etch stopper on the channel of the active pattern; Forming a source electrode and a drain electrode electrically connected to the source region and the drain region of the active pattern, respectively; Forming a third insulating film having a first contact hole and a second contact hole formed on the first substrate; Forming a pixel electrode electrically connected to the drain electrode through the first contact hole; And bonding the first substrate and the second substrate to each other.

In addition, another method of manufacturing a liquid crystal display of the present invention comprises the steps of forming a gate electrode and a gate line on the first substrate; Forming a first insulating film, an amorphous silicon thin film, a second insulating film, and a conductive film on the first substrate; Forming a photoresist pattern on the first substrate; Selectively patterning the amorphous silicon thin film, the second insulating film, and the conductive film by using the photoresist pattern as a mask, and forming an active pattern and a second insulating film pattern formed of the amorphous silicon thin film, the second insulating film, and the conductive film on the gate electrode, respectively; Forming a conductive film pattern; Removing the photoresist layer pattern, and selectively patterning the second insulation layer pattern using the conductive layer pattern as a mask to form an etch stopper formed of the second insulation layer; Forming a source electrode and a drain electrode electrically connected to the source region and the drain region of the active pattern, respectively; Forming a third insulating film having a first contact hole and a second contact hole formed on the first substrate; Forming a pixel electrode electrically connected to the drain electrode through the first contact hole; And bonding the first substrate and the second substrate to each other.

Hereinafter, exemplary embodiments of a liquid crystal display and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a plan view schematically illustrating a portion of an array substrate of a liquid crystal display according to a first exemplary embodiment of the present invention, and for convenience of description, illustrates one pixel including a thin film transistor of a pixel unit.

In an actual liquid crystal display device, N gate lines and M data lines intersect and MxN pixels exist, but one pixel is shown in the figure for simplicity of explanation.

As shown in the figure, a gate line 116 and a data line 117 are formed on the array substrate 110 of the first embodiment to be arranged vertically and horizontally on the array substrate 110 to define a pixel region. In addition, a thin film transistor, which is a switching element, is formed in an intersection area of the gate line 116 and the data line 117, and is connected to the thin film transistor in the pixel area, and the common electrode of a color filter substrate (not shown). In addition, a pixel electrode 118 for driving a liquid crystal (not shown) is formed.

The thin film transistor includes a gate electrode 121 connected to the gate line 116, a source electrode 122 connected to the data line 117, and a drain electrode 123 connected to the pixel electrode 118. In addition, the thin film transistor includes an active pattern 124 that forms a conductive channel between the source electrode 122 and the drain electrode 123 by a gate voltage supplied to the gate electrode 121.

A portion of the source electrode 122 extends in one direction to form a portion of the data line 117, and a portion of the drain electrode 123 extends toward the pixel region to form a third insulating layer (not shown). It is electrically connected to the pixel electrode 118 through one contact hole 140a.

In this case, the liquid crystal display according to the first exemplary embodiment of the present invention may reduce the off current of the thin film transistor by forming the etch stopper 150 ′ in an island shape on the channel of the active pattern 124. That is, the etch stopper 150 ′ is formed between the source electrode 122 and the drain electrode 123 through which the back channel of the active pattern 124 is exposed, thereby etching the n + amorphous silicon thin film on the channel. In this case, the back channel of the thin film transistor can be prevented from being damaged.

In this case, the etch stopper 150 ′ according to the first embodiment may be formed of a second insulating film and may have an inverse taper shape, and the etch stopper 150 ′ and the active pattern 124 may be diffracted. One mask for manufacturing the array substrate 110 by forming in one mask process without using a mask or a half-tone mask (hereinafter referred to as a half-tone mask in the case of referring to a diffraction mask). The number can be reduced. In the case of using the diffraction mask in forming a predetermined pattern, there is an advantage in that two patterns can be formed through one mask process, compared with the case of using a general mask, but precise process conditions are required and the yield is reduced. There is this.

In this case, a portion of the front gate line 116 ′ overlaps a portion of the storage electrode 127 therebetween with a first insulating layer (not shown) therebetween to form a storage capacitor Cst. The storage electrode 127 is electrically connected to the pixel electrode 118 through the second contact hole 140b formed in the third insulating layer. The storage capacitor Cst keeps the voltage applied to the liquid crystal capacitor constant until the next signal comes in. That is, the pixel electrode 118 of the array substrate 110 forms a liquid crystal capacitor together with the common electrode of the color filter substrate. In general, the voltage applied to the liquid crystal capacitor is not maintained until the next signal is input and is leaked. Disappear. Therefore, in order to maintain the applied voltage, the storage capacitor Cst needs to be connected to the liquid crystal capacitor.

The storage capacitor Cst has effects such as stability of gray scale display and reduction of flicker and afterimage in addition to signal retention.

As described above, in the liquid crystal display according to the first exemplary embodiment of the present invention, the active pattern 124 and the etch stopper 150 'are simultaneously formed in one mask process, thereby performing a total of five mask processes. The array substrate 110 can be manufactured. In addition, in the liquid crystal display according to the first embodiment, the yield is improved by not using a diffraction mask in forming the active pattern 124 and the etch stopper 150 ', which is described in the following liquid crystal display. It demonstrates in detail through the manufacturing method of an apparatus.

4A through 4E are cross-sectional views sequentially illustrating a manufacturing process along line III-III ′ of the array substrate illustrated in FIG. 3.

As shown in FIG. 4A, the gate electrode 121 and the gate line 116 ′ are formed on the array substrate 110 made of a transparent insulating material such as glass.

In this case, for convenience of description, the gate line 116 ′ of the front end of the pixel is illustrated as an example, but the gate line (not shown) and the front gate line 116 ′ of the corresponding pixel are the same. Will be formed.

In this case, the gate electrode 121 and the gate line 116 ′ are formed by depositing a first conductive layer on the entire surface of the array substrate 110 and then selectively patterning the same through a photolithography process (first mask process).

The first conductive layer may include aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), chromium (Cr), molybdenum (Mo), or the like. The same low resistance opaque conductive material can be used. In addition, the first conductive film may be formed in a multilayer structure in which two or more low-resistance conductive materials are stacked.

Next, as shown in FIG. 4B, the first insulating film, the amorphous silicon thin film, and the second insulating film are formed on the entire surface of the array substrate 110 on which the gate electrode 121 and the gate line 116 ′ are formed. By selectively patterning through a lithography process (second mask process), an active pattern 124 made of the amorphous silicon thin film is formed on the gate electrode 121, and the second pattern is formed on the channel of the active pattern 124. An etch stopper 150 'made of an insulating film is formed.

 The etch stopper 150 ′ is formed in an island shape on the channel of the active pattern 124 to prevent the back channel of the thin film transistor from being damaged when the n + amorphous silicon thin film on the channel is etched in a process to be described later. Done. In this case, as the etch stopper 150 ′ according to the first embodiment is formed to have an inverse taper shape, an area of the exposed upper surface of the active pattern 124 disposed under the etch stopper 150 ′ increases.

At this time, in the first embodiment, the active pattern 124 and the etch stopper 150 'are simultaneously formed in one mask process (second mask process) without using a diffraction mask. The second mask process will be described in detail.

5A to 5D are cross-sectional views illustrating the second mask process illustrated in FIG. 4B in detail.

As shown in FIG. 5A, a first insulating film 115a, an amorphous silicon thin film 120, and a second insulating film are formed on the entire surface of the array substrate 110 on which the gate electrode 121 and the gate line 116 ′ are formed. 150 is formed.

Next, as shown in FIGS. 5B and 5C, after forming the first photoresist layer pattern 170 made of photosensitive material such as photoresist on the entire surface of the array substrate 110 (second mask process), the first Using the photosensitive film pattern 170 as a mask, the second insulating film formed underneath is selectively removed to form an etch stopper 150 '.

In this case, the etch stopper 150 ′ according to the first embodiment may be formed in an inverted taper shape through dry etching using the first photoresist pattern 170 as a mask, but the present invention is not limited thereto.

Thereafter, as shown in FIG. 5D, the first insulating layer 115a is formed on the gate electrode 121 by selectively removing the amorphous silicon thin film under the first photoresist layer pattern 170 as a mask. In the interposed state, the active pattern 124 made of the amorphous silicon thin film is formed.

In this case, the active pattern 124 and the etch stopper 150 ′ are patterned by using the first photoresist pattern 170 as the same mask to have the same shape.

As such, the active pattern 124 and the etch stopper 150 ′ according to the first embodiment of the present invention can be formed through a single mask process without using a diffraction mask. As a result, the number of masks used in the manufacture of the thin film transistor is reduced, thereby reducing the manufacturing process and cost, and providing an effect of improving the yield.

In addition, in the liquid crystal display according to the first exemplary embodiment, the thickness of the active pattern 124 may be reduced by forming and protecting the etch stopper 150 ′ so that the back channel of the active pattern 124 is not exposed. The thickness of the active pattern 124 can be prevented from being relatively thin. As a result, the thickness of the first insulating layer 115a can be reduced, thereby substantially reducing the driving voltage and the threshold voltage of the thin film transistor.

Next, as shown in FIG. 4C, an n + amorphous silicon thin film and a second conductive film are deposited on the entire surface of the array substrate 110 on which the active pattern 124 and the etch stopper 150 'are formed, and then a photolithography process. The source electrode 122 and the drain electrode 123 electrically connected to the source region and the drain region of the active pattern 124 are formed by selectively patterning using the third mask process.

In this case, an n + amorphous silicon thin film is formed between the source / drain region of the active pattern 124 and the source / drain electrodes 122 and 123 and patterned in the same shape as the source / drain electrodes 122 and 123. The ohmic contact layer 125 is formed.

In this case, as described above, the etch stopper 150 ′ according to the first embodiment of the present invention has an inverted taper shape, and thus the ohmic contact layer () may be exposed to an area where the upper surface of the active pattern 124 is exposed. 125 'is in contact with each other, and the source / drain regions of the active pattern are electrically connected to the source / drain electrodes 122 and 123 through the ohmic contact layer 125'.

In addition, a storage electrode 127 formed of the second conductive layer is formed on the gate line 116 ′ through the third mask process, and the storage electrode 127 is formed on the first insulating layer 115a. A storage capacitor is formed by overlapping a portion of the gate line 116 ′ with a gap therebetween.

The second conductive layer may be formed of aluminum (Al), aluminum alloy (tungsten), tungsten (tungsten) to form the source / drain electrodes 122 and 123, the data line (not shown), and the storage electrode 127. W), copper (Cu), chromium (Cr), molybdenum (Mo), and the like, and low resistance opaque conductive materials.

Next, as shown in FIG. 4D, after depositing a third insulating film 115b on the entire surface of the array substrate 110, a portion of the third insulating film 115b is subjected to a photolithography process (fourth mask process). By removing the region, a first contact hole 140a exposing a part of the drain electrode 123 and a second contact hole 140b exposing a part of the storage electrode 127 are formed.

Thereafter, as shown in FIG. 4E, after forming a third conductive film on the entire surface of the array substrate 110, the first contact is selectively patterned by using a photolithography process (a fifth mask process). The pixel electrode 118 electrically connected to the drain electrode 123 is formed through the hole 140a.

In this case, the pixel electrode 118 is electrically connected to the storage electrode 127 through the second contact hole 140b, and the front gate line 116 is provided with the first insulating film 115a therebetween. ') Together with the storage capacitor Cst.

The third conductive layer includes a transparent conductive material having excellent transmittance such as indium tin oxide (ITO) or indium zinc oxide (IZO) to form the pixel electrode 118. do.

As described above, the array substrate of the first embodiment can manufacture a thin film transistor having an etch stopper structure through a total of five mask processes. In particular, the active substrate and the etch stopper can be manufactured through a single mask process without using a diffraction mask. Can be formed.

Hereinafter, another embodiment in which an active pattern and an etch stopper can be formed in one mask process without using a diffraction mask by using the overetched conductive film pattern as a mask for forming an etch stopper will be described. It will be described in detail.

At this time, the liquid crystal display of the second embodiment has the same configuration as the liquid crystal display of the first embodiment except for the method of forming the etch stopper and the shape of the etch stopper.

6A through 6E are cross-sectional views sequentially illustrating a process of manufacturing an array substrate of a liquid crystal display according to a second exemplary embodiment of the present invention.

As shown in FIG. 6A, a gate electrode 221 and a gate line 216 ′ are formed on an array substrate 210 made of a transparent insulating material such as glass.

In this case, for convenience of description, the gate line 216 ′ of the front end of the pixel is illustrated as an example, but the gate line (not shown) and the front gate line 216 ′ of the corresponding pixel are the same. Will be formed.

In this case, the gate electrode 221 and the gate line 216 ′ are formed by depositing a first conductive layer on the entire surface of the array substrate 210 and then selectively patterning the same through a photolithography process (first mask process).

Next, as shown in FIG. 6B, the first insulating film, the amorphous silicon thin film, and the second insulating film are formed on the entire surface of the array substrate 210 on which the gate electrode 221 and the gate line 216 ′ are formed. By selectively patterning through a lithography process (second mask process), an active pattern 224 made of the amorphous silicon thin film is formed on the gate electrode 221, and the second pattern is formed on the channel of the active pattern 224. An etch stopper 250 "made of an insulating film is formed.

 The etch stopper 250 ″ is formed in an island shape on the channel of the active pattern 224 to prevent the back channel of the thin film transistor from being damaged when the n + amorphous silicon thin film on the channel is etched in a process to be described later. Done.

At this time, in the second embodiment, the active pattern 224 and the etch stopper 250 ″ are simultaneously formed in one mask process (second mask process) without using a diffraction mask. The second mask process will be described in detail.

7A to 7D are cross-sectional views illustrating the second mask process illustrated in FIG. 6B in detail.

As shown in FIG. 7A, a first insulating film 215a, an amorphous silicon thin film 220, and a second insulating film are formed on the entire surface of the array substrate 210 on which the gate electrode 221 and the gate line 216 ′ are formed. 250 and a conductive film 280 are formed.

Next, as shown in FIGS. 7B and 7C, after forming the second photoresist layer pattern 270 made of a photosensitive material such as a photoresist on the entire surface of the array substrate 210 (second mask process), the second Using the photoresist pattern 270 as a mask, an active pattern 224 formed of the amorphous silicon thin film is formed on the gate electrode 221 by selectively removing the amorphous silicon thin film, the second insulating film, and the conductive film formed thereon. .

In this case, the conductive layer pattern 280 ′ is formed to have a width greater than that of the second photosensitive layer pattern 270 by overetching the conductive layer under the second photosensitive layer pattern 270 using wet etching.

The amorphous silicon thin film and the second insulating film are patterned in the form of the second photosensitive film pattern 270 using the second photoresist pattern 270 as a mask, and the amorphous silicon thin film and the second film are formed on the gate electrode 221. An active pattern 224 and a second insulating film pattern 250 ′ formed of two insulating films are formed.

Subsequently, as shown in FIG. 7D, after removing the second photoresist layer pattern, the conductive layer pattern 280 ′ is used as a mask, and the second insulating layer pattern below is formed in the form of the conductive layer pattern 280 ′. By patterning as described above, an etch stopper 250 " formed of the second insulating film is formed.

Next, as shown in FIG. 6C, an n + amorphous silicon thin film and a second conductive film are deposited on the entire surface of the array substrate 210 on which the active pattern 224 and the etch stopper 250 ″ are formed, and then a photolithography process. By selectively patterning using the third mask process, source and drain electrodes 222 and 223 electrically connected to the source and drain regions of the active pattern 224 are formed.

In this case, an n + amorphous silicon thin film is formed between the source / drain regions of the active pattern 224 and the source / drain electrodes 222 and 223 and patterned in the same form as the source / drain electrodes 222 and 223. The ohmic contact layer 225 is formed.

In this case, a storage electrode 227 made of the second conductive layer is formed on the gate line 216 'through the third mask process, and the storage electrode 227 forms the first insulating layer 215a. A storage capacitor is formed by overlapping a portion of the gate line 216 ′ between the gate lines 216 ′.

Next, as shown in FIG. 6D, after the third insulating film 215b is deposited on the entire surface of the array substrate 210, a portion of the third insulating film 215b is formed through a photolithography process (fourth mask process). By removing the region, a first contact hole 240a exposing a part of the drain electrode 223 and a second contact hole 240b exposing a part of the storage electrode 227 are formed.

Subsequently, as shown in FIG. 6E, after forming a third conductive film on the entire surface of the array substrate 210, the first contact is selectively patterned by using a photolithography process (a fifth mask process). The pixel electrode 218 is formed to be electrically connected to the drain electrode 223 through the hole 240a.

In this case, the corresponding pixel electrode 218 is electrically connected to the storage electrode 227 through the second contact hole 240b so that the front gate line 216 is disposed with the first insulating layer 215a therebetween. ') Together with the storage capacitor Cst.

The array substrate configured as described above is bonded to the color filter substrate (not shown) by a sealant formed on the outside of the image display area, wherein the color filter substrate leaks light to the thin film transistor, the gate line, and the data line. The black matrix to prevent the color and the color filter to implement the colors of red, green and blue are formed.

At this time, the bonding of the color filter substrate and the array substrate is made through a bonding key formed on the color filter substrate or the array substrate.

The present invention can be used not only in liquid crystal display devices, but also in other display devices fabricated using thin film transistors, for example, organic light emitting display devices in which organic light emitting diodes (OLEDs) are connected to driving transistors.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

As described above, the liquid crystal display device and the method of manufacturing the same according to the present invention reduce the number of masks used in the thin film transistor manufacturing by forming the active pattern and the etch stopper in one mask process, thereby reducing the manufacturing process and cost. to provide.

In addition, the liquid crystal display and the manufacturing method according to the present invention by forming the active pattern and the etch stopper through a single mask process without using a diffraction mask to further simplify the manufacturing process to provide an effect of improving the yield do.

In addition, the liquid crystal display device and the method of manufacturing the same according to the present invention can prevent the occurrence of leakage current by adopting the etch stopper structure, it is possible to manufacture a high-quality liquid crystal display device.

Claims (22)

Forming a gate electrode and a gate line on the first substrate; Forming a first insulating film on the first substrate; Forming an active pattern on the gate electrode and forming an inverse tapered etch stopper on the channel of the active pattern; Forming a source electrode and a drain electrode electrically connected to the source region and the drain region of the active pattern, respectively; Forming a third insulating film having a first contact hole and a second contact hole formed on the first substrate; Forming a pixel electrode electrically connected to the drain electrode through the first contact hole; And And attaching the first substrate and the second substrate to each other. The liquid crystal display device of claim 1, further comprising forming a data line defining a pixel region by crossing the gate line by using a conductive film constituting the source electrode and the drain electrode. Way. The liquid crystal display of claim 2, further comprising forming a storage electrode formed on the gate line using the conductive layer and overlapping a portion of the gate line to form a storage capacitor. Manufacturing method. The method of claim 3, wherein the pixel electrode is electrically connected to the storage electrode through the second contact hole. The ohmic contact layer of claim 1, further comprising: an ohmic contact layer disposed under the source / drain electrode and patterned in the same shape as the source / drain electrode to ohmic-contact between the source / drain region and the source / drain electrode of the active pattern. Method of manufacturing a liquid crystal display device further comprising the step of forming a. The method of claim 1, wherein the active pattern and the etch stopper are formed through a single mask process. The method of claim 1, wherein the forming of the active pattern and the etch stopper is performed. Forming an amorphous silicon thin film and a second insulating film on the first substrate on which the first insulating film is formed; Forming a photoresist pattern on the first substrate; Selectively patterning the second insulating film using the photosensitive film pattern as a mask to form an etch stopper formed of the second insulating film and having an inverse tapered shape; And And selectively patterning the amorphous silicon thin film using the photosensitive film pattern as a mask to form an active pattern made of the amorphous silicon thin film. The method of claim 7, wherein the etch stopper is formed by using dry etching. The method of claim 7, wherein the active pattern is patterned such that a side surface thereof has the same shape as the etch stopper. Forming a gate electrode and a gate line on the first substrate; Forming a first insulating film, an amorphous silicon thin film, a second insulating film, and a conductive film on the first substrate; Forming a photoresist pattern on the first substrate; Selectively patterning the amorphous silicon thin film, the second insulating film, and the conductive film by using the photoresist pattern as a mask, and forming an active pattern and a second insulating film pattern formed of the amorphous silicon thin film, the second insulating film, and the conductive film on the gate electrode, respectively; Forming a conductive film pattern; Removing the photoresist layer pattern, and selectively patterning the second insulation layer pattern using the conductive layer pattern as a mask to form an etch stopper formed of the second insulation layer; Forming a source electrode and a drain electrode electrically connected to the source region and the drain region of the active pattern, respectively; Forming a third insulating film having a first contact hole and a second contact hole formed on the first substrate; Forming a pixel electrode electrically connected to the drain electrode through the first contact hole; And And attaching the first substrate and the second substrate to each other. The method of claim 10, further comprising forming a data line defining a pixel region to intersect the gate line by using a conductive film constituting the source electrode and the drain electrode. Way. 12. The liquid crystal display of claim 11, further comprising forming a storage electrode formed on the gate line using the conductive layer and overlapping a portion of the gate line to form a storage capacitor. Manufacturing method. The method of claim 12, wherein the pixel electrode is electrically connected to the storage electrode through the second contact hole. The ohmic contact layer of claim 10, wherein the ohmic contact layer is disposed under the source / drain electrodes and is patterned in the same shape as the source / drain electrodes to ohmic-contact between the source / drain region and the source / drain electrode of the active pattern. Method of manufacturing a liquid crystal display device further comprising the step of forming a. The method of claim 10, wherein the active pattern and the etch stopper are formed through a single mask process. The method of claim 10, wherein the conductive layer pattern has a shape in which the conductive layer has a width smaller than that of the photosensitive layer pattern by overetching the conductive layer using wet etching. A gate electrode and a gate line formed on the first substrate; A first insulating film formed on the first substrate; An active pattern formed on the gate electrode; An etch stopper formed on the channel of the active pattern with a second insulating film and having an inverse tapered shape; A source electrode and a drain electrode formed on the first substrate and electrically connected to the source region and the drain region of the active pattern, respectively; A third insulating layer formed on the first substrate and having a first contact hole and a second contact hole; A pixel electrode formed on the first substrate and electrically connected to the drain electrode through the first contact hole; And And a second substrate bonded to the first substrate. 18. The liquid crystal display device according to claim 17, further comprising a data line formed of a conductive film constituting the source electrode and the drain electrode, and defining a pixel area crossing the gate line. 19. The liquid crystal display of claim 18, further comprising a storage electrode formed on the gate line using the conductive layer and overlapping a portion of the gate line to form a storage capacitor. The liquid crystal display of claim 19, wherein the pixel electrode is electrically connected to the storage electrode through the second contact hole. 18. The ohmic contact layer of claim 17, further comprising: an ohmic contact layer disposed under the source / drain electrodes and patterned in the same shape as the source / drain electrodes to ohmic contact between the source / drain regions of the active pattern and the source / drain electrodes. Liquid crystal display comprising a further. 18. The liquid crystal display device according to claim 17, wherein the active pattern is patterned such that a side thereof has the same shape as the etch stopper.

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