KR20070021631A - Multi-layer printed circuit board and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a multilayer printed circuit board and a method of manufacturing the same. The method for manufacturing a multilayer printed circuit board according to the present invention includes forming and laminating a conductor layer on a single-sided or double-sided upper surface of an inner wiring board by heating and pressing a RCC. Obtaining a sieve, drilling a hole in the insulating layer and the conductor layer of the laminate, desmearing a machining surface inside the drilled hole, removing the conductor layer of the laminate Exposing the rough surface of the insulating layer, forming an electroless plating layer on the rough surface of the insulating layer and the inner surface of the hole, forming a pattern using a photoresist on the electroless plating layer, and electrolytic plating on the pattern. Forming a circuit layer, and peeling the photoresist and removing the exposed electroless plating layer; In addition, a reduction Sikkim and has the advantage of producing a build-up printed circuit board for implementing high-density fine circuit pattern.

Printed Circuit Board, Electroless Plating, Roughness Maintenance, Additive Method, Conductor Layer Etching

Description

Multi-layer printed circuit board and manufacturing method thereof

1 is a manufacturing process diagram of a multilayer printed circuit board using a conventional laminated press method.

2 is a process flowchart of a method of manufacturing a multilayer printed circuit board according to the present invention.

3 is a manufacturing process diagram of a printed circuit board according to the manufacturing process according to the present invention.

4 is a schematic cross-sectional view of a printed circuit board manufactured according to a manufacturing process according to the present invention.

         <Explanation of symbols for the main parts of the drawings>

      11, 21: inner layer wiring board 12, 22 :. Conductor layer

      13, 23: insulating layer 14, 24: photoresist

      15, 25: hole 16, 26: hole processing surface

      17, 27: electroless plating layer 18, 28: electrolytic plating layer

      29: horizontal roughness plane

The present invention relates to a multilayer printed circuit board and a method of manufacturing the same, and more particularly, to a multilayer printed circuit board and a method of manufacturing the same, which can reduce the overall height of the printed circuit board and realize a high density fine circuit pattern.

In recent years, in response to the demand for improving the performance and miniaturization of electronic communication devices, the field of multilayered wiring boards in which printed circuit boards, particularly multi-layered wiring circuits are formed and circuit density has increased, is constantly developing.

For example, a multilayer fabricated by a "build-up method" in which a wiring layer and an insulating layer are alternately stacked, and via holes are formed between an upper wiring layer and a lower wiring layer to connect the two wiring layers. There is a wiring board.

In the build-up method, generally, via holes are first formed with a laser, an electrolytic plating seed layer is formed by electroless plating, and then a plating resist is formed.

Subsequently, the via hole and the wiring part are filled with metal by electroplating.

In addition, since the relative position of the via hole with respect to the wiring is determined by the layout of the layer in which the via hole is formed, the via hole may be formed at various positions with respect to the wiring as needed.

1 shows a manufacturing process of a multilayer substrate using a conventional laminated press method.

Referring to FIG. 1, a process of manufacturing a multilayer printed circuit board using RCC (resin coated copper) by a conventional lamination press method will be described. The laminate may be formed by heating and pressing an RCC on an upper portion of the inner wiring board 11. After the formation, the copper conductive layer 12 having a boundary with the insulating layer 13 stacked on the inner layer 11 is plated (1b), a photoresist 1c is coated on the copper conductive layer 12, and photolithography is performed. A pattern is formed by a method.

Then, a hole is formed by drilling with a CO ₂ and YAG laser in a portion without the photoresist 14 (1d), and a desmear treatment is performed on the machined surface on which the hole 15 is formed (1e). ).

Next, electroless copper plating is performed on the desmeared hole working surface 16 (1f), and electrolytic copper plating 18 is performed on the electroless copper plating layer 17 (1g).

After attaching the photoresist 14 on the electrolytic copper plating surface 18 (1h), and forming a circuit pattern by photolithography, the exposed copper plating surface 18 is etched (1i) and then photo Removing the resist 14 completes the final printed circuit board 1i.

However, in the multilayer substrate using the above-mentioned lamination press method, since the plating process is performed after hole processing, the outer layer conductor becomes difficult to form fine patterns as the thickness of copper plated on copper foil becomes thick, and the etching process of copper plated surface. There is a problem that an etch-back phenomenon occurs.

In order to solve this problem, after the hole processing of the laminated multilayer board, the copper foil part is removed by etching, and then, after the copper plating is performed using the roughness of the resin layer generated by the removed copper foil, a fine pattern suitable for a high density pattern is formed. A method of forming is proposed.

However, in the above method, since the roughness of the resin layer is lowered after the desmear treatment, a problem arises in that the adhesive strength between the resin and copper plating is not sufficient.

The present invention has been proposed to solve the problems in the method of manufacturing a multilayer substrate by the conventional lamination press method as described above, and by performing a desmear process without peeling the copper foil of the portion where the circuit is to be formed after hole processing, Multilayer printed circuit board and its manufacture capable of forming a fine pattern by maintaining the roughness of the formed portion, and subsequently peeling the copper foil and then proceeding the plating process to improve the adhesive strength of the resin layer and the plating layer as the insulating layer and reduce the overall lamination thickness. It is an object of the present invention to provide a method.

Method of manufacturing a multilayer printed circuit board according to the present invention for solving the conventional problems as described above and to achieve the above object, (a) after laminating a coated resin (RCC) on the upper surface of the single-sided or double-sided of the inner layer wiring board, Heating and pressing to obtain a laminate comprising an insulating layer and a conductor layer, (b) drilling a hole in the insulating layer and the conductor layer of the laminate, and (c) processing a surface inside the hole formed by the drilling process. Desmearing (d) removing the conductor layer of the laminate to expose the rough surface of the insulating layer, (e) forming an electroless plating layer on the rough surface of the insulating layer and the inner surface of the hole (F) forming a pattern using photoresist on the electroless plating layer, (g) forming a circuit layer by electroplating on the pattern, and (h) peeling the photoresist and exposing the electroless Removing the plating layer.

In addition, in another method for manufacturing a multilayer printed circuit board according to the present invention, (a) a prepreg and a metal foil are laminated on one or both sides of an inner layer wiring board, and then heated and pressed together to form an insulating layer and a conductor layer. (B) drilling a hole in the insulating layer and the conductor layer of the laminate, (c) desmearing a machining surface inside the drilled hole formed; (d) removing the conductor layer of the laminate to expose the rough surface of the insulating layer, (e) forming an electroless plating layer on the rough surface of the insulating layer and the inner surface of the hole, (f) the electroless plating layer Forming a pattern using a photoresist thereon; (g) forming a circuit layer by electroplating on the pattern; and (h) removing the photoresist and removing the exposed electroless plating layer. .

On the other hand, according to the multilayer printed circuit board according to the present invention, the inner layer wiring board, the laminate formed by heating and pressing on the upper surface or both surfaces of the inner layer wiring board, the drilled to the insulating layer of the laminate, the inner surface of the desmear A roughened surface exposed on the insulating layer when the conductor layer is peeled off by being bonded to the back surface of the conductor layer, an electroless plating layer formed on the roughened surface and the inner surface of the hole, and electrolytic plating on the electroless plating layer. And a circuit pattern layer formed.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a process flowchart of a method of manufacturing a multilayer printed circuit board according to the present invention.

Referring to Figure 2, the manufacturing process sequence of the multilayer printed circuit board according to the present invention, the step of drilling a hole in the insulating layer formed on one side or both sides of the inner layer wiring board and the conductor layer formed on the insulating layer (S31), Desmearing the processed surface inside the hole formed by processing the hole (S32), removing the conductor layer formed on the insulating layer to expose the rough surface (S33), the insulating layer and the hole from which the conductor layer is removed Forming an electroless plating layer by electroless plating on an inner surface (S34), coating a photoresist (PR) layer on the electroless plating layer (S35), and forming an electrolytic plating layer on the photoresist layer ( S36), removing the photoresist layer, and removing the exposed electroplating layer (S37).

FIG. 3 is a detailed process diagram showing a manufacturing process of a multilayer printed circuit board according to the manufacturing method according to the present invention shown in FIG.

Referring to Figure 3, look at in detail the manufacturing process of the multilayer printed circuit board according to the present invention.

By heating and pressing RCC (resin coated copper) on the upper surface or the upper surface of both surfaces of the already formed inner wiring board 21 (3a), a laminate which forms an insulating layer and an outer conductor layer is obtained.

An insulating layer 23 made of resin or the like is laminated on the inner wiring board 21, and a conductor layer 22 is formed on the insulating layer 23 (3b).

Here, generally, a copper film is used as the conductor layer 22.

Meanwhile, instead of the RCC, a prepreg and a metal foil are laminated on one or both upper surfaces of the inner layer wiring board 21, and then the metal foil and the prepreg are heated and pressed together to form a laminate composed of an insulating layer and a conductor layer. It is also possible to obtain.

 Next, the process of drilling the conductor layer 22 and the insulating layer 23 together to form a hole is performed (3c).

Here, the drilling is performed by the CO ₂ and YAG laser, the hole 25 is connected to the inner layer wiring board 21 is formed.

Next, a desmear process is performed to roughen the processed inner surface of the hole 25 (3d).

The desmear process is to form an rough surface 26 having an appropriate roughness (roughness) by processing the inner surface of the hole 25 by the laser processing.

The next process is to etch away the conductor layer 22 that was originally formed (3e).

The etching process is such that after the conductor layer 22 is etched, the horizontal roughness surface 29 having an appropriate roughness still remains on the insulating layer 23.

This is a profile having a somewhat rough original shape on the back surface of the conductor layer 22 that has been pressed and heated to the insulating layer 23 to the upper surface of the insulating layer 23 while adhering to the insulating layer 23. Transfer is to receive the roughness as it is.

That is, the conductor layer 22 has a relatively smooth processing surface at the uppermost surface, but the back surface adhered to the insulator layer has a roughness of roughness and the heating and pressurization of the insulator 23 layer. This is due to the fact that they are laminated and joined in a press.

Therefore, after the hole processing, the desmear process is performed without peeling off the conductor layer of the portion where the circuit is to be formed, thereby maintaining the roughness of the portion where the circuit is to be formed. It is possible to improve the adhesive strength of the plating layer 27.

In addition, by performing an etching process in this step, when forming a fine circuit pattern it is possible to form a plating layer without additional etching process of the conductor layer.

Next, electroless plating is performed on the circuit forming portion where the horizontal roughness surface 29 is maintained and the inner surface of the hole 25 to form a relatively thin plating layer 27 (3f).

The electroless plating layer 27 is to secure the adhesive strength to the resin insulating layer in advance in order to raise the fine circuit pattern layer to be formed thereon.

In general, the adhesion between the circuit electrode to be formed and the substrate has a close relationship, and an electroless plating layer 27 is formed between the substrate and the circuit electrode.

Here, since the electroless plating layer 27 is formed using the surface-coated catalyst as an active point, ultimately there is no adhesiveness with the substrate.

Therefore, when the roughness of the substrate surface is large, the adhesion therebetween is well maintained by the anchor effect, but when the roughness is not present on the substrate surface, the adhesion tends to be low.

Therefore, in an additive process, a process of forming the roughness of the surface of the polymer material serving as the substrate is required. In the present invention, the roughness of the copper foil serving as the conductor layer 22 is used.

In order to obtain high adhesive strength, the surface roughness must be increased. Therefore, it is effective to use a large surface roughness of metal foil. However, when the surface roughness value is about 3 to 5 µm, the line / space value of the circuit formed is 30/30. In the case of 탆 or more, this is not a problem. However, the formation of the line width circuit of 30/30 탆 or less, that is, 25/25 탆 or less is a serious problem because it is difficult to form a good circuit due to the surface irregularities.

Therefore, the most favorable circuit shape can be obtained that the metal foil, which is the conductor layer 22, has a surface roughness of about 0.1 times or less of the formed circuit width.

At this time, the electroless plating layer 27 serving as the seed layer of the electrolytic plating layer 28 is generally suitable to be within 0.1-5 μm.

On the other hand, if the etching time is increased when the electroless plating layer 28 is later removed, the electroless plating layer 27 can be satisfactorily removed and high insulation reliability can be obtained. The width and thickness are reduced, resulting in problems with precise circuit pattern formation and reproducibility.

On the other hand, although a good circuit pattern can be obtained by shortening the etching time, there is a disadvantage in that the electroless plating layer 27 partially remains to obtain high insulation reliability.

As a result, it is important to form the electroless plating layer 27 having a thickness corresponding to the etching time.

That is, in the final circuit forming step, the electroless plating layer 27 is removed by quick etching, and therefore, should be formed to a thickness suitable for performing in a short time.

If the thickness is too thick, there may be a portion that cannot be removed by quick etching, and if the thickness rises too thin, the etching liquid may penetrate to the portion to be left during quick etching.

Next, in order to form a desired circuit pattern on the electroless plating layer 27, a fine circuit pattern is formed by coating a photoresist 24 as a lithography process and forming an opening for forming an outer layer pattern. (3g).

Here, the photoresist may be a dry film or the like.

Next, the conductor layer 28 for forming the fine circuit pattern in the opening of the photoresist layer 24 is formed by electroplating (3h).

As a result, the electroplating layer 28 forms a new circuit layer connected to the inner wiring board 21 by the hole 25.

Herein, the thickness of the electrolytic plating layer 28 is preferably about 1 µm to 100 µm.

Finally, the circuit pattern is completed by removing the unnecessary photoresist layer 24 that has been used and removing the exposed electroless plating layer 27 (3i).

4 is a cross-sectional schematic diagram of a printed circuit board manufactured according to a manufacturing process according to the present invention, compared with a cross-sectional schematic diagram by a conventional lamination press method.

In the case of the build-up substrate by the conventional lamination process on the left side, an etch-back in which the copper plating layer 12 is excessively etched after the photoresist 14 is removed after the etching process 4b after the pattern transfer 4a is performed. ) Phenomenon occurs (4c).

However, by the additive process according to the present invention, the photoresist 24 is coated on the electroless copper plating layer 27 (4a ') to form an electrolytic copper plating layer 28 (4b'), and the photoresist Since the process of removing (24) is performed (4c '), the etching process does not perform the etch back phenomenon, thereby obtaining a high-density build-up substrate having a finer circuit pattern.

As described above, according to the manufacturing method of the multilayer printed circuit board according to the present invention, not only the work process is simplified but also the fine pattern by improving the adhesive strength of the insulating layer and the plating layer according to the roughness of the roughness surface and reducing the overall lamination thickness. Since it can be formed to provide a method for manufacturing a high-density build-up printed circuit board.

In addition, the multilayer printed circuit board according to the present invention has an advantage of not only excellent hole filling property but also preventing the plating layer forming the circuit pattern from being etched back to form a finer pattern of higher density.

Although the present invention has been described in detail only with respect to the specific embodiments described, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical scope of the present invention, and such modifications and modifications belong to the appended claims. .

Claims (9)

(A) laminating a resin coated copper (RCC) on the upper or lower surfaces of the inner layer wiring board, followed by heating and pressing to obtain a laminate comprising an insulating layer and a conductor layer; (b) drilling holes in the insulating layer and the conductor layer of the laminate; (c) desmearing a machining surface inside the hole formed by drilling; (d) removing the conductor layer of the laminate to expose the rough surface of the insulating layer; (e) forming an electroless plating layer on the roughness surface of the insulating layer and the inner surface of the hole; (f) forming a pattern on the electroless plating layer using photoresist; (g) forming a circuit layer on the pattern by electroplating; And (h) peeling the photoresist and removing the exposed electroless plating layer. (a) stacking a prepreg and a metal foil on one side or both sides of the inner layer wiring board, and then heating and pressing together to obtain a laminate composed of an insulating layer and a conductor layer; (b) drilling holes in the insulating layer and the conductor layer of the laminate; (c) desmearing a machining surface inside the hole formed by drilling; (d) removing the conductor layer of the laminate to expose the rough surface of the insulating layer; (e) forming an electroless plating layer on the roughness surface of the insulating layer and the inner surface of the hole; (f) forming a pattern on the electroless plating layer using photoresist; (g) forming a circuit layer on the pattern by electroplating; And (h) peeling the photoresist and removing the exposed electroless plating layer. The method according to claim 1 or 2, And said drill processing is performed by a CO ₂ or YAG laser. The method according to claim 1 or 2, The thickness of said electroless plating layer is about 0.1 micrometer-5 micrometers, The manufacturing method of the multilayer printed circuit board characterized by the above-mentioned. The method according to claim 1 or 2, The thickness of the electroplating layer is a method of manufacturing a multilayer printed circuit board, characterized in that about 1㎛ ~ 100㎛. The method according to claim 1 or 2, The roughness of the roughness surface of the said insulating layer is about 1 micrometer-10 micrometers, The manufacturing method of the multilayer printed circuit board. Inner layer wiring board; A laminate formed by heating and pressing a conductor layer and an insulating layer on one or both upper surfaces of the inner layer wiring board; A hole drilled in the conductor layer and the insulating layer of the laminate and whose inner surface is desmeared; A roughness surface adhered to the back surface of the conductor layer and exposed to the insulating layer when the conductor layer is peeled off; An electroless plating layer formed on the roughness surface and the inner surface of the hole; And A multilayer printed circuit board comprising a circuit pattern layer formed on the electroless plating layer by electroplating. The method of claim 7, wherein The laminate is a multilayer coated circuit board, wherein the insulating layer and the conductor layer are copper coated laminates. The method of claim 7, wherein The laminate is a prepreg and a metal foil.

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