KR100901513B1 - Method for forming circuit of PCB - Google Patents

Abstract

A printed circuit board circuit forming method is disclosed. A method of forming a circuit on a printed circuit board having a strain-vulnerable region where deformation is predicted, the method comprising: forming a seed layer by depositing a conductive material on a substrate; laminating a photosensitive film on the seed layer; Selectively removing a portion of the photosensitive film and electroplating the seed layer with an electrode solution in an electrolyte solution so that the plated particles formed in the strain-vulnerable region are larger than the plated particles formed in the region other than the strain-vulnerable region. Printed circuit board forming method comprising the step of, by increasing the size of the plated particles in the strain-vulnerable region of the printed circuit board, mechanical stiffness is adjusted for each part to prevent deformation of the substrate without additional insertion of additional materials And a thin substrate can be produced.

Plating Particle, Deformation, Plating

Description

Printed circuit board circuit forming method {Method for forming circuit of PCB}

The present invention relates to a printed circuit board circuit forming method.

Due to the thinning trend of electronic products such as mobile phones, packaging companies are demanding thinning of semiconductor substrates in order to increase the packaging density and reduce the package thickness. Also, the melting point temperature has increased due to the use of lead-free solder due to environmental problems.

The semiconductor substrate has a structure in which materials having different mechanical properties are stacked, and the upper and lower plating distributions are different based on the intermediate layer, and when the SR (solder resist) is used, this part has a different anisotropic structure. Such anisotropic laminated structures show different thermal behaviors between layers depending on thermal stress or humidity, so that deformations such as bending or warping occur at weak points in the structure.

In addition, as the semiconductor substrate is gradually thinned, deformation such as warpage and torsion is increased due to heat stress and moisture absorption generated during manufacturing of the substrate, and warpage phenomenon occurring in the substrate increases as the reflow temperature condition increases during packaging. This is the main cause of defects during packaging work.

In order to improve this, conventionally, a method of inserting a deformation preventing material in the manufacturing of a substrate was used, but there was a problem in that an additional cost was generated and the thickness of the substrate was also increased. In addition, the warp may be prevented by stacking materials having different coefficients of thermal expansion, but this method has a problem in that deformation is impossible to be suppressed when locally warping or wave-like repeated deformation occurs.

The present invention provides a method for forming a printed circuit board that can prevent deformation of the substrate by increasing the size of the plated particles so as to have a rigid area that is susceptible to deformation when the circuit of the printed circuit board is formed by electroplating. will be.

According to an aspect of the present invention, a method for forming a circuit on a printed circuit board having a strain-vulnerable region in which deformation is predicted, comprising: depositing a conductive material on a substrate to form a seed layer, and stacking a photosensitive film on the seed layer Selectively removing a portion of the photosensitive film corresponding to the position where the circuit is to be formed, and seeding layer so that the plated particles formed in the strain-vulnerable region are larger than the plated particles formed in the region other than the strain-vulnerable region. Provided is a method for forming a printed circuit board comprising electroplating in an electrolyte solution with an electrode.

In this case, the method may further include removing the photosensitive film layer remaining on the substrate and removing the seed layer exposed to the outside.

The electroplating may include a first step of plating the strain-vulnerable region and a second step of plating a region other than the strain-vulnerable region, wherein the current density of the first stage is smaller than the current density of the second stage. Can be.

In addition, the electrolyte solution includes a plating additive, and the electroplating may include a first step of plating the strain-vulnerable region and a second step of plating a region other than the strain-vulnerable region, and the plating additive of the first stage may be The concentration of the plating additive of the two stages may be characterized by different.

In this case, the first step may include forming a first coating layer that suppresses the plating layer formation in the strain-vulnerable region, plating the first electrolyte solution containing the plating additive at a first concentration, and removing the first coating layer. The second step may include forming a second coating layer that suppresses formation of a plating layer in a region other than the strain-vulnerable region, plating a second electrolyte solution containing a plating additive at a second concentration, and forming a second coating layer. It may include the step of removing.

By increasing the size of the plated particles in the strain-vulnerable region of the printed circuit board, mechanical stiffness is controlled for each part, thereby preventing deformation of the substrate without additionally inserting a separate material, and manufacturing a thin substrate.

As the invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description. However, this is not intended to limit the present invention to specific embodiments, it should be understood to include all transformations, equivalents, and substitutes included in the spirit and scope of the present invention. In the following description of the present invention, if it is determined that the detailed description of the related known technology may obscure the gist of the present invention, the detailed description thereof will be omitted.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms are only used to distinguish one component from another.

An embodiment of a method for forming a printed circuit board circuit according to the present invention will be described in detail with reference to the accompanying drawings, in the following description with reference to the accompanying drawings, the same or corresponding components are given the same reference numerals and duplicated thereto. The description will be omitted.

1 is a flow chart showing a printed circuit board forming method according to an embodiment of the present invention, Figure 2 is a schematic diagram of a circuit formed by the deposition of the plating particles, Figure 3 is the stress of the strain according to the size of the plating particles The figure which shows the change. 4 is a cross-sectional view showing a part of a region other than the strain-vulnerable region of the printed circuit board according to an embodiment of the present invention, and FIG. 5 is a portion of the strain-vulnerable region of the printed circuit board according to the embodiment of the present invention. 6 is a cross-sectional view of a portion, and FIG. 6 is a plan view of a printed circuit board according to an exemplary embodiment. 7 to 16 are cross-sectional views illustrating each step of the method for forming a printed circuit board according to an embodiment of the present invention. 2 to 17, the insulating layer 10, the seed layer 11, the photosensitive film layer 12 ′, the plating resist 12, the first coating layer 13, the second coating layer 14, and deformation The circuit pattern 15 of the fragile region, the circuit pattern 16 of the region other than the strain fragile region, the plated particles 17 of the strain fragile region, and the plated particles 18 of the region other than the strain fragile region are shown.

In the method of forming a printed circuit board according to the present embodiment, by increasing the size of the plated particles in the strain-vulnerable region, the rigidity of the printed circuit board may be increased to prevent deformation of the printed circuit board.

The printed circuit board circuit forming method according to the present embodiment is a method of forming a circuit on a substrate having a strain weakening region (B) where deformation is predicted. The seed layer 11 is formed by depositing a conductive material on the insulating layer 10. Forming photoresist, stacking the photosensitive film layer 12 'on the seed layer 11, selectively exposing and developing the photosensitive film layer 12' so as to open an area corresponding to the position where the circuit is to be formed. Removing the portion and electroplating the seed layer 11 in the electrolyte solution with an electrode so that the plated particles are formed in the strain-vulnerable region (B) so that the mechanical stiffness is controlled for each portion to separate the material. It is possible to prevent deformation of the substrate without additional insertion and to manufacture a thin substrate.

Referring to the method of forming the circuit according to the present embodiment, first, as shown in FIG. 7, the seed layer 11 is formed by depositing a conductive material on the insulating layer 10 (S110). A method of forming a circuit on a substrate includes an additive method and a subtract method. In this embodiment, a method of forming a circuit by an additive method is provided.

In the additive method, a circuit is formed by selectively depositing a metal layer on the insulating layer 10. When the circuit is formed by an electrolytic plating method, the insulating layer 10 is not electrically conductive, so electrolytic plating cannot be performed. A seed layer capable of functioning as an electrode is formed. The seed layer 11 refers to a base layer in which a conductive material is chemically coated on the insulating layer so that plating of a predetermined thickness is formed on the insulating layer 10, and then electroplating with the electrode. The seed layer 11 may be formed by a deposition method or a sputtering method of a conductive metal.

Next, as shown in FIGS. 8 and 9, the photosensitive film layer 12 ′ is laminated on the seed layer 11 (S120), and the photosensitive film layer ( 12 ') is selectively exposed and developed and a portion thereof is removed to form a plating resist 12 (S130). In order to form the circuit, the plating resist 12 is formed to cover the portion other than the region where the circuit will be formed so as not to be plated.

In this embodiment, the photoresist film layer 12 'is laminated, the photoresist film layer 12 is selectively exposed and developed, and a part thereof is removed to open an area corresponding to the position where the circuit is to be formed, thereby opening the plating resist 12. It shows how to form.

In the case of the inkjet printing method, the plating resist 12 may be selectively formed only on a portion other than the circuit where the circuit is to be formed. However, when the photosensitive film layer 12 is applied to the entire substrate, except for the portion where the circuit is to be formed. If only the region is exposed and cured, and then the photosensitive film layer 12 'of the uncured region is removed, only the portion where the circuit will be formed is opened.

However, the present invention is not limited thereto, and a method obvious to those skilled in the art, such as a screen printing method or an inkjet printing method, may be used as a method of forming the plating resist 12.

Next, the seed layer 11 is electroplated from the electrolyte solution using the seed layer 11 as an electrode so that the plating particles are largely formed in the strain-vulnerable region B (S140). When the electroplating is performed, fine plating particles are deposited to form a plating layer. 2 shows a circuit formed by depositing plating particles. On the drawing, the plated particles were exaggerated to draw a large size, but in reality, finely formed to a size of about 10nm.

The stress of the circuit changes according to the size of the plated particles constituting the circuit. As shown in FIG. 3, when the size of the plated particles is large, the stress value for a certain strain is increased and the deformation due to external force is small.

The deformation fragile area B means a portion vulnerable to deformation in the printed circuit board. The stress may vary from stress to deformation such as shrinkage expansion due to heat, stress to which the coefficient of thermal expansion varies according to a member difference, and means a portion in which deformation is largely generated.

Therefore, since the overall deformation of the substrate can be reduced by reinforcing the rigidity of the strain-vulnerable region B, a technique for reinforcing the strain-vulnerable region B is attracting attention as an important technique in the manufacture of the substrate. Deformation is caused by various factors depending on the design of the substrate, such as the material of the substrate, the shape of the circuit, the solder, and the location of the chip.These components are analyzed in combination to perform structural analysis simulation through computer aided engineering (CAE). Through the deformation vulnerability region (B) can be predicted.

Through the simulation, the size of the plated particles of the circuit formed in the strain fragile region B may be larger than the plated grains in the regions other than the strain fragile region, thereby increasing the rigidity of the strain fragile region to prevent overall deformation of the substrate. have. For example, as shown in FIG. 6, the A region having a dense circuit is resistant to deformation, but the B region having almost no circuit is formed with less plating layer, resulting in a severe deformation deformation region due to external force. Therefore, by increasing the size of the plated particles in the strain-vulnerable region B, the rigidity of the strain-vulnerable region B can be increased to prevent overall deformation of the substrate. As described above, the strain-vulnerable region B is simply a circuit. It is not determined by the density of the substrate alone, but may be determined by various factors such as the material of the substrate, the location of the solder or the chip.

FIG. 4 shows plated particles formed in the region A other than the strain weakened region, and FIG. 5 shows plated particles formed in the strain weakened region B. FIG. The size of the plated particles 17 in the strain-vulnerable region may be larger than that of the plated particles 18 in the region other than the strain-vulnerable region, thereby minimizing strain on stress.

In the method of forming the plating particles 17 of the strain-vulnerable region large by performing electroplating, the plating stages of the strain-vulnerable region B and the region A other than the strain-vulnerable region are separated and a current is applied in each plating stage. By varying the density or by varying the concentration of the plating additive, the size of the plating particles 17 in the strain-vulnerable region may be increased.

The method of increasing the plating particles 17 in the strain-vulnerable region by changing the concentration of the plating additive and the type of the plating additive will be described in detail. Plating additives are used to control the size of the plated particles to improve plating glossiness, to aid or level the plating better. Plating additives include wetting agents, brightening agents, leveling agents and the like.

Wetting agent (Wetting Agent, Carrier, Suppresser) is an anti-fit agent that prevents the plating from minutely protruding from the plating surface. If you look at the phenomenon of plating in detail, a growth point is generated and the metal particles adhere to each other based on the growth point, and the speed is adjusted to prevent excessive growth, so that the plating is evenly performed.

Grain refiners (brighteners) play a role in making the plating surface shiny by making the plating particles small. The polish component remains on the surface of the last layer of plating.

Leveling agent (Leveler: Cationic Surfactant) plays a role of widening the plating range by smoothing minute irregularities and polishing marks.

When plating the strain-vulnerable region, it is possible to control the size of the plated particle to be larger by using a different plating additive or by varying the concentration of the plating additive.

Looking at the method of increasing the plating particles in the strain-vulnerable region by varying the concentration of the plating additive and the type of the plating additive, as shown in Figure 10 and 11, plating in the area (A) other than the strain-vulnerable region To form a first coating layer 13 to suppress (S141). Then, plating is performed in the first electrolyte solution (S142). The region A other than the strain weakening region A may not be plated by the first coating layer 13, but only the strain weakening region B may be plated to form the circuit pattern 15 of the strain weakening region.

As shown in FIGS. 12 and 13, the first coating layer 13 is removed (S143), and a second coating layer 14 for suppressing plating is formed in the strain-vulnerable region B (S144). Next, as shown in FIG. 14, the substrate on which the second coating layer 14 is formed is immersed in a second electrolyte solution and plated (S145). The second electrolyte solution allows the plated particles to be formed larger than the first electrolyte solution. That is, the first electrolyte solution and the second electrolyte solution can be adjusted so that the concentration of the plating additive or the type of the additive is different so that the size of the plating particles is different.

For example, in the case of a brightening agent or a smoothing agent, since the size of the plated particles is smaller, the plated particles are formed larger when the concentration is lower in the strain-vulnerable region (B).

Next, as shown in FIG. 15, when the second coating layer 14 is removed (S146), the size of the plated particles 17 of the strain-vulnerable region is larger than that of the plated particles 18 of the region other than the strain-vulnerable region. The circuit board circuit is completed.

On the other hand, by separating the plating step of the strain-vulnerable region (B) and the region (A) other than the strain-vulnerable region by varying the current density in each plating step, the size of the plated particles of the strain-vulnerable region can be increased.

In electrolytic plating, when a current is flowed by connecting a substrate to a cathode in an electrolytic cell containing an electrolyte solution, a substrate to be formed with a circuit is electroplated while metal ions in the electrolyte solution adhere to the substrate.

In general, when the current density of the electrolytic cell is lowered, the plating proceeds slowly and the size of the particles increases. Looking at the method of forming the plated particles largely in the strain-vulnerable region B by changing the current density, FIGS. 10 and FIG. As shown in FIG. 11, a first coating layer 13 is formed on the region A other than the strain-vulnerable region, and is immersed in an electrolytic cell, and the current density lower than the current density when plating the region A other than the strain-vulnerable region. The deformation weakening area B is plated with a.

12 to 14, the second coating layer 14 is formed to remove the first coating layer 13 and prevent plating in the strain-vulnerable region B, and soak the electrolytic cell in the strain-vulnerable region B. When the area A other than the strain-vulnerable region is plated at a current density higher than the current density at the time of plating, the plated particles of the circuit pattern 15 of the strain-vulnerable region become the plated particles of the circuit pattern 16 of the region other than the strain-vulnerable region. Is formed larger.

Plating can be performed simultaneously by differently applying current densities of the strain-vulnerable region B and the region A other than the strain-vulnerable region. The seed layer of the strain-vulnerable region B and the region A other than the strain-vulnerable region is If the circuit is blocked so as not to be electrically connected to each region at different current densities, a circuit pattern can be formed with different plating particle sizes in one electrolyzer at the same time.

After forming the circuit pattern, the photosensitive film layer 12 remaining on the substrate is removed (S160), and the seed layer 11 exposed to the outside is removed (S170).

As described above in this embodiment, by increasing the size of the plated particles in the strain-vulnerable region, the mechanical stiffness can be adjusted for each part to prevent deformation of the substrate, and the semiconductor and the bonding defects due to the deformation of the substrate are eliminated. can do.

The embodiments of the printed circuit board circuit forming method according to various aspects of the present invention have been described above, and many embodiments other than the above-described embodiments exist within the claims of the present invention.

1 is a flow chart showing a printed circuit board circuit forming method according to an embodiment of the present invention.

2 is a schematic diagram of a circuit formed by depositing plating particles.

3 is a view showing a change in stress for the strain according to the size of the plating particles.

4 is a cross-sectional view showing a part of a region other than a strain-vulnerable region of a printed circuit board according to an exemplary embodiment of the present invention.

5 is a cross-sectional view showing a part of a deformation vulnerability area of a printed circuit board according to an exemplary embodiment of the present invention.

6 is a plan view showing a printed circuit board according to an embodiment of the present invention.

7 to 17 are cross-sectional views illustrating respective steps of a method for forming a printed circuit board according to an embodiment of the present invention.

<Main Drawing Number>

10: insulation layer

11: seed layer

12: photosensitive film layer

13: first coating layer

14: second coating layer

15: Circuit pattern of strain weak area

16: Circuit pattern in areas other than the strain weak area

17: plated particles in the strain-vulnerable area

18: Plating particles in areas other than the strain weakening area

Claims (5)

A method of forming a circuit on a printed circuit board having a strain weakening area where deformation is predicted, Depositing a conductive material on the insulating layer to form a seed layer; Stacking a photosensitive film layer on the seed layer; Selectively exposing and developing the photosensitive film layer so as to open an area corresponding to a position where the circuit is to be formed; And And electroplating the seed layer with an electrode in an electrolyte solution so that the plated particles formed in the strain-vulnerable region are larger than the plated particles formed in the region other than the strain-vulnerable region. The method of claim 1 After the electroplating step Removing the photosensitive film layer remaining on the substrate; And The method of claim 1, further comprising removing a seed layer exposed to the outside. The method of claim 1, The electroplating step, A first step of plating the strain-vulnerable region and Including a second step of plating a region other than the strain-vulnerable region, The current density of the first step is less than the current density of the second step circuit forming method of the printed circuit board. The method of claim 1 The electrolyte solution comprises a plating additive, The electroplating step, A first step of plating the strain-vulnerable region and Including a second step of plating a region other than the strain-vulnerable region, The plating additive of the first step is a circuit forming method of a printed circuit board, characterized in that the concentration of the plating additive of the second step is different. The method of claim 4, wherein The first step, Forming a first coating layer for suppressing formation of a plating layer in a region other than the strain weakening region; Plating in a first electrolyte solution containing the plating additive at a first concentration; Removing the first coating layer, The second step is Forming a second coating layer on the strain-vulnerable region to suppress plating layer formation; Plating in a second electrolyte solution containing the plating additive at a second concentration; And Removing the second coating layer; and forming a printed circuit board.

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