KR20060133802A - Semiconductor package - Google Patents

Abstract

A semiconductor package is provided to reduce remarkably package size by minimizing the pitch between inner leads of a lead frame. A semiconductor package includes first and second lead frames, a semiconductor chip, a metal wire, and a molding material. The first and the second lead frame are formed like a rectangle type frame structure. Outer and inner leads(42,41,52,51) of the first and the second lead frame are inter-crossed. The semiconductor chip(60) is attached to the first and the second lead frame. The semiconductor chip includes a bonding pad(61). The metal wire(70) is used for connecting electrically the inner leads of the first and second lead frames with the bonding pad of the semiconductor chip. The molding material is used for sealing selectively the resultant structure. The first and the second lead frame are bonded to each other by using an insulating adhesive material.

Description

Semiconductor Package {Semiconductor package}

1 is a plan view of a semiconductor package according to the prior art.

2 is a plan view of a semiconductor package according to an embodiment of the present invention.

3 and 4 are views for explaining the structure of a lead frame according to the present invention.

Explanation of symbols on the main parts of the drawings

40: first lead frame 41, 51: inner lead

42, 52: outer lead 43, 53: square frame

50: second lead frame 60: semiconductor chip

61: bonding pad 70: metal wire

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package, and more particularly, to a semiconductor package capable of mounting a miniaturized semiconductor chip by changing the structure of a lead frame.

As the performance of electric and electronic products is improved, various technologies for providing high capacity semiconductor modules have been researched and developed. Here, a method for realizing a high capacity semiconductor module includes a method of achieving high integration of a device, a method of manufacturing a package in a stack structure, and reducing the size of the package, thereby increasing the number of packages in a limited size printed circuit board. There is a way to ensure that is mounted. In response to these various technologies, various types of packages such as thin small outline package (TSOP), fine pitch ball grid array (FBGA), and multi chip package (MCP) have been developed.

In general, as shown in FIG. 1, a semiconductor package 20 includes a semiconductor chip 20 having a bonding pad 21 attached to an inner lead 10 of a lead frame, and the bonding pad 21 and the lead frame. The inner lead 10 is electrically connected by the metal wire 30, and the inner lead of the semiconductor chip and the lead frame is sealed with an encapsulant (not shown).

In the conventional semiconductor package having such a configuration, the inner pad 10 of the lead frame through the metal wire 30 is maintained by the bonding pad 21 of the semiconductor chip 20 having a pitch of about 200 μm. The connection with was easy.

On the other hand, as the size of the semiconductor chip 20 gradually decreases in size and the density of the chip increases, the pitch of the bonding pads 21 is manufactured to be less than or equal to 100 μm. For this reason, the inner lead 10 of the lead frame electrically connected to the bonding pad 21 should also be reduced in size. However, since the minimum pitch of the inner lead of the lead frame is less than 150 μm at present, connection between the lead frame and the miniaturized semiconductor chip may be impossible.

Therefore, the present invention was created to solve the problems inherent in the prior art as described above, and an object of the present invention is to provide a semiconductor package capable of mounting a miniaturized semiconductor chip.

In accordance with an aspect of the present invention, a semiconductor package is provided. The package includes a rectangular frame having the same size and is formed so that the outer lead and the inner lead cross each other during up and down bonding. First and second lead frames; A semiconductor chip attached to the bonded first and second lead frames and provided with a bonding pad; A metal wire electrically connecting the inner leads and the bonding pads of the first and second lead frames; And an encapsulant sealing an area including a semiconductor chip including the metal wire and an inner lead of the first and second lead frames, wherein the first and second lead frames are disposed up and down by an insulating adhesive material. It is characterized by being bonded.

In the above configuration, the inner lead of each of the first and second lead frames is formed inside the square frame, and the outer lead is formed outside the square frame.

The first and second lead frames are joined up and down through the rectangular frame through the insulating adhesive material.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a plan view of a semiconductor package according to an embodiment of the present invention.

As illustrated, the semiconductor package according to the embodiment of the present invention includes a semiconductor chip 60 having bonding pads 61 formed on upper and lower bonded first lead frames 40 and second lead frames 50. ) Is attached. At this time, the inner leads 41 and 51 and the outer leads 42 and 52 of the first lead frame 40 and the second lead frame 50 are positioned to intersect with each other while maintaining a minimum pitch. In addition, the inner lead 41.51 of the first lead frame 40 and the second lead frame 50 and the bonding pad 61 of the semiconductor chip 60 are electrically connected by the metal wire 70. Then, the semiconductor chip 60 including the metal wire 70 and the region including the inner leads 51 and 61 of the first and second lead frames are sealed by an encapsulant (not shown), thereby completing the package. do.

In the above configuration, the semiconductor package according to the present invention overlaps the inner lead 41 by using the first lead frame 40 and the second lead frame 50 formed so that the inner lead and the outer lead cross each other when they overlap. The pitch between and 51 can be minimized. In other words, when the first and second lead frames 50 intersect, the pitch between the inner leads 41 and 51 is reduced to 50% than in the case of the first lead frame 40 and the second lead frame 50, respectively. do.

Hereinafter, the structure of the lead frame according to the present invention will be described with reference to FIGS. 3 and 4.

First, referring to FIG. 3, the first and second lead frames 40 and 50 have quadrangular frames 43 and 53 having the same size, respectively. In addition, inner leads 41 and 51 are formed inside the rectangular frames 43 and 53, respectively, and outer leads 42 and 52 are formed outside. At this time, each of the inner leads 41 and 51 and the outer leads 42 and 43 are mutually connected in the joining structure of the first lead frame 40 and the second lead frame 50, as shown in FIG. It is formed at regular intervals inside and outside the rectangular frames 43 and 53 so as to intersect. Here, the joining of the first lead frame 40 and the second lead frame 50 is performed by stacking the upper and lower portions of the respective rectangular frames 43 and 53 at the same position. At this time, in order to prevent the short between the first lead frame 40 and the second lead frame 50, each rectangular frame is bonded through a non-conductive adhesive material (not shown).

As described above, in the semiconductor package according to the present invention, by stacking two lead frames having a general inner lead pitch, the pitch between inner leads can be reduced by 50% compared to the case of using one lead frame. . Accordingly, the semiconductor package according to the present invention can be applied even when a semiconductor chip having a small pitch bonding pad is mounted.

According to the configuration of the present invention as described above, as the pitch between the inner leads of the lead frame is minimized, a semiconductor package equipped with a miniaturized semiconductor chip is possible.

While the invention has been shown and described with reference to specific embodiments, the invention is not so limited, and it is to be understood that the invention is capable of various modifications without departing from the spirit or field of the invention as set forth in the claims below. It will be readily apparent to one of ordinary skill in the art that modifications and variations can be made.

Claims (3)

First and second lead frames having a rectangular frame having the same size, and formed so that the outer lead and the inner lead intersect each other when the upper and lower joining; A semiconductor chip attached to the bonded first and second lead frames and provided with a bonding pad; A metal wire electrically connecting the inner leads and the bonding pads of the first and second lead frames; And And an encapsulant sealing an area including a semiconductor chip including the metal wire and inner leads of the first and second lead frames. The first and the second lead frame is a semiconductor package, characterized in that bonded up and down via an insulating adhesive material. The method of claim 1, The inner lead of each of the first and second lead frames is formed inside the square frame, and the outer lead is formed outside the square frame. The method of claim 1, The first and the second lead frame is a semiconductor package, characterized in that the upper and lower junctions through the rectangular frame via the insulating adhesive material.

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