KR20060126972A - 실리사이드 소스/드레인들을 가진 반도체 디바이스 - Google Patents

실리사이드 소스/드레인들을 가진 반도체 디바이스 Download PDF

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Publication number
KR20060126972A
KR20060126972A KR1020067009850A KR20067009850A KR20060126972A KR 20060126972 A KR20060126972 A KR 20060126972A KR 1020067009850 A KR1020067009850 A KR 1020067009850A KR 20067009850 A KR20067009850 A KR 20067009850A KR 20060126972 A KR20060126972 A KR 20060126972A
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South Korea
Prior art keywords
source
drain
atoms
forming
region
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KR1020067009850A
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English (en)
Korean (ko)
Inventor
드하르메쉬 자와라니
니겔 지. 카베
미카엘 렌덴
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프리스케일 세미컨덕터, 인크.
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Publication of KR20060126972A publication Critical patent/KR20060126972A/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020067009850A 2003-11-21 2004-10-26 실리사이드 소스/드레인들을 가진 반도체 디바이스 Withdrawn KR20060126972A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/718,892 2003-11-21
US10/718,892 US7262105B2 (en) 2003-11-21 2003-11-21 Semiconductor device with silicided source/drains

Publications (1)

Publication Number Publication Date
KR20060126972A true KR20060126972A (ko) 2006-12-11

Family

ID=34591179

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020067009850A Withdrawn KR20060126972A (ko) 2003-11-21 2004-10-26 실리사이드 소스/드레인들을 가진 반도체 디바이스

Country Status (5)

Country Link
US (1) US7262105B2 (enExample)
JP (1) JP2007512704A (enExample)
KR (1) KR20060126972A (enExample)
CN (1) CN1883042A (enExample)
WO (1) WO2005052992A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240035298A (ko) * 2022-09-08 2024-03-15 유나이티드 마이크로일렉트로닉스 코퍼레이션 n-형 금속 산화물 반도체 트랜지스터 및 그 제조 방법

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005294360A (ja) * 2004-03-31 2005-10-20 Nec Electronics Corp 半導体装置の製造方法
US7253071B2 (en) * 2004-06-02 2007-08-07 Taiwan Semiconductor Manufacturing Company Methods for enhancing the formation of nickel mono-silicide by reducing the formation of nickel di-silicide
US20090159111A1 (en) * 2007-12-21 2009-06-25 The Woodside Group Pte. Ltd Photovoltaic device having a textured metal silicide layer
US20090162966A1 (en) * 2007-12-21 2009-06-25 The Woodside Group Pte Ltd Structure and method of formation of a solar cell
JP2009182089A (ja) * 2008-01-30 2009-08-13 Panasonic Corp 半導体装置の製造方法
US8178430B2 (en) 2009-04-08 2012-05-15 International Business Machines Corporation N-type carrier enhancement in semiconductors
CN102867748B (zh) * 2011-07-06 2015-09-23 中国科学院微电子研究所 一种晶体管及其制作方法和包括该晶体管的半导体芯片
US8648412B1 (en) 2012-06-04 2014-02-11 Semiconductor Components Industries, Llc Trench power field effect transistor device and method

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4243433A (en) * 1978-01-18 1981-01-06 Gibbons James F Forming controlled inset regions by ion implantation and laser bombardment
JP2947654B2 (ja) * 1990-10-31 1999-09-13 キヤノン株式会社 Ｍｉｓ型トランジスタ
US5296387A (en) * 1991-03-06 1994-03-22 National Semiconductor Corporation Method of providing lower contact resistance in MOS transistor structures
JP3156436B2 (ja) * 1993-04-05 2001-04-16 日本電気株式会社 ヘテロ接合バイポーラトランジスタ
JP3219996B2 (ja) * 1995-03-27 2001-10-15 株式会社東芝 半導体装置及びその製造方法
US6399452B1 (en) * 2000-07-08 2002-06-04 Advanced Micro Devices, Inc. Method of fabricating transistors with low thermal budget
US6486062B1 (en) * 2000-08-10 2002-11-26 Advanced Micro Devices, Inc. Selective deposition of amorphous silicon for formation of nickel silicide with smooth interface on N-doped substrate
US6445016B1 (en) * 2001-02-28 2002-09-03 Advanced Micro Devices, Inc. Silicon-on-insulator (SOI) transistor having partial hetero source/drain junctions fabricated with high energy germanium implantation
US20020187614A1 (en) * 2001-04-16 2002-12-12 Downey Daniel F. Methods for forming ultrashallow junctions with low sheet resistance
US6998353B2 (en) * 2001-11-05 2006-02-14 Ibis Technology Corporation Active wafer cooling during damage engineering implant to enhance buried oxide formation in SIMOX wafers
US6638802B1 (en) * 2002-06-20 2003-10-28 Intel Corporation Forming strained source drain junction field effect transistors
US6797593B2 (en) * 2002-09-13 2004-09-28 Texas Instruments Incorporated Methods and apparatus for improved mosfet drain extension activation
US20050054164A1 (en) * 2003-09-09 2005-03-10 Advanced Micro Devices, Inc. Strained silicon MOSFETs having reduced diffusion of n-type dopants

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240035298A (ko) * 2022-09-08 2024-03-15 유나이티드 마이크로일렉트로닉스 코퍼레이션 n-형 금속 산화물 반도체 트랜지스터 및 그 제조 방법

Also Published As

Publication number Publication date
CN1883042A (zh) 2006-12-20
US7262105B2 (en) 2007-08-28
US20050112829A1 (en) 2005-05-26
WO2005052992A2 (en) 2005-06-09
WO2005052992A3 (en) 2005-10-20
JP2007512704A (ja) 2007-05-17

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PA0105 International application

Patent event date: 20060519

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid