KR20050084417A - 전자 장치, 그 제조 방법 및 호일 - Google Patents

전자 장치, 그 제조 방법 및 호일 Download PDF

Info

Publication number
KR20050084417A
KR20050084417A KR1020057011400A KR20057011400A KR20050084417A KR 20050084417 A KR20050084417 A KR 20050084417A KR 1020057011400 A KR1020057011400 A KR 1020057011400A KR 20057011400 A KR20057011400 A KR 20057011400A KR 20050084417 A KR20050084417 A KR 20050084417A
Authority
KR
South Korea
Prior art keywords
layer
foil
pattern
substrate
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020057011400A
Other languages
English (en)
Korean (ko)
Inventor
요한누스 더블유 위캠프
삼베르 마르크 에이 드
그룬스벤 에릭 씨 이 반
Original Assignee
코닌클리즈케 필립스 일렉트로닉스 엔.브이.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 코닌클리즈케 필립스 일렉트로닉스 엔.브이. filed Critical 코닌클리즈케 필립스 일렉트로닉스 엔.브이.
Publication of KR20050084417A publication Critical patent/KR20050084417A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7438—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07234—Using a reflow oven
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/076—Connecting or disconnecting of strap connectors
    • H10W72/07631—Techniques
    • H10W72/07636—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/856—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/127—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020057011400A 2002-12-20 2003-12-15 전자 장치, 그 제조 방법 및 호일 Withdrawn KR20050084417A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP02080665.9 2002-12-20
EP02080665 2002-12-20

Publications (1)

Publication Number Publication Date
KR20050084417A true KR20050084417A (ko) 2005-08-26

Family

ID=32668880

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020057011400A Withdrawn KR20050084417A (ko) 2002-12-20 2003-12-15 전자 장치, 그 제조 방법 및 호일

Country Status (8)

Country Link
US (1) US20070052091A1 (https=)
EP (1) EP1579496A2 (https=)
JP (1) JP2006511085A (https=)
KR (1) KR20050084417A (https=)
CN (1) CN100365792C (https=)
AU (1) AU2003286362A1 (https=)
TW (1) TW200416968A (https=)
WO (1) WO2004057662A2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017108130A (ja) * 2015-11-30 2017-06-15 株式会社東芝 半導体モジュール

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1774965A (zh) * 2004-03-30 2006-05-17 松下电器产业株式会社 模块元件及其制造方法
US7405476B2 (en) * 2005-10-27 2008-07-29 Lsi Logic Corporation Asymmetric alignment of substrate interconnect to semiconductor die
WO2008137511A1 (en) 2007-05-04 2008-11-13 Crossfire Technologies, Inc. Accessing or interconnecting integrated circuits
DE102007034949A1 (de) * 2007-07-26 2009-02-05 Siemens Ag Einheitlich normierte Leistungspackages
US8110912B2 (en) * 2008-07-31 2012-02-07 Infineon Technologies Ag Semiconductor device
JP5147678B2 (ja) * 2008-12-24 2013-02-20 新光電気工業株式会社 微細配線パッケージの製造方法
JP5147677B2 (ja) 2008-12-24 2013-02-20 新光電気工業株式会社 樹脂封止パッケージの製造方法
EP2242094A1 (en) 2009-04-17 2010-10-20 Nxp B.V. Foil and method for foil-based bonding and resulting package
CN109917622B (zh) 2015-04-10 2021-08-06 Asml荷兰有限公司 用于检查和量测的方法和设备
US10083781B2 (en) 2015-10-30 2018-09-25 Vishay Dale Electronics, Llc Surface mount resistors and methods of manufacturing same
US10438729B2 (en) 2017-11-10 2019-10-08 Vishay Dale Electronics, Llc Resistor with upper surface heat dissipation
TWI704628B (zh) * 2019-04-23 2020-09-11 智威科技股份有限公司 半導體元件封裝結構與半導體元件封裝方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2104262A1 (en) * 1970-02-02 1971-08-26 Int Standard Electric Corp High resolution metal or plastic screen gauze - printing plate
US4897327A (en) * 1988-05-27 1990-01-30 E. I. Du Pont De Nemours And Company Correct-reading images from photopolymer electrographic master
US5350947A (en) * 1991-11-12 1994-09-27 Nec Corporation Film carrier semiconductor device
JPH06268020A (ja) * 1993-03-10 1994-09-22 Sumitomo Electric Ind Ltd 半導体装置
DE59713027D1 (de) * 1996-09-30 2010-03-25 Infineon Technologies Ag Mikroelektronisches bauteil in sandwich-bauweise
JP2000114413A (ja) * 1998-09-29 2000-04-21 Sony Corp 半導体装置、その製造方法および部品の実装方法
US6300161B1 (en) * 2000-02-15 2001-10-09 Alpine Microsystems, Inc. Module and method for interconnecting integrated circuits that facilitates high speed signal propagation with reduced noise
US6234072B1 (en) * 2000-03-06 2001-05-22 John C. Kooima Grain husk cracking plate
JP3467454B2 (ja) * 2000-06-05 2003-11-17 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
TW511405B (en) * 2000-12-27 2002-11-21 Matsushita Electric Industrial Co Ltd Device built-in module and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017108130A (ja) * 2015-11-30 2017-06-15 株式会社東芝 半導体モジュール

Also Published As

Publication number Publication date
CN100365792C (zh) 2008-01-30
TW200416968A (en) 2004-09-01
AU2003286362A1 (en) 2004-07-14
WO2004057662A3 (en) 2004-11-04
EP1579496A2 (en) 2005-09-28
JP2006511085A (ja) 2006-03-30
WO2004057662A2 (en) 2004-07-08
US20070052091A1 (en) 2007-03-08
CN1729562A (zh) 2006-02-01

Similar Documents

Publication Publication Date Title
US7189596B1 (en) Process for forming a direct build-up layer on an encapsulated die packages utilizing intermediate structures
US7416918B2 (en) Direct build-up layer on an encapsulated die package having a moisture barrier structure
US6271469B1 (en) Direct build-up layer on an encapsulated die package
CN111370395B (zh) 心率模组的封装结构、封装方法及可穿戴设备
KR20080053241A (ko) 멀티―칩 패키지 구조 및 그 제조 방법
US7847400B2 (en) Semiconductor package substrate structure and manufacturing method thereof
EP1354351A2 (en) Direct build-up layer on an encapsulated die package
KR100319624B1 (ko) 반도체 칩 패키지 및 그 제조방법
US7886609B2 (en) Pressure sensor package
US7772033B2 (en) Semiconductor device with different conductive features embedded in a mold enclosing a semiconductor die and method for making same
KR20050084417A (ko) 전자 장치, 그 제조 방법 및 호일
TW202322224A (zh) 混合嵌埋封裝結構及其製作方法
JP2006511085A5 (https=)
JP2000124354A (ja) チップサイズパッケージ及びその製造方法
CN118099105A (zh) 电子装置及制造电子装置的方法
US8053281B2 (en) Method of forming a wafer level package
KR20220034006A (ko) 반도체 디바이스 및 반도체 제조방법
KR102124691B1 (ko) 밀집 패키지 배선을 갖는 멀티 칩 모듈 반도체 칩 패키지
TWI890392B (zh) 半導體封裝及其製造方法
RU2853895C1 (ru) Способ изготовления многокристального модуля
CN223181138U (zh) 半导体衬底的无源器件及半导体器件
CN218350539U (zh) 封装件
US20230411170A1 (en) Integrated circuit having a routable leadframe
TWI544846B (zh) 封裝載板及其製作方法
CN117976552A (zh) 一种芯片封装结构的制作方法及芯片封装结构

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000