KR20050066413A - Connecting apparatus for wafer testing system - Google Patents

Connecting apparatus for wafer testing system Download PDF

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Publication number
KR20050066413A
KR20050066413A KR1020030097699A KR20030097699A KR20050066413A KR 20050066413 A KR20050066413 A KR 20050066413A KR 1020030097699 A KR1020030097699 A KR 1020030097699A KR 20030097699 A KR20030097699 A KR 20030097699A KR 20050066413 A KR20050066413 A KR 20050066413A
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South Korea
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electrical signal
test
wafer
probe card
present
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KR1020030097699A
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Korean (ko)
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이경진
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동부아남반도체 주식회사
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Priority to KR1020030097699A priority Critical patent/KR20050066413A/en
Publication of KR20050066413A publication Critical patent/KR20050066413A/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

본 발명은 반도체 검사설비의 연결장치에 관한 것이다.The present invention relates to a connection device for semiconductor inspection equipment.

본 발명은, 주테스트설비로부터의 전기신호를 전송받아 테스트 대상인 웨이퍼에 전송하는 반도체 검사설비의 연결장치에 있어서, 상기 주테스트설비로부터의 전기신호를 저면에 형성된 다수개의 포고핀을 통해 출력하는 테스트헤드와, 상기 포고핀과 직접 접촉되는 단자를 상부에 형성하여 상기 테스트헤드로부터의 전기신호를 하부에 구비된 니들을 통해 상기 웨이퍼에 전송하는 프로브카드를 포함한다.The present invention is a connection device for a semiconductor inspection equipment that receives an electrical signal from a main test facility and transmits the electrical signal to a wafer under test, wherein the test outputs the electrical signal from the main test facility through a plurality of pogo pins formed on a bottom surface thereof. And a probe card configured to form a terminal in direct contact with the pogo pin and to transmit an electrical signal from the test head to the wafer through a needle provided at a lower portion thereof.

따라서, 정확한 측정결과를 얻을 수 있고, 연결보드의 제거로 비용절감을 이루는 효과가 있다.Therefore, accurate measurement results can be obtained and cost reduction can be achieved by removing the connection board.

Description

반도체 검사설비의 연결장치{CONNECTING APPARATUS FOR WAFER TESTING SYSTEM}CONNECTING APPARATUS FOR WAFER TESTING SYSTEM

본 발명은 반도체 검사설비의 연결장치에 관한 것으로써, 더욱 상세하게는 연결보드의 사용없이 테스트헤드의 포고핀과 프로브카드가 전기적으로 직접 접촉되도록 하여 정확한 측정결과를 도출하도록 하는 반도체 검사설비의 연결장치에 관한 것이다.The present invention relates to a connecting device for semiconductor inspection equipment, and more particularly, to connecting the semiconductor inspection equipment to obtain accurate measurement results by directly contacting the pogo pin of the test head and the probe card without using a connection board. Relates to a device.

일반적으로, 반도체 제조공정에서는 일련의 웨이퍼 가공공정을 수행함으로써, 웨이퍼상에 다수의 칩(chip)을 형성한다.In general, in a semiconductor manufacturing process, a plurality of chips are formed on a wafer by performing a series of wafer processing steps.

그리고, 웨이퍼상에 형성된 각 칩의 전기적특성 검사를 통해 정상 또는 비정상 여부를 선별(sorting)하는 공정을 진행하며, 이를 위해 전기신호를 발생시키는 한편 인가한 신호를 통해 읽은 데이터를 판독하여 칩이 올바르게 동작하는지를 판단하는 검사설비가 사용되며, 이 검사설비와 검사대상의 웨이퍼는 연결장치를 통해 연결된다.In addition, a process of sorting normal or abnormal through a test of electrical characteristics of each chip formed on a wafer is performed. For this purpose, an electric signal is generated, and the data is read through an applied signal to ensure that the chip is correctly An inspection apparatus is used to determine whether it works, and the inspection apparatus and the wafer to be inspected are connected through a connecting device.

도 1은 종래의 연결장치를 각 단위별로 분리하여 나타낸 도면이다.1 is a diagram showing a conventional connection device separated by each unit.

연결장치(10)는 주테스트설비(20)와 검사대상인 웨이퍼(30)를 상호 도전된 상태로 연결시키기 위한 것으로, 테스트헤드(test head)(11), 연결보드(12) 및 프로브카드(probe card)(13)를 포함하여 구성되며, 연결장치(10)는 주테스트설비(20)와 신호선으로 연결되며, 검사대상인 웨이퍼(30)와는 프로브카드(13)의 니들(needle)(13a)을 통해 연결된다.The connection device 10 is for connecting the main test facility 20 and the wafer 30 to be inspected with each other in a conductive state. The test head 11, the connection board 12, and the probe card are provided. card (13), the connecting device 10 is connected to the main test equipment 20 and the signal line, and the wafer (30) to be examined and the needle (needle) (13a) of the probe card (13) Connected through.

테스트헤드(11)는 상자모양으로 그 저면을 통해 하측으로 돌출된 다수개의 포고핀(pogo pin)(11a)을 구비한다.The test head 11 has a plurality of pogo pins 11a protruding downward through the bottom thereof in a box shape.

연결보드(12)는 상판(12a), 하판(12b) 및 이들을 연결하는 와이어(12c)로 구성되며, 테스트헤드(11)의 포고핀(11a)이 상판(12a)상의 단자에 접촉되고, 하판(12b)상의 단자를 통해 프로브카드(13)의 상부에 형성된 단자와 접촉된다.The connection board 12 is composed of an upper plate 12a, a lower plate 12b, and a wire 12c connecting them, and the pogo pins 11a of the test head 11 are in contact with the terminals on the upper plate 12a. It contacts with the terminal formed in the upper part of the probe card 13 via the terminal on 12b.

프로브카드(13)는 원형의 인쇄회로기판으로 이루어져, 상부에는 연결보드(12) 하판(12b)의 단자와 접촉되는 단자가 구비되고, 하부에는 예리한 접촉부위를 갖는 니들(13a)이 구비되어 검사대상의 웨이퍼(30)와 접촉된다.Probe card 13 is made of a circular printed circuit board, the upper part is provided with a terminal in contact with the terminal of the lower board 12b of the connection board 12, the lower end is provided with a needle (13a) having a sharp contact portion The wafer 30 is in contact with the object.

이와 같은 구조를 갖는 종래의 연결장치에서는 외부 진동, 포고핀(11a) 불량 등에 의해 테스트헤드(11)와 연결보드(12)간에 접촉이 이루어지지 않거나 틀어지는 문제가 자주 발생하여, 부정확한 측정결과로 웨이퍼 스크랩(scrap)을 발생시키는 문제점이 있었다.In the conventional connection device having such a structure, a problem occurs in which contact between the test head 11 and the connection board 12 is not made or is distorted due to external vibration, poor pogo pin 11a, etc., resulting in inaccurate measurement results. There has been a problem of generating wafer scrap.

그리고, 단지 테스트헤드(11)와 프로브카드(13)간의 커넥터(connnector) 역할만을 하는 연결보드(12)의 개재로 인해 테스트헤드(11)에서 인가된 전기신호의 누설(leakage)이 발생되어 저전류 측정이 어려우며, 연결보드(12)를 정기적으로 복구해야 하는 등 번거롭고 비용이 발생되는 문제점도 있었다.Then, the leakage of the electrical signal applied from the test head 11 is generated due to the intervening of the connection board 12 which serves only as a connector between the test head 11 and the probe card 13. Current measurement is difficult, there is also a problem that is cumbersome and costly, such as need to periodically repair the connection board (12).

본 발명은 상기와 같은 제반 문제점을 해결하기 위하여 창안된 것으로써, 연결보드의 사용없이 테스트헤드의 포고핀과 프로브카드가 직접 접촉되는 방식의 반도체 검사설비의 연결장치를 제공하는데 그 목적이 있다.The present invention has been made to solve the above problems, and an object of the present invention is to provide a connection device of a semiconductor inspection equipment in which the pogo pin of the test head and the probe card directly contact without using a connection board.

상술한 목적을 달성하기 위한 본 발명은, 주테스트설비로부터의 전기신호를 전송받아 테스트 대상인 웨이퍼에 전송하는 반도체 검사설비의 연결장치에 있어서, 상기 주테스트설비로부터의 전기신호를 저면에 형성된 다수개의 포고핀을 통해 출력하는 테스트헤드와, 상기 포고핀과 직접 접촉되는 단자를 상부에 형성하여 상기 테스트헤드로부터의 전기신호를 하부에 구비된 니들을 통해 상기 웨이퍼에 전송하는 프로브카드를 포함하는 반도체 검사설비의 연결장치를 제공한다. The present invention for achieving the above object is a connection device of a semiconductor inspection equipment for receiving an electrical signal from the main test facility and transmits it to the wafer to be tested, a plurality of electrical signals formed on the bottom surface of the main test facility A semiconductor test including a test head for outputting through a pogo pin, and a probe card for forming a terminal in direct contact with the pogo pin and transmitting an electrical signal from the test head to the wafer through a needle provided at a lower portion thereof Provide connection of equipment.

본 발명의 상기 목적과 여러가지 장점은 이 기술분야에 숙련된 사람들에 의해 첨부된 도면을 참조하여 아래에 기술되는 발명의 바람직한 실시예로부터 더욱 명확하게 될 것이다.The above objects and various advantages of the present invention will become more apparent from the preferred embodiments of the invention described below with reference to the accompanying drawings by those skilled in the art.

이하, 첨부된 도면을 참조로 본 발명의 바람직한 실시예를 상세히 설명하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도 2는 본 발명에 따른 반도체 검사설비의 연결장치를 나타내는 도면이다.2 is a view showing a connection device of a semiconductor inspection equipment according to the present invention.

연결장치(100)는 테스트헤드(110)와 프로브카드(130)로 구성되며, 주테스트설비(20)와는 신호선으로 연결되며, 검사대상인 웨이퍼(30)와는 프로브카드(130)의 니들(130a)을 통해 연결된다.The connection device 100 includes a test head 110 and a probe card 130, and is connected to the main test facility 20 by a signal line, and the needle 30a of the probe card 130 is connected to the wafer 30 to be inspected. Is connected through.

테스트헤드(110)에는 그 저면을 통해 하측으로 돌출된 다수개의 포고핀(110a)이 구비되는데, 본 발명에 따르면, 이 포고핀(110a)은 프로브카드(130)의 상부에 형성된 단자와 직접 접촉을 이루게 된다.The test head 110 is provided with a plurality of pogo pins 110a protruding downward through the bottom thereof, and in accordance with the present invention, the pogo pins 110a are in direct contact with the terminals formed on the top of the probe card 130. Will be achieved.

이를 위해, 프로브카드(130)의 인쇄회로기판 상면에 구비되는 단자의 개수 및 배열은 테스트헤드(110)의 포고핀(110a)과 대응되도록 결정된다.To this end, the number and arrangement of terminals provided on the upper surface of the printed circuit board of the probe card 130 is determined to correspond to the pogo pin (110a) of the test head (110).

이로써, 종래의 연결보드(12)가 제거되어, 연결보드(12)로 인한 전기신호의 누설을 줄임으로써 저전류 측정이 가능하고, 종국적으로 정확한 측정결과를 얻을 수 있게 된다.Thus, the conventional connection board 12 is removed, thereby reducing the leakage of the electrical signal due to the connection board 12, it is possible to measure the low current, and eventually accurate measurement results can be obtained.

이상, 상기 내용은 본 발명의 바람직한 일 실시예를 단지 예시한 것으로 본 발명의 당업자는 본 발명의 요지를 변경시킴이 없이 본 발명에 대한 수정과 변경을 가할 수 있음을 인지해야 한다.In the foregoing description, it should be understood that those skilled in the art can make modifications and changes to the present invention without changing the gist of the present invention as merely illustrative of a preferred embodiment of the present invention.

본 발명에 따르면, 정확한 측정결과를 얻을 수 있고, 연결보드의 제거로 비용절감을 이루는 효과가 달성될 수 있다.According to the present invention, accurate measurement results can be obtained, and cost reduction effect can be achieved by removing the connection board.

도 1은 종래의 반도체 검사설비의 연결장치를 개략적으로 나타내는 도면,1 is a view schematically showing a connection device of a conventional semiconductor inspection equipment,

도 2는 본 발명에 따른 반도체 검사설비의 연결장치를 나타내는 도면이다.2 is a view showing a connection device of a semiconductor inspection equipment according to the present invention.

<도면의 주요부분에 대한 부호의 설명><Description of the symbols for the main parts of the drawings>

10, 100 : 연결장치 11, 110 : 테스트헤드(test head)10, 100: connection device 11, 110: test head

11a, 110a : 포고핀(pogo pin) 12 : 연결보드11a, 110a: pogo pin 12: connection board

12a : 상판 12b : 하판12a: top plate 12b: bottom plate

12c : 와이어 13, 130 : 프로브카드(probe card)12c: wire 13, 130: probe card

13a, 130a : 니들(needle) 20 : 주테스트설비13a, 130a: needle 20: main test equipment

30 : 웨이퍼30: wafer

Claims (1)

주테스트설비로부터의 전기신호를 전송받아 테스트 대상인 웨이퍼에 전송하는 반도체 검사설비의 연결장치에 있어서,In the connecting device of the semiconductor inspection equipment for receiving an electrical signal from the main test equipment and transmitting it to the wafer under test, 상기 주테스트설비로부터의 전기신호를 저면에 형성된 다수개의 포고핀을 통해 출력하는 테스트헤드와,A test head for outputting an electrical signal from the main test facility through a plurality of pogo pins formed on a bottom surface thereof; 상기 포고핀과 직접 접촉되는 단자를 상부에 형성하여 상기 테스트헤드로부터의 전기신호를 하부에 구비된 니들을 통해 상기 웨이퍼에 전송하는 프로브카드를 포함하는 반도체 검사설비의 연결장치.And a probe card formed at an upper portion of the terminal in direct contact with the pogo pin to transmit an electrical signal from the test head to the wafer through a needle provided at a lower portion thereof.
KR1020030097699A 2003-12-26 2003-12-26 Connecting apparatus for wafer testing system KR20050066413A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100712561B1 (en) * 2006-08-23 2007-05-02 삼성전자주식회사 Wafer type probe card and method for fabricating the same and semiconductor test apparatus having wafer type probe card
KR100853402B1 (en) * 2006-12-27 2008-08-21 주식회사 아이티엔티 connecting apparatus for semiconductor device test system
US7479793B2 (en) 2006-01-24 2009-01-20 Samsung Electronics Co., Ltd. Apparatus for testing semiconductor test system and method thereof
CN115825835A (en) * 2023-02-09 2023-03-21 苏州联讯仪器股份有限公司 Low-leakage-current calibration system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7479793B2 (en) 2006-01-24 2009-01-20 Samsung Electronics Co., Ltd. Apparatus for testing semiconductor test system and method thereof
KR100712561B1 (en) * 2006-08-23 2007-05-02 삼성전자주식회사 Wafer type probe card and method for fabricating the same and semiconductor test apparatus having wafer type probe card
KR100853402B1 (en) * 2006-12-27 2008-08-21 주식회사 아이티엔티 connecting apparatus for semiconductor device test system
CN115825835A (en) * 2023-02-09 2023-03-21 苏州联讯仪器股份有限公司 Low-leakage-current calibration system

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