KR20040002003A - 반도체 소자의 제조방법 - Google Patents
반도체 소자의 제조방법 Download PDFInfo
- Publication number
- KR20040002003A KR20040002003A KR1020020037340A KR20020037340A KR20040002003A KR 20040002003 A KR20040002003 A KR 20040002003A KR 1020020037340 A KR1020020037340 A KR 1020020037340A KR 20020037340 A KR20020037340 A KR 20020037340A KR 20040002003 A KR20040002003 A KR 20040002003A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- heat treatment
- gate electrode
- semiconductor device
- metal layer
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 46
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 25
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 23
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 22
- 238000010438 heat treatment Methods 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 238000002955 isolation Methods 0.000 claims abstract description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 239000011259 mixed solution Substances 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 2
- 238000004528 spin coating Methods 0.000 claims description 2
- 238000004140 cleaning Methods 0.000 claims 2
- 239000000463 material Substances 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 6
- 230000010354 integration Effects 0.000 abstract description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 8
- 238000005468 ion implantation Methods 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- 238000005530 etching Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- KPSZQYZCNSCYGG-UHFFFAOYSA-N [B].[B] Chemical compound [B].[B] KPSZQYZCNSCYGG-UHFFFAOYSA-N 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000010363 phase shift Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66492—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a pocket or a lightly doped drain selectively formed at the side of the gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (8)
- (a) 반도체 기판에 소자 분리막을 형성하는 단계;(b) 상기 반도체 기판 상에 게이트 전극을 형성하는 단계;(c) 상기 게이트 전극의 양측의 상기 반도체 기판에 소오스/드레인 영역을 형성하는 단계;(d) 전체 구조 상부에 제1 금속층을 증착한 후 제1 열처리공정을 실시하여, 상기 상기 소오스/드레인 영역과 상기 게이트 전극 상에 제1 실리사이드층을 형성하는 단계;(e) 상기 게이트 전극의 제1 실리사이드층이 노출되도록 전체구조 상부에 희생 절연막을 형성하는 단계;(f) 전체 구조 상부에 제2 금속층을 증착한 후 제2 열처리공정을 실시하여, 상기 게이트 전극 상에 형성된 제1 실리사이드층 상에 제2 실리사이드층을 형성하는 단계; 및(g) 상기 희생 절연막을 제거한 후, 전체 구조 상부에 대하여 제3 열처리공정을 실시하여 상기 제1 실리사이드층과 상기 제2 실리사이드층을 상변이 시켜 샐리사이드층을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서,상기 제1 금속층 및 제2 금속층은, 니켈 금속인 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서,상기 제1 금속층은, 접합 누설전류를 고려하여 50 내지 100Å의 두께로 형성하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서,상기 제2 금속층은, 100 내지 200Å의 두께로 형성하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서,상기 제1 열처리공정 및 제2 열처리공정은, RTP 공정으로 400 내지 500℃의 온도범위에서 실시하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서,상기 희생 절연막은, 스핀코팅방식을 이용하여 산화막 또는 질화막으로 형성하되, 상기 게이트 전극의 높이의 2/3의 범위에서 형성하거나, 800 내지 1500Å의 두께로 형성하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서,상기 (e)단계전에, 상기 제1 열처리공정시, 미반응되고 잔재하는 미반응물질을 제거하기 위하여 세정공정을 실시하는 단계를 더 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 7 항에 있어서,상기 세정공정은, H2SO4와 H2O2를 혼합한 혼합용액을 이용하여 실시하는 것을 특징으로 하는 반도체 소자의 제조방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020020037340A KR100880336B1 (ko) | 2002-06-29 | 2002-06-29 | 반도체 소자의 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020020037340A KR100880336B1 (ko) | 2002-06-29 | 2002-06-29 | 반도체 소자의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20040002003A true KR20040002003A (ko) | 2004-01-07 |
KR100880336B1 KR100880336B1 (ko) | 2009-01-28 |
Family
ID=37313732
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020020037340A KR100880336B1 (ko) | 2002-06-29 | 2002-06-29 | 반도체 소자의 제조방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100880336B1 (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7238612B2 (en) | 2004-03-05 | 2007-07-03 | Samsung Electronics Co., Ltd. | Methods of forming a double metal salicide layer and methods of fabricating semiconductor devices incorporating the same |
US7605068B2 (en) | 2005-11-04 | 2009-10-20 | Electronics And Telecommunications Research Institute | Semiconductor device having a silicide layer and manufacturing method thereof |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100223736B1 (ko) * | 1996-06-25 | 1999-10-15 | 김영환 | 반도체 소자 제조 방법 |
KR19980085262A (ko) * | 1997-05-28 | 1998-12-05 | 문정환 | 실리사이드 형성방법 |
JP3389075B2 (ja) * | 1997-10-01 | 2003-03-24 | 株式会社東芝 | 半導体装置の製造方法 |
KR100334866B1 (ko) * | 1998-12-28 | 2002-10-25 | 주식회사 하이닉스반도체 | 반도체소자의트랜지스터형성방법 |
-
2002
- 2002-06-29 KR KR1020020037340A patent/KR100880336B1/ko active IP Right Grant
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7238612B2 (en) | 2004-03-05 | 2007-07-03 | Samsung Electronics Co., Ltd. | Methods of forming a double metal salicide layer and methods of fabricating semiconductor devices incorporating the same |
US7666786B2 (en) | 2004-03-05 | 2010-02-23 | Samsung Electronics Co., Ltd. | Methods of fabricating semiconductor devices having a double metal salicide layer |
US7605068B2 (en) | 2005-11-04 | 2009-10-20 | Electronics And Telecommunications Research Institute | Semiconductor device having a silicide layer and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
KR100880336B1 (ko) | 2009-01-28 |
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