KR20030064466A - Active matrix display device - Google Patents

Abstract

PURPOSE: An active matrix display is provided to reduce an over-header of a hardware and improve the uniformity of the image quality by minimizing a precharge circuit part. CONSTITUTION: An active matrix display includes a plurality of gate lines(X1,X2), a plurality of signal lines(Y1,Y12), a plurality of pixels, a vertical scan circuit, a plurality of HP scanners, and a plurality of analog switch portions. The gate lines are arranged in a row. The signal lines are arranged in a column. The pixels are arranged on intersections between the gate lines and the column lines. The vertical scan circuit is used for scanning sequentially each gate line during a vertical period. The HP scanners are used for outputting switching control signals for each signal lines during a horizontal period. The analog switch portions switches selectively images signals or precharge signals to the signal lines according to the switching control signals. The HP scanners are driven during the horizontal period. A precharge signal is applied earlier than an image signal during the unit horizontal period of the HP scanners.

Description

Active matrix display device {ACTIVE MATRIX DISPLAY DEVICE}

The present invention relates to an active matrix display device using a thin film transistor or the like as a pixel driving switching element. More particularly, the present invention relates to an active matrix display device having a minimum circuit for precharge.

Active matrix liquid crystal display devices powered by thin film transistors now offer fast response speeds, high color reproducibility, low power consumption, light weight, small size, and high resolution. It is actually used in high value-added products as well as notebook computers. However, in order to realize a better product and a high value-added product, there are still many problems. One of these problems is related to pixel data for driving a liquid crystal capacitor. In other words, a difference occurs between the pixel data value output from the source driver and the value charged in the actual liquid crystal capacitor to drive the liquid crystal capacitor.

This is mainly due to driving the liquid crystal capacitor by alternating pixel data at regular intervals in order to eliminate flicker of the screen and to prevent the liquid crystal from deteriorating. That is, in order to apply an AC signal at regular intervals, the polarity of the image data charged in the liquid crystal capacitor is changed, and a time delay occurs in charging the opposite polarity in the liquid crystal capacitor. The delay of the charging time is caused by the wiring resistance and the capacitor of the liquid crystal display connected in a matrix form. As a result, there is a problem that the difference between the image data value and the actual charging data value adversely affects the display characteristics and the image quality. Therefore, in order for the image data value supplied from the source driver to be transferred to the liquid crystal capacitor without distortion, the gate-on time of the thin film transistor is sufficient, and the scan signal line and the data signal line are made of a material having very good conductivity. There is a need to develop.

In addition, a method of compensating for the difference in the above-described image data values by driving a precharge circuit capable of precharging a predetermined level of voltage in a liquid crystal capacitor in a source driver has been proposed.

1 is a circuit diagram of a conventional active matrix display device having a precharge circuit. As shown in the drawing, a conventional active matrix display device includes a gate line X arranged in a row and a signal line Y arranged in a column. Further, the liquid crystal pixels LC are arranged in a matrix at the intersection of the gate line X and the signal line Y. Although the active matrix display device shown in the figure includes liquid crystal pixels, a pixel made of another electro-optic material may be used. The liquid crystal pixel LC is driven by the thin film transistor Tr. One electrode of the thin film transistor Tr is connected to the corresponding signal line Y, the other electrode is connected to the corresponding liquid crystal pixel LC, and the gate electrode is connected to the corresponding gate line X. Each of the gate lines X is connected with V scanners 1L and 1R divided into left and right to form a vertical scanning circuit. The V scanners 1L and 1R sequentially scan the vertical start pulse VST in accordance with a predetermined clock signal VCK and select one row of liquid crystal pixels LC every one horizontal period. On the other hand, each signal line Y is connected to the video signal 2 sampled by the control of the corresponding analog switch HSW 10 to receive the video signal. Moreover, the H scanner 4 is provided and the opening-and-closing control of each horizontal switch HSW is performed. Although FIG. 1 shows that one H scanner 4 is configured, the H scanner 4 may be configured as several H scanners. For example, in the case of a 5: 4 aspect ratio having 960 * 760 pixels, by providing 80 12-bit shift registers, 960 pixels attached to one row can be addressed. That is, the H scanner 4 transmits the horizontal start pulse HST in synchronization with the predetermined clock signal HCK, outputs a sampling pulse to open and close the horizontal switch HSW. A horizontal scanning circuit is constituted by the H scanner 4 and the horizontal switches HSW and 10a, and a corresponding video signal Vsig is supplied to each signal line Y, and one pixel selected in one horizontal period ( The image signal Vsig is written through the thin film transistor Tr in a conductive state with respect to LC).

At this time, the precharge signal is supplied from the precharge means 5 during the horizontal blanking period in which the image signal Vsig is not supplied in one horizontal period. The precharge signal is supplied as a line system for simultaneously supplying the precharge voltages Psig and 7 to all the pixels LC for one row by opening and closing the precharge switch PSW of the precharge control signals PC and 6. Is done. In the case of using the precharge line method as shown in FIG. 1, since the video signal is sequentially supplied by the signal line Y by the plurality of shift registers, the leakage current may be reduced due to the time delay according to the left and right positions of the pixels. Differences occur, resulting in poor quality uniformity.

FIG. 2 is a conventional active matrix circuit diagram using a precharge circuit using a shift register to solve the uniformity of the image quality of FIG. 1. Basically, the prior art of FIG. 2 is the same as the embodiment described in FIG. 1, and the same reference numerals have the same functions, and description thereof is omitted. As shown in Fig. 2, a P scanner 4b, an analog switch 10b, and a precharge signal Psig were added to the lower end of each signal line Y to precharge each cell. The P scanner 4b has a plurality of scanners provided with each scanner at a timing similar to that of the H scanner 4, unlike the method in which the precharge unit of FIG. 1 simultaneously applies the precharge signal to a plurality of cells provided in the same row. The uniformity of the image quality can be improved by applying the precharge signal in a dot method in units of cells. For example, as described above, in order to drive a 5: 4 ratio row having 960 * 760 pixels, 80 12-bit shift registers may be provided. In this case, after applying a data voltage to the i-th shift register, The precharge voltage can be applied to the i + 1th shift register.

However, in the conventional circuit method shown in FIG. 2, a separate P scanner 4b for precharging must be provided, which causes disadvantages of hardware overhead.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide an active matrix display device for minimizing precharge circuitry and reducing hardware overhead by minimizing precharge circuitry.

It is still another object of the present invention to provide an active matrix display device capable of improving the uniformity of image quality while minimizing the portion of the precharge circuit.

1 is a circuit diagram showing a precharge circuit of a conventional active matrix display device having a precharge circuit.

FIG. 2 is a conventional active matrix circuit diagram using a precharge circuit composed of a P scanner and a switch to solve the uniformity of the image quality of FIG. 1.

3 is a circuit diagram of an active matrix display device according to an embodiment of the present invention.

FIG. 4 is a circuit diagram illustrating in more detail an operation of a horizontal scanning circuit in the circuit of FIG. 3 as an embodiment of the present invention.

FIG. 5 is a timing diagram for describing the circuit operation of FIG. 4.

6 is a block diagram of a gate level circuit of an analog switch according to an embodiment of the present invention.

The above object of the present invention

Row gate lines; And,

Thermal signal lines; And,

A matrix pixel arranged at an intersection of both; And,

A vertical scanning circuit for sequentially scanning each gate line over one vertical period; And,

A plurality of HP scanners that output a switching control signal for controlling each signal line over one horizontal period;

A plurality of analog switch units for selectively switching an image signal or a precharge signal on each signal line according to the switching control signal output from the HP scanner,

A plurality of HP scanners are sequentially driven during the one horizontal period, and precharge signal application is performed prior to image signal application during a unit horizontal period during which each HP scanner is driven. Do.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. 3 is a circuit diagram of an active matrix display device according to an embodiment of the present invention. 3 illustrates an embodiment in which the present invention is applied to a display device having 960 * 760 pixels. The 960 vertical columns arranged in one row are grouped by 12 and configured to address 80 shift registers. The active matrix display device includes gate lines X arranged in rows and signal lines Y arranged in columns. At the intersection of the gate line X and the signal line Y, the liquid crystal cell C is arranged in a matrix. Although the active matrix display device is provided with liquid crystal pixels, a pixel made of another electro-optic material may be used. The liquid crystal cell C is driven by the thin film transistor Tr, one electrode of the thin film transistor Tr is connected to the corresponding signal line Y, the other electrode is connected to the corresponding liquid crystal pixel LC, The gate electrode is connected to the corresponding gate line X. Each of the gate lines X is connected with V scanners 1L and 1R divided into left and right to form a vertical scanning circuit. The V scanners 1L and 1R sequentially scan the vertical start pulse VST in accordance with a predetermined clock signal VCK, and a plurality of liquid crystal cells C for one row are selected for each horizontal period. On the other hand, each signal line Y is connected to a sampled video signal 2 via a corresponding analog switch (plural AS1 to AS12) to receive a video signal. It also has multiple HP scanners for addressing one row, allowing multiple HP scanners to be sequentially "ON" during one horizontal period, and precharging using the same HP scanner using a blanking period. It was configured to do. The plurality of analog switches AS1 to AS12 included in each HP scanner are simultaneously controlled to open and close by the HP scanner. That is, the HP scanner outputs a sampling pulse by the horizontal start pulse HST in synchronization with a predetermined clock signal HCK to open and close the horizontal switch AS. A horizontal scanning circuit is formed by this HP scanner and the horizontal switch AS, a corresponding video signal Vsig is supplied to each signal line Y, and conduction is conducted for one row of cells C selected within one horizontal period. The image signal Vsig is written through the thin film transistor Tr in the state.

FIG. 4 is a circuit diagram for describing in more detail an operation of one horizontal scanning circuit of the circuit of FIG. 3 as an embodiment of the present invention. In FIG. 3, which shows the entire circuit, a single HP scanner and a circuit configured horizontal scanning circuit are shown in detail to explain in detail how each cell is accessed. An HP scanner that outputs a control signal for selectively controlling an image signal Vsig or a precharge signal Psig on each Y line, and an image signal Vsig and a precharge signal Psig according to output signals of the HP scanner. And a cell unit including a plurality of analog switches AS and a vertical scanner for sequentially scanning the vertical start pulse VST, and a transistor Tr and a capacitor for opening and closing the liquid crystal layer.

The HP scanner is composed of shift registers and outputs analog switch control signals ASW1 to ASW12 for simultaneously controlling a plurality of cells so that the sampled image signals Vsig1 to Vsig12 are applied to the 12 Y lines, respectively. do. In addition to the application of the image signal, the HP scanner is characterized by supplying a control signal for precharging.

The liquid crystal pixel LC is driven by the thin film transistor Tr, one electrode of the thin film transistor Tr is connected to the corresponding signal line Y, the other electrode is connected to the corresponding liquid crystal pixel LC, The gate electrode is connected to the corresponding gate line X. A V scanner is connected to each gate line X to form a vertical scanning circuit. The V scanner 1L sequentially scans the vertical start pulse VST in accordance with a predetermined clock signal VCK, and selects a plurality of liquid crystal pixels LC for one row every horizontal period. On the other hand, each signal line Y is connected to the video signal 2 sampled through the corresponding analog horizontal switches AS1 to AS12 to receive an image signal. The plurality of analog switches AS1 to AS12 included in the H-P scanner are simultaneously opened and closed by the H-P scanner. That is, the H-P scanner outputs a sampling pulse by the horizontal start pulse HST in synchronization with a predetermined clock signal HCK to open and close the analog switch AS. The horizontal scanning circuit is constituted by the HP scanner and the analog switch AS, the corresponding image signal Vsig is supplied to each signal line Y, and conduction is performed for the pixels LC for one row selected within one horizontal period. The image signal Vsig is written through the thin film transistor Tr in the state.

FIG. 5 is a timing diagram for describing the circuit operation of FIG. 4. When the unit horizontal period starts by the HST signal, precharge writing to input data values of the HP scanner for precharge is performed. Next, when the analog switch open / close signal is input, the precharge voltage Psig is applied to the signal lines Y arranged in a column. When the precharge ends, the input precharge control signal ( After the data writing of the shift register for the video signal is performed by activation of the < RTI ID = 0.0 >), the video signal Vsig is applied to the signal line Y < / RTI > ON "or" OFF "action. As shown in the timing chart, "one horizontal period" is the data input period t ₁ of the HP scanner for precharging, the precharge voltage application period t ₃ , and the image signal writing time of the HP scanner for image signal input. It can be seen that it must be kept longer than the sum of (t ₂ ) and the video signal application period (t ₄ ).

6 is a block diagram of a gate level circuit of an analog switch according to an embodiment of the present invention. The gate level circuit diagram of an analog switch is a precharge control signal ( ) And an image signal transfer transistor (VTR) that uses an output signal of an AND gate (VAND1) and an Ant gate (VAND1) that inputs the analog switch input signal (ASWi) as a control signal, and an image signal (Vsigi) applied as an input signal. ) And precharge control signal ( ) And the inverted precharge control signal ( ) And a precharge transfer transistor using the output signal of the AND gate PAND and the analog gate input signal ASWi as a control signal, and the precharge signal Psigi applied as an input signal. The output signal of the PTR and the image signal transfer transistor VTR and the output signal of the precharge signal transfer transistor PTR are connected to each other, and the image signal transfer transistors connected to each other using the analog switch input signal ASWi as a control signal. (VTR) output signal and precharge signal transfer transistor (PTR) An output transfer transistor (OTR) for inputting an output signal. The output signal of the output transfer transistor OTR is connected to the signal lines Yi arranged in a column, respectively. The transfer transistors VTR, PTR, OTR are inverted by one inverter VIN, PIN, OIN and the N-channel transistors N1, N2, NA and the inverters VIN, PIN, OIN controlled by a control signal. It is composed of P-channel transistors P1, P2, and PA controlled by a control signal and connected to an N-channel transistor and a source and a drain, respectively.

Hereinafter, the circuit operation of FIG. 6 will be described. " In the "active state", the image transfer transistor VTR and the output transfer transistor OTR are turned "ON" in synchronization with the analog switch input signal ASWi, and the precharge transfer transistor PTR remains in the "OFF" state. The sampled video signal Vsigi is transferred to the signal lines Yi arranged in a columnar manner, and the precharge control signal ( In the inactive state, the output transfer transistor OTR and the precharge transfer transistor PTR are turned "ON" in synchronization with the analog switch input signal ASWi, and the image transfer transistor VTR remains in the "OFF" state. The precharge signal Psigi is transmitted to the signal lines Yi arranged in a row. Therefore, as shown in the gate level circuit of FIG. 6, by adding several transistors to the analog switch for switching each signal line, the video signal and the precharge signal can be selectively selected.

According to the active matrix display device and the driving method thereof of the present invention, it is possible to use an HP scanner for receiving an image signal even when applying a precharge signal. Therefore, the number of elements can be reduced compared to the conventional circuit configuration using a separate P scanner for precharging, thereby reducing the production cost.

In addition, an active matrix display device and a driving method thereof that can solve the problem of deterioration in the uniformity of the screen caused by applying precharge on a line basis by using a small number of additional circuits have been proposed.

Therefore, according to the present invention, it is possible to manufacture a high quality active matrix display device capable of simultaneously satisfying the uniformity and productivity of a screen while minimizing a circuit newly added to a driving circuit of a conventional active matrix display device.

While the preferred embodiments of the present invention have been described using specific terms, such descriptions are for illustrative purposes only, and it is understood that various changes and modifications may be made without departing from the spirit and scope of the following claims. Should be done.

Claims (6)

Row gate lines; And, Thermal signal lines; And, A matrix pixel arranged at an intersection of both; And, A vertical scanning circuit for sequentially scanning each gate line over one vertical period; And, A plurality of HP scanners that output a switching control signal for controlling each signal line over one horizontal period; A plurality of analog switch units for selectively switching an image signal or a precharge signal on each signal line according to the switching control signal output from the HP scanner, And a plurality of HP scanners are sequentially driven during the one horizontal period, and precharge signal application is performed before image signal application during a unit horizontal period during which each HP scanner is driven. The method of claim 1, And the HP scanner outputs a control signal for selectively switching an image signal or a precharge signal to each signal line. The method of claim 2, And a plurality of the HP scanners. The method of claim 1, An image transfer transistor alternately turned on or off by a switching control signal applied from an outside, and a precharge transfer transistor determining whether to transmit the precharge signal; And an output transfer transistor configured to determine whether to transmit an output of the image transfer transistor and the precharge transfer transistor based on the switching control signal. Row gate lines; And, Thermal signal lines; And, A matrix pixel arranged at an intersection of both; And, A vertical scanning circuit for sequentially scanning each gate line over one vertical period; And, A plurality of HP scanners that output a switching control signal for controlling each signal line over one horizontal period; And a plurality of analog switch units for selectively switching a video signal or a precharge signal on each signal line in accordance with the switching control signal output from the shift register. The method of claim 5, And the unit horizontal period is longer than the shift register write time for precharge, the precharge signal application time, the shift register write time for the video signal, and the video signal application time.