KR100864975B1 - Apparatus and method of driving liquid crystal display device - Google Patents

Abstract

The present invention relates to a driving device and a driving method of a liquid crystal display device capable of reducing vertical crosstalk generated during field inversion.

The present invention provides a liquid crystal panel in which liquid crystal cells are arranged in a matrix form, a data driver for supplying a video data signal to the liquid crystal panel, a gate driver for supplying a gate signal to the liquid crystal panel, and a common voltage to the liquid crystal panel. And a common voltage source for supplying the signal, and the data driver includes selecting means for time division and supplying the video data signal and the common voltage every one horizontal period.

By such a configuration, the present invention compensates the distortion of the voltage charged in the data line with a common voltage to minimize the interference between adjacent data lines. Accordingly, the vertical cross torque is improved.

Description

Driving apparatus and driving method of liquid crystal display device {APPARATUS AND METHOD OF DRIVING LIQUID CRYSTAL DISPLAY DEVICE}             

1 is a view showing a liquid crystal panel of a general liquid crystal display device.

FIG. 2 is a circuit diagram illustrating a liquid crystal panel of the liquid crystal display shown in FIG. 1.

3 is a diagram illustrating a vertical crosstalk phenomenon occurring on a liquid crystal panel.

FIG. 4 is a waveform diagram illustrating a data signal supplied to the liquid crystal panel shown in FIG. 3.

5 is a block diagram illustrating a driving device of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 6 is a circuit diagram illustrating a first multiplexer and an output buffer unit illustrated in FIG. 5.

FIG. 7 is a waveform diagram illustrating a data signal supplied to a data line shown in FIG. 5.

8 is a view showing that the vertical crosstalk phenomenon is improved by the driving method according to an embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

10 pixel electrode 13 TFT                 

15, 16: parasitic capacitor 41: interface

42: Timing Controller 43: Data Driver

45 gate driver 46 liquid crystal panel

48: common voltage source 52: shift register

54: line latch 56: digital-to-analog converter

58: N-decoder section 60: P-decoder section

62, 64: first and second multiplexer 66: output buffer

78: voltage follower

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving device and a driving method of a liquid crystal display device, and more particularly, to a driving device and a driving method of a liquid crystal display device capable of reducing vertical crosstalk generated during field inversion.

A conventional liquid crystal display (hereinafter referred to as "LCD") displays an image corresponding to a video signal using a pixel matrix arranged at an intersection between gate lines and data lines.

1 and 2, an LCD includes a data line DL for applying data to a pixel, and a thin film transistor for switching a video signal to be supplied to the liquid crystal cell LC from the data line DL. 13 and a gate line GL for supplying a gate driving signal so that a video signal supplied from the data line DL can be supplied to the liquid crystal cell LC. In addition, a pixel electrode 10 is formed in a pixel region defined by the intersection of the data line DL and the gate line GL, and the pixel electrode 10 is connected to the drain electrode of the TFT 13. The gate and data driving ICs (not shown) for supplying driving signals to the gate lines GL and the data lines DL are provided.

In the LCD, when a signal applied through the gate line GL turns on the TFT 13 to drive the liquid crystal cell LC, the LCD 13 controls the TFT 13 by a data signal applied through the data line DL. A voltage is applied to the liquid crystal capacitor LC connected to the drain electrode to display an image.

In the LCD, three driving methods, a frame inversion method, a line inversion method, and a dot inversion method, are used to drive the liquid crystal cells LC on the liquid crystal panel. The method is mainly used.

The field inversion LCD driving method inverts the polarity of the data signal supplied to the liquid crystal cells whenever the field is changed. In the line inversion type liquid crystal panel driving method, polarities of data signals supplied to liquid crystal cells are reversed according to a line on the liquid crystal panel, that is, a gate line. In addition, the dot inversion method allows the data signals having opposite polarities to be supplied to adjacent liquid crystal cells, and the polarities of the data signals supplied to the liquid crystal cells for each field are reversed.

In the driving method of the field inversion method among the three LCD driving methods, the voltage Vp flowing through the data line DL of the liquid crystal panel 46 continues to flow in time. At this time, off currents and parasitic capacitors 15 and 16 exist in all the TFT elements of the liquid crystal panel 46. This off current increases as the voltage difference between the source and drain electrodes 20 and 30 of the TFT increases, and the parasitic capacitors 15 and 16 also generate. The off current and the parasitic capacitors 15 and 16 affect the image quality of the liquid crystal panel so that cross talk is generated between the liquid crystal cells vertically adjacent to each other when the liquid crystal panel is driven.

3 illustrates a vertical crosstalk phenomenon on the liquid crystal panel according to the field inversion driving method of the LCD.

Referring to FIG. 3 in conjunction with FIG. 4, when the vertical crosstalk pattern signal Data is applied through the data line DL of the LCD in the first field, white signals are displayed at points 1 and 3 of the panel. At two points on the panel, a black signal appears. That is, the black signal should be displayed only in the section 2 having a large amplitude on the panel, and the white signal should be displayed in the remaining sections. Torque is generated.

In detail, first, the first point of the panel is supplied with a positive polarity vertical crosstalk pattern signal (Data) so that the charge of 31 grays is normally charged in the liquid crystal cell LC, and then the TFT is turned off. And the voltage charged in the liquid crystal cell LC is maintained, but the liquid crystal cell charged in the panel 1 point is affected by the voltage supplied to the panel 2 point and the panel 3 point, that is, the voltage supplied to the section A. ) Is shifted in the black direction (away from the common voltage source Vcom) by the off current and the parasitic capacitors 15 and 16 to appear darker than 31 grays.

On the contrary, in the case of panel 3, the voltage of the negative cross-talk pattern signal (Data) supplied during the section B of the 2 field is affected, so that the liquid crystal cell (LC) is closer to the voltage (Vcom) than 31 gray). Charged and brighter than 31 greys.

Due to the brightness difference between one and three points of the panel, vertical crosstalk occurs on the liquid crystal panel.

Accordingly, an object of the present invention relates to a driving device and a driving method of a liquid crystal display device which can reduce vertical crosstalk generated during field inversion.

In order to achieve the above object, a driving apparatus of a liquid crystal display according to the present invention includes a liquid crystal panel in which liquid crystal cells are arranged in a matrix, a data driver for supplying a video data signal to the liquid crystal panel, and a gate in the liquid crystal panel. And a gate driver for supplying a signal, and a common voltage source for supplying a common voltage to the liquid crystal panel, wherein the data driver includes selection means for time-divisionally supplying the video data signal and the common voltage every one horizontal period. do.

The selection means includes a first terminal to which the video data signal is supplied, a second terminal to which the common voltage is supplied, and a third terminal to which a selection control signal is input.

The selecting means may selectively supply the video data signal and the common voltage according to the selection control signal.

The selection control signal may be a source output enable signal.

A method of driving a liquid crystal display according to the present invention includes supplying a video data signal, supplying a common voltage, and time-dividing the video data signal and the common voltage every one horizontal period to supply the liquid crystal panel. Include.

The video data signal and the common voltage may be selectively supplied to the liquid crystal panel according to an input selection signal.

The input selection signal may be a source output enable signal.

Other objects and features of the present invention in addition to the above objects will be apparent from the description of the embodiments with reference to the accompanying drawings.

A preferred embodiment of the present invention will be described with reference to FIGS. 5 to 8.

Referring to FIG. 5, the driving apparatus of the liquid crystal display according to the present invention includes a data driver 43 for supplying video data input from the interface unit 41 to the liquid crystal panel 46, and the liquid crystal panel 46. A gate driver 45 for supplying a scanning signal for controlling the switching operation of the thin film transistor on the top, and a timing controller for controlling the data supply timing of the data driver 43 and the scanning signal supply timing of the gate driver 45 ( 42).

The interface unit 41 receives video data (RGB data) and control signals (for example, an input clock, a horizontal synchronization signal, a vertical synchronization signal, and a data enable signal) input from a driving system such as a personal computer. Supply to (42).

The timing controller 42 drives the data driver 43 composed of a plurality of drive ICs and the gate driver 45 composed of a plurality of gate drive ICs by using a control signal input through the interface unit 41. Generate a control signal for In addition, the video data input from the interface unit 41 is transmitted to the data driver 43.

The gate driver 45 turns on / off the gate terminals of thin film transistors (“TFTs”) arranged on the liquid crystal panel 46 in response to control signals input from the timing controller 42. (on / off), so that analog video data supplied from the data driver 43 is applied to each pixel connected to each thin film transistor.

The data driver 43 selects reference voltages according to input data in response to control signals input from the timing controller 42, converts the selected reference voltages into analog video data, and supplies the same to the liquid crystal panel 46. In detail, a data latch (not shown) of the data driver 43 latches video data input from the outside in units of pixels.

The shift register 52 sequentially generates a latch enable signal for storing video data in the line latch 54 in synchronization with an external clock signal input thereto. The line latch 54 sequentially stores video data input in synchronization with the latch enable signal. The line latch 54 has first and second registers (not shown) of at least one line size (here, the number of source lines connected to one column driver; for example, 384 x 8 bits).

When the line latch 54 stores one line of video data in the first register, at the same time, the line latch 54 moves one line of video data stored in the first register to the second register and then moves the next line to the first register. Stores video data sequentially.

The digital-to-analog converter 56 receives a plurality of reference voltage signals from a gamma voltage circuit (not shown). In addition, odd video data among odd data and even data supplied from the second register of the line latch 54 are supplied to the P-decoder section 60, and even video data is supplied to the N-decoder 58.

A plurality of P decoders included in the P-decoder unit 60 converts a plurality of pixel data simultaneously input from the line latch 54 into a positive pixel voltage signal using positive gamma voltages from the gamma voltage circuit. A plurality of N decoders included in the N-decoder section 58 converts a plurality of pixel data simultaneously input from the line latch 54 into a negative pixel voltage signal using negative gamma voltages from the gamma voltage circuit. As described above, the P-decoder unit 60 and the N-decoder unit 58 decode a plurality of input pixel data into analog video data and supply the same to the first multiplexer 62.

The first multiplexer 62 is any one of the positive and negative analog video data supplied from the P-decoder section 60 and the N-decoder section 58 according to the polarity control signal supplied from the timing controller 42. Select. The video data signal selected by the first multiplexer 62 is supplied to the second multiplexer 64.

Referring to FIG. 6, positive and negative analog video data Vmux1 output from the first multiplexer 62 is input to a first input terminal 70 of the second multiplexer 64, and a second input terminal is provided. The common voltage Vcom is supplied to the 72 from the common voltage source 48. In addition, the source output enable signal SOE supplied from the timing controller 42 is supplied to the control terminal 74 of the second multiplexer 64. At this time, the common voltage source 48 supplies the common voltage Vcom in a low state to the second input terminal 72 of the second multiplexer 64 in the case of the positive data, and in the case of the negative data. The common voltage Vcom in the high state is supplied to the second input terminal 72 of the second multiplexer 64.

As described above, the second multiplexer 64 time-divisions the input positive and negative analog video data Vmux1 and the common voltage Vcom every one horizontal period. That is, the second multiplexer 64 selectively outputs the positive and negative analog video data Vmux1 and the common voltage Vcom every one horizontal period according to the selection control signal input from the control terminal 74.

Referring to FIG. 7, when the positive data is supplied to the second multiplexer 64 in the field inversion, the source output of the high state is enabled to the control terminal 74 of the second multiplexer 64. When the signal SOE is input, the common voltage Vcom in the low state supplied to the second input terminal 72 is selected and supplied to the output buffer 66. (a section)

In addition, when the source output enable signal SOE in the low state is input to the control terminal 74 of the second multiplexer 64, the positive analog video data supplied to the first input terminal 70 is selected. To the output buffer 66. (Section b)

On the other hand, when the negative data is supplied to the second multiplexer 64, when the source output enable signal SOE of the high state is input to the control terminal 74 of the second multiplexer 64. The high common voltage Vcom supplied to the second input terminal 72 is selected and supplied to the output buffer 66. (section c)

In addition, when the source output enable signal SOE in a low state is input to the control terminal 74 of the second multiplexer 64, the first output terminal 70 is supplied to the first input terminal 70 of the second multiplexer 64. Analog video data of negative polarity is selected and supplied to the output buffer 66 (section d).

The n output buffers included in the output buffer 66 are constituted by a voltage follower 78 connected to the n data lines DL in series. These output buffers buffer the signals supplied from the second multiplexer 64 to supply the data lines DL.

In this way, when the time-sharing period of one horizontal synchronization supplying positive polarity data is input and a high source output enable signal SOE is input, the common voltage in a low Vcom_L state is supplied to the data line. Positive data is supplied to the data line during the remaining 1 horizontal synchronization section.                     

In addition, when a high-level source output enable signal SOE is inputted by time-dividing one horizontal synchronizing section to which negative data is supplied, after supplying a common voltage of high (Vcom_H) state to the data line, In the remaining 1 horizontal synchronization section, the negative data is supplied to the data line. That is, time division of one horizontal synchronizing period compensates the distortion of the voltage of the data line charged with the positive data to the common voltage of the low state, and the distortion of the voltage of the data line charged with the negative data is high ( By compensating with the common voltage in the low state, the vertical cross torque is improved as shown in FIG.

As described above, the driving device and the driving method of the liquid crystal display according to the present invention compensate for the distortion of the voltage charged in the data line with a common voltage to minimize the interference between adjacent data lines, thereby generating vertical Crosstalk can be reduced.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (7)

A liquid crystal panel in which liquid crystal cells are arranged in a matrix form; A data driver for supplying a video data signal to the liquid crystal panel; A gate driver for sequentially supplying gate signals to the liquid crystal panel; A common voltage source for supplying a common voltage to the liquid crystal panel; And the data driver comprises selecting means for time division and supplying the video data signal and the common voltage every one horizontal period. The method of claim 1, The selection means, A first terminal to which the video data signal is input; A second terminal to which the common voltage is input; And a third terminal to which the selection control signal is input. The method of claim 2, And the selection means selectively supplies the video data signal and the common voltage in accordance with the selection control signal. The method of claim 2, And the selection control signal is a source output enable signal. Supplying a video data signal; Supplying a common voltage, And time-dividing the video data signal and the common voltage every one horizontal period and supplying them to the liquid crystal panel. The method of claim 5, wherein In the supplying to the liquid crystal panel, And supplying the video data signal and the common voltage selectively to the liquid crystal panel according to a selection control signal. The method of claim 6, And the selection control signal is a source output enable signal.

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