KR20030046848A - Plasma display panel and fabricating mehtod thereof - Google Patents

Abstract

PURPOSE: A plasma display panel and a method for manufacturing the same are provided to lengthen the useful life of the PDP by minimizing damage of the phosphor formed at the barrier rib. CONSTITUTION: A plasma display panel comprises a pair of sustain electrodes formed on an upper substrate; barrier ribs(24) formed on a lower substrate alternately with the pair of sustain electrodes; and a plurality of auxiliary electrodes(38) formed on the upper substrate in such a manner that the auxiliary electrodes are superimposed with one of the sustain electrodes. A method for manufacturing a PDP comprises a step of forming a pair of sustain electrodes on an upper substrate through a deposition or printing method; a step of forming a bus electrode to be superimposed with the pair of sustain electrodes; a step of depositing a first dielectric layer in such a manner as to cover the upper substrate, pair of sustain electrodes and the bus electrode; and a step of forming a plurality of auxiliary electrodes on the first dielectric layer in such a manner that the auxiliary electrodes are superimposed with one of the sustain electrodes.

Description

Plasma display panel and manufacturing method thereof {PLASMA DISPLAY PANEL AND FABRICATING MEHTOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel and a method for manufacturing the same, and more particularly, to a plasma display panel and a method for manufacturing the same, which can improve lifetime by preventing degradation of phosphors.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include Liquid Crystal Display (LCD), Field Emission Display (FED), Plasma Display Panel (PDP) and Electro-Luminescence (EL). And display devices.

PDP is a display device using a gas discharge has the advantage that it is easy to manufacture a large panel. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP has a first electrode 12Y and a second electrode 12Z formed on the upper substrate 10, and an address formed on the lower substrate 18. An electrode 20X is provided.

The first and second electrodes 12Y and 12Z are made of a transparent material to transmit light supplied from the discharge cells. Bus electrodes 13Y and 13Z formed of a metal material are formed on the rear surfaces of the first electrode 12Y and the second electrode 12Z to be parallel to the first and second electrodes 12Y and 12Z. The bus electrodes 13Y and 13Z are used to supply driving signals to the first and second electrodes 12Y and 12Z having high resistance values.

The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the first electrode 12Y and the second electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the first electrode 12Y and the second electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells.

The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. An inert gas such as He + Ne, He + Xe or He + Ne + Xe is injected into the discharge space provided between the upper and lower plates and the partition wall.

The three-electrode AC surface discharge type PDP is driven by being divided into a plurality of subfields, and gray scale display is performed by emitting light a number of times proportional to the weight of video data in each subfield period. The subfield is again divided into a reset period, an address period, and a sustain period to be driven.

Here, the reset period is a period in which uniform wall charges are formed in the discharge cells, the address period is a period in which selective address discharge occurs in accordance with the logic value of the video data, and the sustain period is a discharge cell in which the address discharge has occurred. Is a period for maintaining the discharge.

2 is a waveform diagram illustrating a method of driving a conventional plasma display panel.

Referring to FIG. 2, the reset pulse RP is supplied to the first electrodes Y during the reset period. When the reset pulse RP is supplied to the first electrodes Y, a reset discharge is generated between the first electrodes Y and the second electrodes Z to initialize the discharge cell. As the reset pulse RP, any one of a square wave or a ramp waveform having a predetermined slope as shown in FIG. 2 is selected.

In the address period, the scan pulse SP is sequentially supplied to the first electrodes Y, and the data pulse DP synchronized with the scan pulse SP is supplied to the address electrodes X. At this time, an address discharge occurs in the discharge cell supplied with the data pulse DP.

Sustain pulses SUSPy and SUSPz are alternately supplied to the first electrodes Y and the second electrodes Z in the sustain period. At this time, sustain discharge occurs in discharge cells in which address discharge has occurred, as shown in FIGS. 3A and 3B. As a result of the sustain discharge, ions and ultraviolet rays are generated, and the generated ions and ultraviolet rays collide with the phosphor 22 to generate predetermined light.

However, in such a conventional PDP, since the ions generated by the sustain discharge directly collide with the phosphor 22, the phosphor 22 is damaged. In this way, when the phosphor 22 is damaged, light having a desired brightness is not generated from the phosphor 22, and the luminance is lowered. In addition, the lifetime of the PDP is shortened by the phosphor deterioration due to the damage of the phosphor 22.

On the other hand, such damage of the phosphor 22 is more severe in the phosphor applied to the partition wall 24. In other words, the phosphor applied to the partition wall 24 is damaged by the discharge generated in the portion adjacent to the partition wall 24, and the life of the PDP is shortened.

Accordingly, an object of the present invention is to provide a plasma display panel and a method of manufacturing the same, which can improve the lifespan by preventing degradation of the phosphor.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a waveform diagram showing a driving method of a conventional plasma display panel.

3A and 3B are cross-sectional views showing sustain discharges generated in the sustain period.

4A and 4B are sectional views showing a plasma display panel according to an embodiment of the present invention.

5 is a plan view showing a plasma display panel according to a first embodiment of the present invention;

6A and 6B show wall charges applied to the auxiliary electrode in the sustain period;

7 is a plan view showing a plasma display panel according to a second embodiment of the present invention;

Fig. 8 is a sectional view showing a plasma display panel according to a third embodiment of the present invention.

9A to 9E are cross-sectional views showing a top plate manufacturing process according to an embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

10,40,100: upper substrate 12Y, 32Y, 102: first electrode

12Z, 32Z, 104: second electrode 13Y, 13Z, 34Y, 34Z, 106, 107: bus electrode

14,22,42,44,50,108,112: dielectric layer 16,46,114: protective film

18,48: lower substrate 20X, 52X: address electrode

24: partition 26: phosphor

38,52,110: auxiliary electrode

In order to achieve the above object, the plasma display panel of the present invention includes a sustain electrode pair formed on the upper substrate, a partition wall formed on the lower substrate so as to alternate with the sustain electrode pair, and an electrode pair of the sustain electrode pair on the upper substrate. It is provided with a plurality of auxiliary electrodes formed to be.

The auxiliary electrode is formed at each overlapping portion of the electrode and the partition wall of the sustain electrode pair.

The auxiliary electrode has a width wider than the width direction of the partition wall.

Bus electrodes are provided on the sustain electrode pairs to receive driving voltages applied to the sustain electrode pairs.

The auxiliary electrode is formed not to overlap with the bus electrode.

The auxiliary electrode is formed to overlap the bus electrode.

A first dielectric layer is formed between the sustain electrode pair and the auxiliary electrodes.

A second dielectric layer formed to cover the auxiliary electrodes and the first dielectric layer, and a protective film formed to cover the second dielectric layer.

A protective film is formed to cover the auxiliary electrodes and the first dielectric layer.

According to the method of manufacturing a plasma display panel of the present invention, the method includes the steps of forming a sustain electrode pair made of a transparent material on an upper substrate by any one of a deposition method and a printing method; Forming a bus electrode made of a metal material and having a width smaller than that of the sustain electrode pair by any one of a deposition method and a printing method so as to overlap the sustain electrode pair; Applying a first dielectric layer to cover the upper substrate, the sustain electrode pair, and the bus electrode; And forming a plurality of auxiliary electrodes at predetermined intervals so as to overlap any one of the sustain electrode pairs on the first dielectric layer.

And applying a second dielectric layer to cover the auxiliary electrode and the first dielectric layer, and depositing a protective film to cover the second dielectric layer.

And depositing a protective film to cover the auxiliary electrode and the first dielectric layer.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4A to 10E.

4A and 4B illustrate a plasma display panel according to an embodiment of the present invention.

4A and 4B, the PDP according to the embodiment of the present invention is formed on the first electrode 32Y and the second electrode 32Z and the lower substrate 48 formed on the upper substrate 40. Provided address electrode 52X.

The first and second electrodes 32Y and 32Z are formed of a transparent material ITO to transmit light supplied from the discharge cells. Bus electrodes 34Y and 34Z formed of a metal material are formed on the rear surfaces of the first electrode 32Y and the second electrode 32Z to be parallel to the first and second electrodes 32Y and 32Z. The bus electrodes 34Y and 34Z supply driving signals to the first and second electrodes 32Y and 32Z having high resistance values.

The first upper dielectric layer 42 is stacked on the upper substrate 10 having the first electrodes 32Y and 32Z side by side. A plurality of auxiliary electrodes 38 are formed on the rear surface of the first upper dielectric layer 42 to overlap the first electrode 32Y. As shown in FIG. 5, the auxiliary electrode 38 is formed at each overlapping portion of the first electrode 32Y and the partition wall 24. At this time, the auxiliary electrode 38 is formed so as not to overlap with the bus electrode 34Y.

The second dielectric layer 44 and the passivation layer 46 are stacked on the auxiliary electrode 38. The passivation layer 46 prevents damage to the second dielectric layer 44 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 46, magnesium oxide (MgO) is usually used.

A lower dielectric layer 50 and a partition wall 24 as shown in FIG. 5 are formed on the lower substrate 48 on which the address electrode 52X is formed. Phosphors (not shown) are applied to the surfaces of the lower dielectric layer 50 and the partition wall 24. The address electrode 52X is formed in the direction crossing the first and second electrodes 32Y and 32Z. The partition wall 24 is formed in parallel with the address electrode 52X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells.

The auxiliary electrode 38 formed on the upper substrate 40 is formed for each portion where the first electrode 32Y and the partition wall 24 overlap each other to prevent discharge from occurring in a portion adjacent to the partition wall 24. As described above, when discharge is not generated in the portion adjacent to the partition wall 24, damage to the phosphor formed on the partition wall 24 can be prevented, thereby improving the life of the PDP. The auxiliary electrode 38 is set to a floating state at the time of operation of the PDP. On the other hand, the auxiliary electrode 38 is formed to have a width wider than the width direction of the partition wall (24). Therefore, the auxiliary electrode 38 overlaps all of the discharge cells that are formed adjacent to each other with the partition wall 24 interposed therebetween.

An operation process of the auxiliary electrode 38 will be described in detail with reference to FIGS. 6A and 6B.

6A and 6B, when a positive sustain pulse is applied to the first electrode 32Y during the sustain period, a negative voltage is applied to the auxiliary electrode 38 maintaining the floating state on the first electrode 32Y. Induced. When a negative voltage is induced in the auxiliary electrode 38, positive charges are accumulated in a portion where the auxiliary electrode 38 is formed.

At this time, since the second electrode 32Z has a lower potential (usually a base potential) than the first electrode 32Y, positive charges are accumulated in the second electrode 32Z. In other words, the charges accumulated on the back of the auxiliary electrode 38 and the charges accumulated on the back of the second electrode 32Z have the same polarity.

Therefore, in the sustain period, as shown in FIG. 5, no discharge occurs in a portion where the auxiliary electrode 38 is formed, that is, a portion adjacent to the partition wall 24. In this way, since discharge is not generated in the portion adjacent to the partition wall 24, damage to the phosphor can be prevented, and thus the life of the PDP can be improved. On the other hand, even when a positive sustain pulse is applied to the second electrode 32Z as shown in FIG. 6B, wall charges having the same polarity are accumulated in the second electrode 32Z and the auxiliary electrode 38.

Meanwhile, in the present invention, as shown in FIG. 7, the auxiliary electrode 38 may be formed to overlap the second electrode 32Z. In other words, the auxiliary electrode 38 is formed for each portion where the second electrode 32Z and the partition wall 24 overlap each other. The auxiliary electrode 38 formed at each portion where the second electrode 32Z and the partition wall 24 overlap with each other prevents discharge from occurring in the portion adjacent to the partition wall 24. Meanwhile, the auxiliary electrode 38 illustrated in FIGS. 5 and 7 may be formed to overlap the bus electrodes 34Y and 34Z.

In addition, in the present invention, the protective layer 46 may be formed on the auxiliary electrode 38 without forming a dielectric layer as shown in FIG. 8. Thus, even if the protective film 46 is formed on the auxiliary electrode 38, the same operation as in the embodiment of the present invention.

9A to 9E are views illustrating a manufacturing process of the top plate according to the embodiment of the present invention.

9A to 9E, first and second electrodes 102 and 104 are formed by depositing or printing transparent material ITO on the upper substrate 100 as shown in FIG. 9A. After the first and second electrodes 102 and 104 are formed, metal materials are deposited or printed to form bus electrodes 106 and 107.

After the bus electrodes 106 and 107 are formed, the first dielectric layer 108 is coated to cover the upper substrate 100, the first electrode 102, the second electrode 104, and the bus electrodes 106 and 107 as shown in FIG. 9B.

After the first dielectric layer 108 is applied, the auxiliary electrode 110 is printed or deposited on the first dielectric layer 108 as shown in FIG. 9C. In this case, the auxiliary electrode 110 is formed to overlap the first electrode 102. Meanwhile, in the present invention, the auxiliary electrode 110 may be formed to overlap the second electrode 102.

After the auxiliary electrode 110 is deposited or printed, the second dielectric layer 112 is coated to cover the auxiliary electrode 110 and the first dielectric layer 108 as shown in FIG. 9D. After the second dielectric layer 112 is applied, a protective film 114 is deposited to cover the second dielectric layer 112 as shown in FIG. 9E. Meanwhile, in the present invention, the passivation layer 114 may be formed on the first dielectric layer 108.

As described above, according to the plasma display panel and the method of manufacturing the same, an auxiliary electrode is formed at each portion where the first electrode or the second electrode and the partition overlap each other, thereby preventing the discharge from occurring at the partition. As described above, when discharge is not generated in the partition, damage of the phosphor formed on the partition may be minimized, thereby improving the life of the plasma display panel.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (12)

A pair of sustain electrodes formed on the upper substrate, Barrier ribs formed on the lower substrate such that they alternate with the sustain electrode pairs; And a plurality of auxiliary electrodes formed on the upper substrate to overlap one of the electrodes of the sustain electrode pair. The method of claim 1, And the auxiliary electrode is formed at each of the overlapping portions of the electrode of the sustain electrode pair and the partition wall. The method of claim 2, And the auxiliary electrode is formed to have a width wider than a width direction of the partition wall. The method of claim 1, And a bus electrode provided at each of the sustain electrode pairs to receive a driving voltage applied to the sustain electrode pairs. The method of claim 4, wherein And the auxiliary electrode is formed so as not to overlap the bus electrode. The method of claim 4, wherein And the auxiliary electrode is formed to overlap the bus electrode. The method of claim 1, And a first dielectric layer formed between the sustain electrode pair and the auxiliary electrodes. The method of claim 7, wherein A second dielectric layer formed to cover the auxiliary electrodes and the first dielectric layer; And a protective film formed to cover the second dielectric layer. The method of claim 7, wherein And a passivation layer formed to cover the auxiliary electrodes and the first dielectric layer. Forming a sustain electrode pair made of a transparent material on the upper substrate by any one of a deposition method and a printing method; Forming a bus electrode made of a metal material and having a width smaller than that of the sustain electrode pair by any one of a deposition method and a printing method so as to overlap the sustain electrode pair; Applying a first dielectric layer to cover the upper substrate, the sustain electrode pair, and the bus electrode; And forming a plurality of auxiliary electrodes on the first dielectric layer at predetermined intervals so as to overlap one of the sustain electrode pairs. The method of claim 10, Applying a second dielectric layer to cover the auxiliary electrode and the first dielectric layer; And depositing a protective film so as to cover the second dielectric layer. The method of claim 10, A method of manufacturing a plasma display panel comprising depositing a protective film to cover the auxiliary electrode and the first dielectric layer.