KR100421488B1 - Plasma Display Panel - Google Patents

Abstract

The present invention relates to a plasma display panel capable of preventing the breakdown of the pad portion.

The plasma display panel of the present invention receives a first pad formed on one side of the first electrode and receiving a driving waveform supplied to the first electrode, and receiving a driving waveform formed on one side of the third electrode and supplied to the third electrode. The first pads having a second pad and positioned adjacent to each other are disposed at a first interval, and the first pad and the second pad positioned adjacent to each other are disposed at a second interval different from the first interval.

Description

Plasma Display Panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel capable of preventing breakdown of a pad portion.

Plasma Display Panel (hereinafter referred to as "PDP") is a display device using visible light generated from a phosphor when vacuum ultraviolet rays generated by gas discharge excite the phosphor. PDP is thinner and lighter than Cathode Ray Tube (CRT), which has been the mainstay of display means, and has the advantage of realizing high-definition large screen. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type PDP.

Referring to FIG. 1, a discharge cell of a conventional three-electrode AC surface discharge type PDP is formed on a first electrode 12Y and a second electrode 12Z formed on an upper substrate 10, and on a lower substrate 18. The address electrode 20X is provided. The discharge cells 1 are arranged in a matrix in the panel.

The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the first electrode 12Y and the second electrode 12Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the first electrode 12Y and the second electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 10 / lower substrate 18 and the partition wall 24.

The AC surface discharge type PDP is driven by dividing one frame into several subfields having different discharge times in order to express gray level of an image. Each subfield is further divided into a reset period for uniformly generating discharge, an address period for selecting a discharge cell, and a sustain period for expressing gray scale according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields.

Each of the eight subfields is further divided into an address period and a sustain period. Here, the reset period and the address period of each subfield are the same for each subfield, while the sustain period is 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. Is increased. In this way, since the sustain period is changed in each subfield, the gray level of the image can be expressed.

Here, in the reset period, a reset pulse is supplied to the first electrode 12Y to cause reset discharge. In the address period, a scan pulse is supplied to the first electrode 12Y and a data pulse is supplied to the address electrode 20X to generate an address discharge between the two electrodes 12Y and 20X. During the address discharge, wall charges are formed in the upper and lower dielectric layers 14 and 22. In the sustain period, sustain discharge occurs between the two electrodes 12Y and 12Z due to an alternating current signal alternately supplied to the first electrode 12Y and the second electrode 12Z.

However, in the conventional AC surface discharge PDP, the sustain discharge space is concentrated in the center of the upper substrate 10, thereby decreasing the utilization of the discharge space. Accordingly, there is a problem that the discharge area is reduced and the luminous efficiency is reduced.

2 and 3 are views showing a conventional four-electrode AC surface discharge type plasma display panel.

2 and 3, the discharge cell 50 of the conventional 4-electrode AC surface discharge type plasma display panel includes the first electrode T, the second electrode Y, and the third electrode formed on the upper substrate 32. The electrode Z and the address electrode X formed on the lower substrate 38 are provided. The discharge cell 50 is arranged in a matrix form on the panel as shown in FIG.

The first electrode T and the second electrode Y are formed at narrow intervals, and the third electrode Z is formed at a wide interval from the second electrode Y. The upper dielectric layer 34 and the passivation layer 36 are stacked on the upper substrate 32 having the first to third electrodes T, Y, and Z arranged side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 34. The passivation layer 36 prevents damage to the upper dielectric layer 34 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 36, magnesium oxide (MgO) is usually used.

The lower dielectric layer 42 and the partition wall 44 are formed on the lower substrate 38 on which the address electrode X is formed, and the phosphor layer 46 is coated on the surfaces of the lower dielectric layer 42 and the partition wall 44. The address electrode X is formed in a direction crossing the first to third electrodes T, Y and Z. The partition wall 44 is formed in parallel with the address electrode X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells.

The phosphor layer 46 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 32 / lower substrate 38 and the partition wall 44. The black matrix 40 is formed between the first electrodes T formed in the discharge cells adjacent to each other.

In the reset period, a reset pulse is supplied to any one of the first to third electrodes T, Y, and Z to cause a reset discharge in the discharge cell 50. In the address period, a scan pulse is supplied to the first electrode T, and a data pulse is supplied to the address electrode X to generate an address discharge between the first electrode T and the address electrode X. During the address discharge, wall charges are formed in the upper and lower dielectric layers 34 and 42. In the sustain period, sustain pulses are alternately supplied to the second electrode Y and the third electrode Z to generate sustain discharge between the two electrodes Y and Z.

In the conventional four-electrode AC surface discharge type PDP, since the distance between the second electrode Y and the third electrode Z, which causes the sustain discharge, is set wide, the utilization of the discharge space is improved. As a result, the discharge area is increased, thereby improving luminous efficiency.

4A and 4B are diagrams illustrating pad portions formed on one side of the first to third electrodes.

Referring to FIGS. 4A and 4B, the pad part is formed on one side of the second electrode Y to receive a driving waveform supplied to the second electrode Y, and the first and second pad parts 52. A second pad portion formed at one side of the three electrodes T and Z (a position opposite to the first pad portion 52) to receive driving waveforms supplied to the first and third electrodes T and Z; 54 is provided. Since three electrodes T, Y, and Z are formed on the upper substrate 32 of the PDP, the second pad part 54 includes a plurality of first and second pads 53 and 55. The first pad 53 receives a driving waveform supplied to the first electrode T. The second pad 55 receives a driving waveform supplied to the third electrode Z. Meanwhile, a third pad 51 for supplying a driving waveform to the second electrode Y is formed in the first pad part 52. In other words, a plurality of first and second pads 53 and 55 are formed in the second pad part 54, and a plurality of third pads 51 are formed in the first pad part 52. Here, since the number of the first to third pads 51, 53, and 55 is the same, the interval D2 of the second pad portion 54 is set to be narrower than the interval D1 of the first pad portion 52.

In this way, when the distance between the second pad portion 54 is set to be narrow (D2), the insulation of the second pad portion 54 is destroyed by the voltage difference of the driving waveform supplied to the first and second pads 53 and 55. Can be. For example, when a sustain pulse of a predetermined level or more is supplied to the second pad 55, the first pad 53 maintains a ground potential. Therefore, a predetermined voltage difference is generated between the first pad 53 and the second pad 55 provided at a narrow interval D2, and the first pad 53 and the third pad 55 are caused by the voltage difference. Insulation of the liver can be destroyed.

Accordingly, an object of the present invention is to provide a plasma display panel capable of preventing the breakdown of the pad portion.

1 is a perspective view showing a discharge cell of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a perspective view showing a discharge cell of a conventional 4-electrode AC surface discharge type plasma display panel.

3 is a view showing a state in which the discharge cells shown in Figure 2 are arranged in a matrix form.

4A and 4B are views illustrating a pad part for receiving a driving waveform supplied to the electrodes shown in FIG. 2.

5 is a view showing a pad unit according to an embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

1,50: discharge cell 10,32: upper substrate

12Y: first electrode 12Z: second electrode

14,22,34,42 dielectric layer 16,36 protective film

18,38: lower substrate 20X: address electrode

24, 44: bulkhead 26, 46: phosphor layer

40: black matrix 51,53,55,58,60: pad

52,54,56: pad part

In order to achieve the above object, the plasma display panel of the present invention includes a first pad formed on one side of the first electrode and receiving a driving waveform supplied to the first electrode, and formed on one side of the third electrode and supplied to the third electrode. And a second pad supplied with a driving waveform, wherein the first pads positioned adjacent to each other are disposed at a first interval, and the first pad and second pads positioned adjacent to each other are different from the first interval. Second pads positioned adjacent to each other are also disposed at a first interval. The second interval is set wider than the first interval.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIG. 5.

5 illustrates a pad portion of a plasma display panel according to an exemplary embodiment of the present invention. 5 will be described with reference to FIG. 4A.

Referring to FIG. 5, the second pad part 56 is formed at one side of the first and third electrodes T and Z and receives a driving waveform supplied to the first and third electrodes T and Z. Pads 58 and 60 are formed at different intervals. Here, the first pads 58 formed adjacent to each other and supplied with the same driving waveform are formed at a first interval D4. In addition, the second pads 60 formed adjacent to each other and supplied with the same driving waveform are also formed at the first interval D4. Meanwhile, the first and second pads 58 and 60 formed to be adjacent to each other and supplied with different driving waveforms are formed at the second interval D3. In this case, the second interval D3 is formed to have a wider width than the first interval D4.

In other words, in the present invention, the pads 58 or 60 formed to be adjacent to each other and supplied with the same driving waveform are formed at narrow intervals D4 and are formed to be adjacent to each other to supply different driving waveforms. The two pads 58 and 60 are formed at wide intervals D3.

The first pads 58 or the second pads 60 formed at the first interval D4 are supplied with the same driving waveform from the outside. Therefore, the dielectric breakdown phenomenon does not occur between the first pads 58 or the second pads 60 formed at narrow intervals D4. In addition, the first pad 58 and the second pad 60 formed at the second interval D3 are supplied with different driving waveforms. However, since the first and second pads 58 and 60 are formed at wide intervals D3, insulation breakdown may be prevented. Meanwhile, the width of the first interval D3 is set to be narrower than the interval D1 between the third pads 51 shown in FIG. 4A.

As described above, the plasma display panel according to the present invention can prevent the breakdown of the pad part by setting different intervals of the pad part for supplying the driving waveform to the two electrodes. In other words, the interval between the pads receiving the same driving waveform is set to be narrow and the intervals of the pads receiving the different driving waveform to be set to be wide to prevent the dielectric breakdown phenomenon occurring in the pad part.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

A plasma display panel comprising a first electrode and a second electrode formed adjacent to each other for each discharge cell, and a third electrode formed at a wide interval from the second electrode. A first pad formed on one side of the first electrode and receiving a driving waveform supplied to the first electrode; A second pad formed on one side of the third electrode and receiving a driving waveform supplied to the third electrode, The first pads positioned adjacent to each other are disposed at a first interval, and the first pad and second pads positioned adjacent to each other are disposed at a second interval different from the first interval. delete The method of claim 1, And the second pads positioned adjacent to each other are arranged at the first intervals. delete The method of claim 1, And the second interval is set wider than the first interval. delete