KR100469697B1 - Plasma Display Panel - Google Patents

Abstract

The present invention relates to a plasma display panel that can increase the discharge efficiency.

According to the present invention, a plasma display panel includes: a partition wall formed between an upper substrate and a lower substrate; An address electrode formed on the lower substrate in parallel with the partition wall; A scan sustain electrode and a common sustain electrode that intersect the address electrode and face each other with a predetermined distance therebetween; The scan sustain electrode includes a first bus electrode intersecting the address electrode and a first transparent electrode having an inverted trapezoidal shape that becomes wider from the first bus electrode toward the common sustain electrode. And a second bus electrode intersecting the address electrode, and a trapezoidal second transparent electrode having at least one of a length and a width of the second bus electrode toward the scan sustain electrode.

Description

Plasma Display Panel

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel capable of increasing discharge efficiency.

Recently, a plasma display panel (hereinafter referred to as "PDP"), which is easy to manufacture a large panel, has attracted attention as a flat panel display device. The PDP normally displays an image by adjusting the discharge period of each pixel according to the digital video data. As such a PDP, an AC type PDP having three electrodes and driven by an AC voltage is typical.

1 is a perspective view illustrating a cell structure typically arranged in an alternating-type PDP in a matrix form, and FIG. 2 is a plan view of the PDP shown in FIG. 1.

1 and 2, a PDP cell includes an upper plate having sustain electrode pairs 14 and 16, an upper dielectric layer 18, and a passivation layer 20 sequentially formed on an upper substrate 10, and a lower substrate 12. ), A lower plate having an address electrode 22, a lower dielectric layer 24, a partition wall 26, and a phosphor layer 28 formed sequentially. The upper substrate 10 and the lower substrate 12 are spaced in parallel by the partition wall 26. Each of the sustain electrode pairs 14 and 16 has a relatively wide width and a relatively narrow transparent electrode 14A and 16A made of a transparent electrode material (ITO) having a light transmittance of 90% or more, as shown in FIG. It consists of bus electrodes 14B and 16B having a width. Here, the transparent electrode material (ITO) has a large resistance value and thus does not transmit power efficiently. Accordingly, the resistive components of the transparent electrodes 14A and 16A are formed on the transparent electrodes 14A and 16A by forming buses 14B and 16B made of a good conductive material, for example, silver (Ag) or copper (Cu). To compensate. The sustain electrode pairs 14 and 16 are composed of a scan sustain electrode and a common sustain electrode. The scan signal for panel scanning and the sustain signal for discharge sustaining are mainly supplied to the scan sustain electrode 14, and the sustain signal is mainly supplied to the common sustain electrode 16. Charges accumulate in the upper dielectric layer 18 and the lower dielectric layer 24. The protective film 20 prevents damage to the upper dielectric layer 18 by sputtering, thereby increasing the lifetime of the PDP and increasing the emission efficiency of secondary electrons. As the protective film 20, magnesium oxide (MgO) is usually used. The address electrode 22 is formed to cross the sustain electrode pairs 14 and 16. The address electrode 22 is supplied with a data signal for selecting cells to be displayed. The partition wall 26 is formed in parallel with the address electrode 22 to prevent ultraviolet rays generated by the discharge from leaking to adjacent cells. The phosphor layer 28 is applied to the surfaces of the lower dielectric layer 24 and the partition wall 26 to generate visible light of any one of red, green, and blue. Then, an inert gas for gas discharge is injected into the discharge space therein.

The PDP cell is selected by the counter discharge between the address electrode 22 and the scan sustain electrode 14, and then sustains the discharge by the surface discharge between the sustain electrode pairs 14 and 16. In the PDP cell, the fluorescent substance 28 emits light by ultraviolet rays generated during sustain discharge, so that visible light is emitted outside the cell. As a result, the PDP having cells displays an image. In this case, the PDP implements a gray scale required for displaying an image by adjusting the discharge sustain period of the cell, that is, the number of sustain discharges, according to the video data.

As described above, in the conventional PDP, the discharge starts between the sustain electrode pairs 14 and 16, and the discharge extends to the entire sustain electrode pairs 14 and 16. In this case, there is a problem that misdischarge occurs near the partition 26.

In order to solve this problem, as shown in FIG. 3, a PDP in which a transparent electrode is not formed near a partition is proposed.

The sustain electrode pairs 14 and 16 of the PDP shown in FIG. 3 are relatively wider than the stripe-shaped bus electrodes 14B and 16B and the bus electrodes 14B and 16B which are formed in the direction crossing the address electrodes. The transparent electrodes 14A and 16A have a width and are formed in a T shape.

As described above, since the transparent electrodes 14A and 16A shown in FIG. 3 are not formed near the partition wall 26, the amount of discharge current can be reduced and erroneous discharge can be prevented in the vicinity of the partition wall 26. However, since the discharge voltage increases as the area of the transparent electrodes 14A and 16A decreases, the driving voltage margin decreases, thereby reducing the discharge efficiency.

In order to solve this problem, as shown in FIG. 4, a PDP is proposed in which the area of the transparent electrode in the area corresponding to the center of the discharge cell is reduced and the area of the transparent electrode on the bus electrode is increased.

Each of the scan sustain electrode 14 and the common sustain electrode 16 includes first and second transparent electrodes 14A and 16A and first and second bus electrodes 14B and 16B. The first and second transparent electrodes 14A and 16A are formed of the first electrode patterns 30A and 32A and the second electrode patterns 30B and 32B connected to the first electrode patterns 30A and 32A. The first electrode patterns 30A and 32A extend relatively long in a direction parallel to the first and second bus electrodes 14B and 16B so that the surfaces facing the first and second transparent electrodes 14A and 16A are wide. It is formed. That is, the area of the second electrode patterns 30B and 32B is wider from the first electrode patterns 30A and 32B toward the second bus electrodes 14B and 16B.

In this case, as the charged particles causing the discharge between the first and second transparent electrodes 14A and 16A facing each other move toward the first and second bus electrodes 14B and 16B, the discharge area is widened to improve the discharge efficiency. . However, since the areas of the first and second transparent electrodes 14A and 16A toward the first and second bus electrodes 14B and 16B are large, there is a problem in that misdischarge occurs near the partition wall 26.

Accordingly, an object of the present invention is to provide a plasma display panel which can increase the discharge efficiency.

1 is a perspective view showing a discharge cell of a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is a plan view of the plasma display panel shown in FIG. 1; FIG.

3 is a plan view showing a plasma display panel having a conventional 'T'-shaped transparent electrode.

Figure 4 is a plan view showing a plasma display panel having a conventional trapezoidal transparent electrode.

5 is a plan view illustrating a plasma display panel according to a first exemplary embodiment of the present invention.

6 is a plan view illustrating a plasma display panel according to a second exemplary embodiment of the present invention.

FIG. 7 is a waveform diagram illustrating driving waveforms of the plasma display panel illustrated in FIGS. 5 and 6.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12: lower substrate

14,74: scanning holding electrode 16,76: common holding electrode

18: upper dielectric layer 20: protective film

22, 72 Address electrode 24 Lower dielectric layer

26,86 partition wall 28 phosphor layer

80A, 80B: Electrode Pattern

In order to achieve the above object, the plasma display panel according to the present invention includes a partition wall formed between the upper substrate and the lower substrate; An address electrode formed on the lower substrate in parallel with the partition wall; A scan sustain electrode and a common sustain electrode that intersect the address electrode and face each other with a predetermined distance therebetween; The scan sustain electrode includes a first bus electrode intersecting the address electrode, a first transparent electrode that becomes wider from the first bus electrode toward the common sustain electrode, and the common sustain electrode includes the address electrode. And a second transparent electrode crossing the second bus electrode and at least one of a length and a width of the second bus electrode toward the scan holding electrode.

It is characterized in that it further comprises a facing portion formed in the edge portion of the second transparent electrode facing the first transparent electrode spaced apart at a predetermined interval.

The upper substrate may further include an upper dielectric layer formed to cover the scan sustain electrode and the common sustain electrode, and a protective film formed on the upper dielectric layer.

The lower substrate may include a lower dielectric layer formed to cover the address electrode, and a phosphor layer formed on the barrier rib and the lower dielectric layer.

Other objects and advantages of the present invention in addition to the above object will be apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 5 to 7.

5 is a plan view illustrating a PDP according to a first embodiment of the present invention.

Referring to FIG. 5, the PDP according to the first embodiment of the present invention may include a pair of sustain electrodes 74 and 76, an upper dielectric layer (not shown), and a protective film (not shown) that are sequentially formed on an upper substrate (not shown). And a lower plate having an address electrode 72, a lower dielectric layer (not shown), a partition 86, and a phosphor layer (not shown) sequentially formed on a lower substrate (not shown). do. The upper substrate and the lower substrate are spaced in parallel by the partition wall 86.

The upper dielectric layer and the passivation layer are stacked on the upper substrate on which the sustain electrode pairs 74 and 76 are formed. Charges accumulate in the upper and lower dielectric layers. The protective film prevents damage to the upper dielectric layer by sputtering, thereby extending the life of the PDP and increasing the emission efficiency of secondary electrons. Magnesium oxide (MgO) is usually used as a protective film.

The partition wall 86 is formed in parallel with the address electrode 72 to prevent ultraviolet rays generated by the discharge from leaking to adjacent cells. The phosphor layer is applied to the surface of the lower dielectric layer and the partition wall 86 to emit visible light of any one of red, green, and blue. Then, an inert gas for gas discharge is injected into the discharge space therein.

The address electrode 72 is formed to intersect with the sustain electrode pairs 74 and 76. The scan pulse is supplied to the scan sustain electrode 74 during the address discharge, and the data pulse is applied to the address electrode 72 in synchronization with the scan sustain electrode 74, thereby causing an address discharge between the scan / sustain electrode 74 and the address electrode 72. Wall charges are formed on the lower dielectric layer.

In the cells selected by the address discharge, sustain discharge occurs between the pair of sustain electrodes 74 and 76. At this time, ultraviolet rays are generated in the process of transition after the discharge gas is excited in the discharge space. The generated ultraviolet rays excite the phosphors to generate visible light, thereby realizing a PDP image.

Each of the sustain electrode pairs 74 and 76 according to the first exemplary embodiment of the present invention includes first and second transparent electrodes 74A and 76A and first and second bus electrodes 74B and 76B. The first and second transparent electrodes 74A and 76A are made of transparent electrode material (ITO) having good light transmittance of 90% or more, and the first and second bus electrodes (74B and 76B) are transparent electrodes 74A and 76A. ) Is a large resistance value and does not efficiently transmit power, and is made of a good conductive material such as silver (Ag) or copper (Cu) to compensate for the resistance of the transparent electrodes 74A and 76A.

The sustain electrode pairs 74 and 76 formed of the transparent electrodes 74A and 76A and the bus electrodes 74B and 76B are formed of a scan sustain electrode and a common sustain electrode. The scan signal for panel scanning and the sustain signal for discharging sustain are mainly supplied to the scan sustain electrode 74, and the sustain signal is mainly supplied to the common sustain electrode 76.

The scan sustain electrode 74 is composed of a first transparent electrode 74A and a first bus electrode 74B. The first bus electrode 74B is formed on the first transparent electrode 74A in the direction crossing the address electrode 72. The first transparent electrode 74A is formed in an inverted trapezoidal shape having a short length of the surface corresponding to the lower portion of the first bus electrode 74B and a long surface of the surface facing the second transparent electrode 76A.

The common holding electrode 76 includes a second transparent electrode 76A and a second bus electrode 76B. The second bus electrode 76B is formed on the second transparent electrode 76A in the direction crossing the address electrode 72. The second transparent electrode 76A is formed in a trapezoidal shape having a long length corresponding to the bottom surface of the second bus electrode 76B and a short length facing the first transparent electrode 74A.

As described above, in the PDP according to the first embodiment of the present invention, the first transparent electrode 74A of the scan / hold electrode 74 is formed in an inverted trapezoidal shape to be connected to the first bus electrode 74B. The width of 74A is formed narrow. As a result, the amount of wall charges generated in the vicinity of the partition wall 86 can be reduced, and thus erroneous discharge with cells not selected can be prevented. In addition, as the second transparent electrode 76A is formed toward the second bus electrode 76B, the length or / and width of the second transparent electrode 76A is increased so that the discharge path is relatively long, thereby improving the discharge efficiency.

6 is a plan view illustrating a PDP according to a second embodiment of the present invention.

Referring to FIG. 6, the PDP according to the second embodiment of the present invention has the same components except that the common holding electrode is formed in a different shape compared to the PDP shown in FIG. 5.

The scan sustain electrode 74 of the PDP according to the second embodiment of the present invention includes a first transparent electrode 74A and a first bus electrode 74B. The first bus electrode 74B is formed on the first transparent electrode 74A in the direction crossing the address electrode 72. The first transparent electrode 74A is formed in an inverted trapezoidal shape having a short length of the surface corresponding to the lower portion of the first bus electrode 74B and a long surface of the surface facing the second transparent electrode 76A.

The common holding electrode 76 includes a second transparent electrode 76A and a second bus electrode 76B. The second bus electrode 76B is formed on the second transparent electrode 76A in the direction crossing the address electrode 72. The second transparent electrode 76A is formed of a first electrode pattern 80A facing the first transparent electrode 74A and a second electrode pattern 80B connected to the first electrode pattern 80A. The first electrode pattern 80A is formed to extend relatively in a direction parallel to the second bus electrode 76B so that the surface facing the first transparent electrode 74A is wide. The area of the second electrode pattern 80B connected to the first electrode pattern 80A is relatively narrow, and the area corresponding to the second bus electrode 76B is relatively wide. That is, the area of the second electrode pattern 80B is wider from the first electrode pattern 80A toward the second bus electrode 76B.

As described above, in the PDP according to the second embodiment of the present invention, the width of the first transparent electrode 74A connected to the first bus electrode 74B of the scan / hold electrode 74 is narrow to form the vicinity of the partition 86. The amount of wall charges generated in the cell can be reduced to prevent erroneous discharge with unselected cells. In addition, by forming the second transparent electrode 76A toward the second bus electrode 76B toward the second bus electrode 76B, the length or / and width of the second transparent electrode 76A is increased, so that the discharge path is relatively long, and the discharge efficiency is improved.

7 is a waveform diagram illustrating a method of driving the PDP shown in FIGS. 5 and 6.

Referring to FIG. 7, each subfield is divided into an initialization period for initializing cells on the full screen, an address period for selecting discharge cells, and a sustain period for implementing gray levels according to the number of discharges.

In the initialization period, the rising ramp waveform Ramp-up is applied to all the scan sustain electrodes Y at the same time. Ramp-up causes a slight discharge to occur in the cells of the full screen, creating wall charges in the cells. Negative wall charges are generated in the scan sustain electrode Y and positive wall charges are generated in the common sustain electrode Z. After the rising ramp waveform Ramp-up is supplied, the falling ramp waveform Ramp-down is simultaneously applied to the scan sustain electrodes Y. FIG. Ramp-down causes a slight erase discharge in the cells, thereby uniformly retaining wall charges necessary for address discharge in the cells of the full screen. That is, negative wall charges are accumulated on the common holding electrode Z, so that the negative wall charges are slightly reduced.

In the address period, the negative scan pulse Scan is sequentially applied to the scan sustain electrodes Y, and the positive data pulse data is applied to the address electrodes X. An address discharge is generated in the cell to which the scan pulse and the data pulse are applied. Wall charges are generated toward the first bus electrode 74B formed on the scan sustain electrode Y in the cells selected by the address discharge. At this time, the width of the first transparent electrode 74A connected to the first bus electrode 74B of the scan sustain electrode Y is narrowed to reduce the amount of wall charges generated on the first bus electrode 74B. This prevents mis-discharge with unselected cells.

The common sustain electrode Z is supplied with a positive DC voltage zdc during the setdown period and the address period.

In the sustain period, first and second sustain pulses Sus1 and Sus2 are alternately applied to the scan sustain electrodes Y and the common sustain electrodes Z. FIG. The cell selected by the address discharge is added between the scan sustain electrode Y and the common sustain electrode Z every time the sustain pulses Sus1 and Sus2 are applied as the wall voltage and sustain pulses Su1 and Sus2 are added to the cell. Sustain discharge occurs in the form of surface discharge.

As described above, the plasma display panel according to the present invention forms a narrow width of the first transparent electrode connected to the first bus electrode of the scan / sustain electrode. Accordingly, the amount of wall charges generated in the vicinity of the partition wall can be reduced, and thus erroneous discharge with unselected cells can be prevented. In addition, as the second transparent electrode of the common sustaining electrode is formed toward the second bus electrode, the length or / and width of the second transparent electrode is increased so that the discharge path is relatively long, thereby improving the discharge efficiency.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (5)

Barrier ribs formed between the upper substrate and the lower substrate; An address electrode formed on the lower substrate in parallel with the partition wall; A scan sustain electrode and a common sustain electrode that intersect the address electrode and face each other with a predetermined distance therebetween; The scan sustain electrode includes a first bus electrode intersecting the address electrode and a first transparent electrode having an inverted trapezoidal shape that becomes wider from the first bus electrode toward the common sustain electrode. The common holding electrode may include a second bus electrode crossing the address electrode and a trapezoidal second transparent electrode having at least one of a length and a width of the second bus electrode toward the scan holding electrode. Plasma display panel. The method of claim 1, And a facing portion formed on an edge portion of the second transparent electrode and spaced apart from the first transparent electrode at a predetermined interval to face the first transparent electrode. delete The method of claim 1, An upper dielectric layer formed on the upper substrate to cover the scan sustain electrode and the common sustain electrode; And a protective film formed on the upper dielectric layer. The method of claim 1, A lower dielectric layer formed on the lower substrate to cover the address electrode; And a phosphor layer formed on the barrier ribs and the lower dielectric layer.