KR100505984B1 - Plasma display panel - Google Patents

Abstract

The present invention relates to a plasma display panel capable of improving display quality.

The plasma display panel according to the present invention includes sustain electrode pairs having a transparent electrode and a metal electrode, and address electrodes intersecting the sustain electrode pair and vertically divided in a partition area. The widths of the transparent electrodes disposed in upper and lower lines 1 to 10 in the vicinity of the divided region are different from the widths of the transparent electrodes disposed in an area other than the divided region.

Description

Plasma Display Panel {PLASMA DISPLAY PANEL}

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel capable of improving display quality.

Recently, there is a growing interest in flat panel displays that can reduce the weight and volume of cathode ray tubes. Such flat panel displays include liquid crystal displays, plasma display panels (PDPs), field emission displays, and electro-luminescence.

Among such flat panel display devices, the plasma display panel emits phosphors by 147 nm ultraviolet rays generated when the He + Xe, Ne + Xe or He + Xe + Ne gas is discharged to display images and video including characters or graphics. . The plasma display panel is not only thin and large in size, but also recently, due to technology development, the plasma display panel provides greatly improved image quality.

In particular, the three-electrode AC surface discharge type plasma display panel accumulates wall charges using a dielectric layer during discharging, thereby lowering the voltage required for discharging, and has advantages of low voltage driving and long life because it protects the electrodes from sputtering of plasma.

1 is a perspective view showing a discharge cell structure of a typical three-electrode AC surface discharge type plasma display panel.

Referring to FIG. 1, a discharge cell of a three-pole current alternating surface discharge plasma display panel is formed on a scan electrode (Y) and a sustain electrode (Z) formed on an upper substrate (10), and a lower substrate (18). The address electrode X is provided.

Each of the scan electrode Y and the sustain electrode Z has a line width smaller than that of the transparent electrodes 12Y and 12Z and the transparent electrodes 12Y and 12Z and is formed on one side edge of the transparent electrode. 13Z). Indium tin oxide (ITO) is generally used as a material of the transparent electrodes 12Y and 12Z. As the material of the metal bus electrodes 13Y and 13Z, a metal such as chromium (Cr) is usually used. The metal bus electrodes 13Y and 13Z serve to reduce voltage drop caused by the transparent electrodes 12Y and 12Z having high resistance. An upper dielectric layer 14 and a passivation layer 16 are stacked on the upper substrate 10 on which the scan electrode Y and the sustain electrode Z are formed. In the upper dielectric layer 14, charged particles generated by gas discharge ionization gas (plasma) are accumulated. The protective layer 16 protects the upper dielectric layer 14 from sputtering of charged particles generated during gas discharge and increases the emission efficiency of secondary electrons. As the bottom film 16, magnesium oxide (MgO) is usually used. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode X is formed.

The phosphor layer 26 is formed on the surfaces of the lower dielectric layer 22 and the partition wall 24. The partition wall 24 is formed to be parallel to the address electrode X to physically distinguish the discharge cells, and prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is emitted by ultraviolet rays generated during gas discharge to generate visible light of any one of red, green, and blue. An inert mixed gas such as He + Xe, Ne + Xe or He + Xe + Ne for discharging is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

2 is a frame diagram illustrating a driving method of a general plasma display panel.

Referring to FIG. 2, such a three-electrode AC surface discharge type plasma display panel is driven by dividing one frame into several subfields having different emission counts in order to realize gray levels of an image. In the case where an image is to be displayed with 265 gray levels, a frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields. Each of the eight subfields is further divided into a reset period for uniformly causing discharge, an address period for selecting a Banggen cell, and a sustain period for implementing gray scale according to the number of discharges. The reset period and the address period of each subfield are the same for each subfield, while the sustain period and the number of discharges thereof are 2 ⁿ in each subfield (where n = 0, 1, 2, 3, 4, 5, 6, 7) is increased in proportion. In this way, gray levels can be implemented by using a combination of subfields having different sustain periods.

The driving method of the plasma display panel is to turn on the discharge cells to be sustained discharged in the sustain period in the address period after turning off the full screen in the reset period. Subsequently, in the sustain period, an image is displayed by sustaining (sustaining) the discharge cells selected by the address discharge.

The plasma display panel driving method is divided into a single scan method and a dual scan method according to a scan method.

3 is a view schematically illustrating a plasma display panel driven by a single scan method.

Referring to FIG. 3, when one data line is formed as a line, the scan lines are sequentially driven from the first to the last to drive an address discharge. The single scan type plasma display panel has a problem in that high-speed driving is difficult due to a long address period. If the address period becomes longer during the predetermined period of one frame, the sustain period is reduced relatively, and the display quality is degraded. In order to make up for such drawbacks, a dual scan method is proposed in which data lines are divided and driven up and down.

4B is a view schematically illustrating a plasma display panel driven by a dual scan method.

Referring to FIG. 4, a plasma display panel driven by a dual scan method includes a data line X having lines divided up and down, and transparent electrodes 12Y and 12Z included in the scan electrode Y and the sustain electrode Z. Referring to FIG. And a metal bus electrode formed at one edge of the transparent electrodes 12Y and 12Z.

The electrode widths of the transparent electrodes 12Y and 12Z of the plasma display panel driven by the dual scan method are uniformly formed as da throughout the panel. In addition, the gaps between the transparent electrodes 12Y and 12Z are also formed in db throughout the entire panel.

The plasma display panel displays a screen by selectively generating discharges by addressing discharges on an electrode structure of a matrix. In order to express a natural moving image in a large-screen plasma display panel, the addressing time must be shortened, so the scan time is reduced by using the dual scan method. On the other hand, in the dual scan method, the data lines are divided up and down, and the upper and lower scan lines are sequentially driven at the same time to generate an address discharge, thereby reducing the address period to 1/2 compared to the single scan method, thereby enabling high-speed driving to display a large screen.

However, a gap Gap exists between the upper and lower address electrodes X in the panel center portion 30 (or the divided region), so that the scan discharge is unstable in the panel center portion 30, resulting in a difference in luminance from other portions of the panel. Due to such a luminance difference, the screen is separated from the top and bottom, resulting in a poor display quality of the screen. Accordingly, there is a need for a plasma display panel capable of improving display quality in a dual scan driving method.

Accordingly, an object of the present invention is to provide a plasma display panel capable of improving display quality.

In order to achieve the above object, the plasma display panel according to the present invention includes a pair of sustain electrodes having a transparent electrode and a metal electrode, and address electrodes divided up and down in a partition region and crossing the sustain electrode pair. The widths of the transparent electrodes disposed in upper and lower lines 1 to 10 in the vicinity of the divided region are different from the widths of the transparent electrodes disposed in an area other than the divided region. The widths of the transparent electrodes disposed in upper and lower lines 1 to 10 in the vicinity of the divided region are wider than the widths of the transparent electrodes disposed in a region other than the divided region. The transparent electrodes in the vicinity of the divided region become wider in width toward the divided region. The spacing between the transparent electrodes disposed in the vicinity of the divided region is different from the spacing between the transparent electrodes disposed in an area other than the divided region. An interval between the transparent electrodes disposed in upper and lower lines 1 to 10 near the division region is different from an interval between the transparent electrodes disposed in an area other than the division region. An interval between the transparent electrodes disposed in upper and lower lines 1 to 10 near the divided region becomes narrower toward the divided region.

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Other objects and features of the present invention in addition to the above objects will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, a plasma display panel according to the present invention will be described in detail with reference to FIGS. 5 and 6.

5 is a perspective view illustrating a discharge cell structure of a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the discharge cells of the plasma display panel according to the embodiment of the present invention are formed on the scan electrode Y and the sustain electrode Z formed on the upper substrate 110, and on the lower substrate 118. The address electrode X is provided.

Each of the scan electrode Y and the sustain electrode Z has a line width smaller than that of the transparent electrodes 112Y and 112Z and the transparent electrodes 112Y and 112Z, and the metal bus electrodes 113Y, which are formed at one edge of the transparent electrode, respectively. 113Z). Indium tin oxide (ITO) is generally used as a material of the transparent electrodes 112Y and 112Z. As a material of the metal bus electrodes 113Y and 113Z, a metal such as chromium (Cr) is usually used. The metal bus electrodes 113Y and 113Z serve to reduce voltage drop caused by the transparent electrodes 112Y and 112Z having high resistance. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 110 on which the scan electrode Y and the sustain electrode Z are formed. Charged particles in which gas discharge ionization gas (plasma) is generated are accumulated in the upper dielectric layer 114. The passivation layer 116 protects the upper dielectric layer 114 from sputtering of charged particles generated during gas discharge and increases emission efficiency of secondary electrons. As the lower layer 116, magnesium oxide (MgO) is usually used. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The lower dielectric layer 122 and the partition wall 124 are formed on the lower substrate 118 on which the address electrode X is formed.

The phosphor layer 126 is formed on the surfaces of the lower dielectric layer 122 and the partition wall 124. The partition wall 124 is formed in parallel with the address electrode X to physically distinguish the discharge cells, and prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 126 is emitted by ultraviolet rays generated during gas discharge to generate visible light of red, green, or blue. An inert mixed gas such as He + Xe, Ne + Xe or He + Xe + Ne for discharging is injected into the discharge space provided between the upper / lower substrates 110 and 118 and the partition wall 124.

6 is a schematic view of a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 6, a plasma display panel according to an exemplary embodiment of the present invention includes a data line X having a line divided up and down, and a transparent electrode included in a scan electrode Y and a sustain electrode Z (not shown). 112Y and 112Z, and metal bus electrodes formed at one edge of the transparent electrodes 112Y and 112Z.

The plasma display panel according to the present invention uses a dual scan method in which data lines are divided up and down, and the upper and lower scan lines are sequentially driven simultaneously to generate an address discharge.

The electrode widths of the transparent electrodes 12Y and 12Z of a typical plasma display panel are all formed at a constant da in the entire panel. In addition, the gaps between the transparent electrodes 12Y and 12Z are also formed in db throughout the entire panel. In contrast, the plasma display panel according to the present invention has a transparent electrode formed at a portion other than near the center portion 130 of the panel with the electrode widths of the transparent electrodes 112Y and 112Z formed on the upper and lower lines 1 to 10 in the vicinity of the panel center portion 130. 112Y, 112Z). In detail, the electrode widths of the transparent electrodes 112Y and 112Z formed in upper and lower lines 1 to 10 in the vicinity of the panel center portion 130 are gradually increased toward the panel center portion 130. That is, the transparent electrodes 112Y and 112Z of the first line closest to the panel center 130 have an electrode width of da + j, and the transparent electrodes 112Y and 112Z formed of the second line have an electrode width of da + i. Has Where "j" has a value greater than "i".

When the electrode widths of the transparent electrodes 112Y and 112Z are made wide, a large number of wall charges are accumulated in a wide area of the transparent electrodes 112Y and 112Z, and the discharge area is widened, thereby stably generating discharge and improving luminance.

In the plasma display panel according to the present invention, the distance between the transparent electrodes 112Y and 112Z formed in the upper and lower lines of 1 to 10 lines near the center portion 130 of the panel is defined by the transparent electrodes formed in the upper and lower lines of 1 to 10 lines of the center portion 130 portion of the panel. It is formed differently from the interval between (112Y, 112Z). In detail, the interval between the transparent electrodes 112Y and 112Z formed in the upper and lower lines 1 to 10 in the vicinity of the panel center portion 130 is gradually narrowed toward the panel center portion 130. As the electrode width of the transparent electrodes 112Y and 112Z increases toward the panel center portion 130, the gap between the transparent electrodes 112Y and 112Z is narrowed. That is, the distance between the panel center portion 130 and the transparent electrodes 112Y and 112Z of the first line closest to each other has a distance of d-2j, and is formed between the transparent electrodes 112Y and 112Z formed of the second line of the panel central portion 130. The interval is as much as d-2i. Where "j" has a value greater than "i".

When the gap between the transparent electrodes 112Y and 112Z decreases, the discharge can be generated even at a low voltage, thereby reducing the discharge start time and stably generating the discharge.

 Through the above-described structure, stable discharge can be generated in the entire panel, thereby providing uniform luminance over the entire panel.

As described above, the plasma display panel according to the present invention includes transparent electrodes formed on the upper and lower lines 1 to 10 near the divided region between the divided address electrodes among the transparent electrodes formed on the upper plate in the dual scan method in which the data lines are divided up and down. The electrode width is gradually widened toward the center of the panel, and the gap between the transparent electrodes decreases toward the center of the panel, thereby eliminating the phenomenon of deterioration in luminance and separation of the center of the panel near the center of the panel (divided area) during dual scan operation. The display quality can be improved.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a discharge cell structure of a typical three-electrode AC surface discharge type plasma display panel.

2 is a frame diagram illustrating a driving method of a general plasma display panel.

3 is a view schematically illustrating a plasma display panel driven by a single scan method.

4 is a view schematically illustrating a plasma display panel driven by a dual scan method.

5 is a perspective view illustrating a discharge cell structure of a plasma display panel according to an exemplary embodiment of the present invention.

6 is a schematic view of a plasma display panel according to an exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10,110: Upper board 18,118: Lower board

Y: scan electrode Z: sustain electrode

X: address electrode 12Y, 12Z, 112Y, 112Z: transparent electrode

13Y, 13Z, 113Y, 113Z: metal bus electrode 14, 114: upper dielectric layer

16,116: protective film 22,122: lower dielectric layer

24,124: partition 26,126: phosphor layer

30,130: Center panel

Claims (7)

delete Sustain electrode pairs having a transparent electrode and a metal electrode, Address electrodes intersecting the sustain electrode pair and divided up and down in a divided region; And the widths of the transparent electrodes disposed in upper and lower lines 1 to 10 in the vicinity of the divided region are different from the widths of the transparent electrodes disposed in the region other than the divided region. The method of claim 2, And a width of the transparent electrodes arranged in upper and lower lines 1 to 10 in the vicinity of the divided region is wider than a width of the transparent electrodes disposed in an area other than the divided region. The method of claim 3, wherein And the widths of the transparent electrodes in the vicinity of the divided region become wider toward the divided region. The method of claim 2, And a gap between the transparent electrodes disposed in the vicinity of the divided area is different from a gap between the transparent electrodes disposed in an area other than the divided area. The method of claim 5, And a distance between the transparent electrodes arranged in upper and lower lines 1 to 10 in the vicinity of the divided area is different from a distance between the transparent electrodes arranged in an area other than the divided area. The method of claim 6, And a gap between the transparent electrodes arranged in upper and lower lines 1 to 10 in the vicinity of the divided area becomes narrower toward the divided area.