KR100531795B1 - Method for driving plasma display panel - Google Patents
Method for driving plasma display panel Download PDFInfo
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- KR100531795B1 KR100531795B1 KR20030061797A KR20030061797A KR100531795B1 KR 100531795 B1 KR100531795 B1 KR 100531795B1 KR 20030061797 A KR20030061797 A KR 20030061797A KR 20030061797 A KR20030061797 A KR 20030061797A KR 100531795 B1 KR100531795 B1 KR 100531795B1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/293—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/025—Reduction of instantaneous peaks of current
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- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
본 발명은 플라즈마 디스플레이 패널 구동 방법에 관한 것으로, 특히 주사/유지전극(Y전극)과 공통 유지전극(Z전극)에 유지전압과 서로 다른 기울기를 갖는 램프다운 파형을 순차적으로 인가하여 추가적인 비용부담 없이 지터 특성을 개선할 수 있는 플라즈마 디스플레이 패널 구동 방법에 관한 것이다. 종래 주사/유지전극(Y)과 공통 유지전극(Z)에 램프 파형을 동시에 인가하는 구동 방법은 공통 유지전극(Z) 보드의 공통 유지전극(Z)에 램프 파형을 인가하기 위한 추가적인 회로(패스 스위치 블록)가 구비되어야 하기 때문에 추가적인 비용이 들어가는 문제점이 있었다. 이와 같은 문제점을 감안한 본 발명은 전체 셀의 상태를 동일하게 만들기 위해 주사/유지전극(Y)에 램프 파형을 인가하는 단계와, 주사/유지전극(Y)과 공통 유지전극(Z)에 소정의 전압(Vs)을 갖는 유지전압과 서로 다른 기울기를 갖는 램프 다운파형을 순차적으로 인가하는 단계로 이루어진 리셋구간을 포함함으로써, 공통 유지전극(Z) 보드에 추가적인 회로 부담 없이 지터특성을 개선할 수 있는 효과가 있다. 또한, 공통 유지전극(Z) 보드에 추가적인 회로 부담 없이 지터특성을 개선할 수 있기때문에 추가적인 비용 부담을 줄일 수 있는 효과가 있다.The present invention relates to a method of driving a plasma display panel, and in particular, by sequentially applying a ramp down waveform having a different slope from a sustain voltage to a scan / sustain electrode (Y electrode) and a common sustain electrode (Z electrode) without additional costs. The present invention relates to a plasma display panel driving method capable of improving jitter characteristics. The conventional driving method for simultaneously applying the ramp waveform to the scan / sustain electrode Y and the common sustain electrode Z is an additional circuit (pass) for applying the ramp waveform to the common sustain electrode Z of the common sustain electrode Z board. Switch block) has to be provided because of the additional cost. In view of the above problems, the present invention provides a step of applying a ramp waveform to the scan / sustain electrode Y in order to make the state of all cells the same, and to the scan / hold electrode Y and the common sustain electrode Z. By including a reset section consisting of sequentially applying a sustain voltage having a voltage (Vs) and a ramp down waveform having different slopes, the jitter characteristic can be improved without additional circuit burden on the common sustain electrode (Z) board. It works. In addition, since the jitter characteristic can be improved without additional circuit burden on the common sustain electrode Z board, additional cost burden can be reduced.
Description
본 발명은 플라즈마 디스플레이 패널 구동 방법에 관한 것으로, 특히 주사/유지전극(Y전극)과 공통 유지전극(Z전극)에 유지전압과 서로 다른 기울기를 갖는 램프다운 파형을 순차적으로 인가하여 추가적인 비용부담 없이 지터 특성을 개선할 수 있는 플라즈마 디스플레이 패널 구동 방법에 관한 것이다.The present invention relates to a method of driving a plasma display panel, and in particular, by sequentially applying a ramp down waveform having a different slope from a sustain voltage to a scan / sustain electrode (Y electrode) and a common sustain electrode (Z electrode) without additional costs. The present invention relates to a plasma display panel driving method capable of improving jitter characteristics.
정보처리 시스템의 발전과 보급 증가에 따라 시각정보 전달 수단으로 디스플레이 장치의 중요성이 증대되고 있다. 특히 종래 CRT(Cathod Ray Tube)는 사이즈가 크고 동작전압이 높으며 표시 일그러짐이 발생하는 여러 가지 문제점을 가지고 있어 화면의 대형화, 평면화를 목표로 하는 최근의 추세가 적합하지 않아 최근에는 매트릭스 구조를 가지는 각종 평면 디스플레이의 연구가 활발히 진행 중이다.As the development and spread of information processing systems increase, the importance of display devices as visual information transmission means is increasing. In particular, the conventional CRT (Cathod Ray Tube) has various problems such as large size, high operating voltage, and display distortion, so that the recent trend of increasing screen size and flatness is not suitable. Research of flat panel displays is actively underway.
일반적인 플라즈마 디스플레이 패널(PDP)은 He+Xe 또는 Ne+Xe 불활성 혼합가스의 방전시 발생하는 147㎚의 자외선에 의해 형광체를 발광시킴으로써 문자 또는 그래픽을 포함한 화상을 표시하는 장치로서, 대형화가 용이할 뿐만 아니라 표시품질이 우수하고, 응답속도가 빠르다는 특징이 있다. 또한, 박형화가 가능하기 때문에 액정 디스플레이 장치(LCD) 등과 함께 벽걸이용 디스플레이 용도로도 주목받고 있다. A typical plasma display panel (PDP) is a device that displays images containing characters or graphics by emitting phosphors by 147 nm ultraviolet rays generated when the He + Xe or Ne + Xe inert mixed gas is discharged. Rather, the display quality is excellent and the response speed is fast. In addition, since it can be thinned, it is also attracting attention as a wall-mounted display with a liquid crystal display (LCD).
PDP는 전극의 배치 구조에 따라 크게 면방전형과 대향형으로 구별되며, 전극의 노출여부에 따라 교류 방전형(AC type), 직류 방전형(DC type) 또는 혼합형(hybrid type)으로 구별되고, 특히, 3전극 교류 면방전형 PDP는 방전시 표면에 벽전하가 축적되며 방전에 의해 발생되는 스퍼터링으로부터 전극들을 보호하기 때문에 저전압 구동과 장수명의 장점을 가진다.PDPs are classified into a surface discharge type and an opposite type according to the arrangement of the electrodes, and are classified into an AC discharge type, an AC discharge type, a DC discharge type, or a hybrid type according to whether the electrode is exposed. The three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.
도1은 일반적인 교류 면방전형 플라즈마 디스플레이 패널의 단면도를 도시한 것이다. 도시된 바와 같이, 하부기판(1)과, 상기 하부기판(1) 상부에 형성된 어드레스 전극(2X)과, 상기 어드레스 전극(2X) 상부에 형성된 하부 유전체층(3)과, 상기 하부 유전체층(3) 상부에 형성되어 방전거리를 유지시키고 셀간의 전기적 광학적 크로스 토크를 방지하며 형광체층(5)을 수용하는 격벽(4)을 포함한다.1 is a cross-sectional view of a typical AC surface discharge plasma display panel. As shown, the lower substrate 1, the address electrode 2X formed on the lower substrate 1, the lower dielectric layer 3 formed on the address electrode 2X, and the lower dielectric layer 3 It is formed on the top to maintain a discharge distance, to prevent the electro-optical crosstalk between the cells and includes a partition wall (4) for receiving the phosphor layer (5).
또한, 상기 상부 유전체층(7) 상에는 보호막(6)이 형성되는데, 보호막(6)은 방전중 가스이온에 의한 상부 유전체층(7)의 스퍼터링을 방지함으로써 수명을 증대시키고 이차 전자 방출에 의해 방전 개시 전압을 저하시키는 역할을 하는데, 방전 개시 전압이 낮아지면 안정된 방전을 얻을 수 있을 뿐만 아니라 전극의 수명 또한 길어지기 된다. 상기 보호막(7)과 형광체층(5) 사이의 공간은 Ne+Xe, He+Xe 등의 불활성 가스로 충전된다. In addition, a protective film 6 is formed on the upper dielectric layer 7. The protective film 6 increases the lifespan by preventing sputtering of the upper dielectric layer 7 by gas ions during discharge, and discharge start voltage by secondary electron emission. When the discharge start voltage is lowered, not only a stable discharge can be obtained but also the life of the electrode is lengthened. The space between the protective film 7 and the phosphor layer 5 is filled with an inert gas such as Ne + Xe, He + Xe.
또한, PDP의 상부기판(9) 상에는 두개의 전극으로 구성된 방전유지 전극(8)이 형성되고, 그 방전유지 전극(8)은 상부기판(9)의 광투과를 저해하지 아니하도록 주사전극(8Y)과 유지전극(8Z)을 투명전극인 ITO(Indium-Tin-Oxide) 전극으로 구성된다. 그리고, 상기 방전유지 전극(8)의 전압강하 방지를 위해, 이보다 좁은 면적의 금속전극인 버스전극(8'Y, 8'Z)을 구비한다.Further, a discharge holding electrode 8 composed of two electrodes is formed on the upper substrate 9 of the PDP, and the discharge holding electrode 8 is a scanning electrode 8Y so as not to inhibit light transmission of the upper substrate 9. ) And the sustain electrode 8Z are composed of an indium-tin-oxide (ITO) electrode which is a transparent electrode. In order to prevent the voltage drop of the discharge holding electrode 8, bus electrodes 8'Y and 8'Z, which are metal electrodes having a smaller area, are provided.
상기 방전유지 전극(8) 상에 상부 유전체층(7)을 형성하는데, 그 상부 유전체층(7)은 플라즈마 방전전류를 제한함과 아울러 방전시 벽전하를 축적하는 역할을 한다.The upper dielectric layer 7 is formed on the discharge sustaining electrode 8, which limits the plasma discharge current and accumulates wall charges during discharge.
그럼, 도1을 참조하여 PDP의 작동 원리를 설명하면 다음과 같다. 먼저, 방전유지 전극(8)을 구성하는 두 전극(8Y, 8Z) 사이에 방전유지전압에 상당하는 전압을 인가하여 상부 유전체층(7)에 전하를 축적시킨다.Then, referring to Figure 1 will be described the operation principle of the PDP. First, a voltage corresponding to the discharge sustain voltage is applied between the two electrodes 8Y and 8Z constituting the discharge sustain electrode 8 to accumulate charge in the upper dielectric layer 7.
그 후 어드레스 전극(2)에 방전개시전압에 상당하는 전압을 인가하면 글로우 방전에 의해 불활성 가스가 전자와 이온으로 분리되어 플라즈마화 되고, 상기 전자와 이온이 재결합하는 순간에 발생하는 자외선에 의해 형광체층(5)이 발색한다.Subsequently, when a voltage corresponding to the discharge start voltage is applied to the address electrode 2, an inert gas is separated into electrons and ions by a glow discharge, and the plasma is formed, and the phosphor is emitted by ultraviolet rays generated at the moment when the electrons and ions are recombined. The layer 5 develops.
이러한 방전셀은 도 2에 도시된 바와 같이 매트릭스 형태로 배치된다. 도2에서 방전셀(11)은 주사전극라인(Y1 내지 Ym), 유지전극라인(Z1 내지 Zm) 및 어드레스 전극라인(X1 내지 Xn)의 교차부에 마련된다. 주사전극라인(Y1 내지 Ym)은 순차적으로 구동되고, 유지전극라인(Z1 내지 Zm)은 공통으로 구동된다. 어드레스전극라인들(X1 내지 Xn)은 기수번째 라인들과 우수번째 라인들로 분할되어 구동된다.These discharge cells are arranged in a matrix form as shown in FIG. 2, the discharge cells 11 are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn. The scan electrode lines Y1 to Ym are sequentially driven, and the sustain electrode lines Z1 to Zm are commonly driven. The address electrode lines X1 to Xn are driven by being divided into odd-numbered lines and even-numbered lines.
이러한 AC PDP의 구동 방법 중 SWSE(Selective Write Selective Erase) 구동 방법은 리셋구간, 어드레스 구간, 유지 구간으로 나뉘어 진다. 리셋구간은 전체 셀의 상태를 균일하게 만들어주는 구간이고, 어드레스 구간은 원하는 셀의 표시 유무를 결정하는 구간이며, 유지 구간은 어드레스 구간에서 표시 선택된 셀의 유지 방전을 일으키는 구간이다.The SWSE (Selective Write Selective Erase) driving method is divided into a reset section, an address section, and a sustain section. The reset section is a section for making the state of all cells uniform, the address section is a section for determining whether or not a desired cell is displayed, and the sustain section is a section for generating sustain discharge of the selected and displayed cells in the address section.
도3은 리셋구간이 단일 램프 파형에 의해 구동되는 PDP의 구동 파형을 도시한 것이다. 도시된 바와 같이, 리셋구간 동안 주사/유지전극라인들(Y)에 램프 업파형에 이어서 소정의 음전압(-Vw)까지 하강하는 램프 다운파형이 순차적으로 공급된다.3 shows a drive waveform of the PDP in which the reset section is driven by a single ramp waveform. As shown in the figure, the ramp up waveform is sequentially supplied to the scan / sustain electrode lines Y after the ramp up waveform and then to a predetermined negative voltage (−Vw).
그리고, 도4에 PDP의 지터(jitter) 특성을 우수하게 할 수 있는 종래 PDP의 구동 파형을 도시하였다.4 shows a driving waveform of a conventional PDP capable of improving the jitter characteristic of the PDP.
도4는 리셋구간에 도3에 도시한 리셋파형과 주사/유지전극라인들(Y)과 공통 유지전극라인들(Z)에 램프 파형을 동시에 인가하는 트윈 리셋(twin reset)파형을 순차적으로 인가하는 PDP의 구동 파형을 도시한 것이다. 도시된 바와 같이, 도3에 도시한 기존 리셋 파형을 인가하고, 그 다음 주사/유지전극라인들(Y)과 공통 유지전극라인들(Z)에 램프 업파형과 램프 다운파형을 순차적으로 인가한다.FIG. 4 sequentially applies a twin reset waveform for simultaneously applying a ramp waveform to the reset waveform shown in FIG. 3 and the scan / sustain electrode lines Y and the common sustain electrode lines Z during the reset period. The driving waveform of the PDP is shown. As shown in FIG. 3, the conventional reset waveform shown in FIG. 3 is applied, and then a ramp up waveform and a ramp down waveform are sequentially applied to the scan / sustain electrode lines Y and the common sustain electrode lines Z. FIG. .
이때, 주사/유지전극라인들(Y)에 인가되는 램프 다운파형은 소정의 음전압(-Vw)까지 하강하는 반면, 공통 유지전극라인들(Z)에 인가되는 램프 다운파형은 접지 전압까지 하강한다. 즉, 램프 업파형의 기울기는 거의 동일하게 인가하고, 서로 다른 기울기를 갖는 램프 다운파형을 Y전극과 Z전극에 인가하여 구동한다.At this time, the ramp down waveform applied to the scan / hold electrode lines Y drops to a predetermined negative voltage (-Vw), while the ramp down waveform applied to the common sustain electrode lines Z falls to the ground voltage. do. That is, the inclination of the ramp up waveform is applied almost equally, and the ramp down waveform having different inclination is applied to the Y electrode and the Z electrode and driven.
그러나, 상기와 같은 종래 주사/유지전극(Y)과 공통 유지전극(Z)에 램프 파형을 동시에 인가하는 구동 방법은 공통 유지전극(Z) 보드의 공통 유지전극(Z)에 램프 파형을 인가하기 위한 추가적인 회로(패스 스위치 블록)가 구비되어야 하기 때문에 추가적인 비용이 들어가는 문제점이 있었다.However, in the driving method of simultaneously applying the ramp waveform to the scan / hold electrode Y and the common sustain electrode Z as described above, the ramp waveform is applied to the common sustain electrode Z of the common sustain electrode Z board. There is a problem in that additional cost is required because an additional circuit (pass switch block) must be provided.
따라서, 이와 같은 문제점을 감안한 본 발명은 리셋구간에서 주사/유지전극(Y)에 램프 파형을 인가하여 전체 셀의 상태를 동일하게 만들어 주고, 주사/유지전극(Y)과 공통 유지전극(Z)에 소정의 전압(Vs)을 갖는 유지전압과 서로 다른 기울기를 갖는 램프 다운파형을 순차적으로 인가함으로써, 공통 유지전극(Z) 보드에 추가적인 회로 부담 없이 지터특성을 개선할 수 있는 플라즈마 디스플레이 패널 구동 방법을 제공하는데 그 목적이 있다.Therefore, in view of the above problem, the present invention applies the ramp waveform to the scan / hold electrode Y in the reset period to make the state of all cells the same, and the scan / hold electrode Y and the common sustain electrode Z. By sequentially applying a sustain voltage having a predetermined voltage (Vs) and a ramp down waveform having different inclinations to the plasma display panel, a method of driving a plasma display panel which can improve jitter characteristics without additional circuit burden on the common sustain electrode Z board. The purpose is to provide.
또한, 공통 유지전극(Z) 보드에 추가적인 회로 부담 없이 지터특성을 개선할 수 있기때문에 추가적인 비용 부담을 줄일 수 있는 플라즈마 디스플레이 패널 구동 방법을 제공하는데 그 목적이 있다.In addition, since the jitter characteristic can be improved without additional circuit burden on the common sustain electrode (Z) board, an object of the present invention is to provide a plasma display panel driving method capable of reducing additional cost burden.
상기와 같은 목적을 달성하기 위한 본 발명은 주사/유지전극(Y)에 전체 셀의 상태를 동일하게 만들기 위한 램프 파형을 인가하는 단계와; 주사/유지전극(Y)과 공통 유지전극(Z)에 소정의 전압(Vs)을 갖는 유지전압과 서로 다른 기울기를 갖는 램프 다운파형을 순차적으로 인가하는 단계로 이루어진 리셋구간을 포함하는 것을 특징으로 한다.The present invention for achieving the above object comprises the steps of applying a ramp waveform to make the state of the entire cell to the scan / sustain electrode (Y) the same; And sequentially applying a sustain voltage having a predetermined voltage (Vs) and a ramp down waveform having different slopes to the scan / sustain electrode (Y) and the common sustain electrode (Z). do.
또한, 상기 주사/유지전극(Y)에 인가되는 램프 다운파형은 소정의 음전압까지 하강하고, 상기 공통 유지전극(Z)에 인가되는 램프 다운파형은 접지전압까지 하강하는 것을 특징으로 한다.In addition, the ramp down waveform applied to the scan / hold electrode Y drops to a predetermined negative voltage, and the ramp down waveform applied to the common sustain electrode Z falls to a ground voltage.
상기와 같은 특징을 갖는 본 발명 플라즈마 디스플레이 패널 구동 방법에 대한 바람직한 실시예를 첨부한 도면을 참고하여 설명한다.A preferred embodiment of the plasma display panel driving method of the present invention having the above characteristics will be described with reference to the accompanying drawings.
도5는 본 발명 플라즈마 디스플레이 패널 구동 방법에 대한 일 실시예 파형을 도시한 것이다. 도시된 바와 같이, 본 발명의 리셋 구간은 주사/유지전극(Y)에 인가된 램프 파형에 의한 리셋단계와, 주사/유지전극(Y)과 공통 유지전극(Z)에 소정의 전압(Vs)을 갖는 유지전압과 램프 다운파형을 상기 두 전극에 순차적으로 인가하는 단계로 이루어진다.Figure 5 shows a waveform of an embodiment of a plasma display panel driving method of the present invention. As shown, the reset period of the present invention includes a reset step by a ramp waveform applied to the scan / hold electrode Y, and a predetermined voltage Vs at the scan / hold electrode Y and the common sustain electrode Z. As shown in FIG. The sustain voltage and the ramp down waveform having a step is sequentially applied to the two electrodes.
이때, 상기 주사/유지전극(Y)과 공통 유지전극(Z)에 인가되는 램프 다운파형의 기울기는 서로 다르며, 주사/유지전극(Y)에 인가되는 램프 다운파형은 유지전압에서 소정의 음전압(-Vw)까지 하강하고, 공통 유지전극(Z)에 인가되는 램프 다운파형은 유지전압에서 접지전압까지 하강한다. 즉, 주사/유지전극(Y)에는 주사/유지전극(Y) 보드 상에 구비된 음전압을 공급하는 전압 공급부의 전압까지 하강시키고, 공통 유지전극(Z)에는 공통 유지전극(Z) 보드 상에 음전압을 공급하는 전압 공급부가 필요하지 않기 때문에 접지전압까지 하강시킨다.At this time, the slopes of the ramp down waveforms applied to the scan / hold electrode Y and the common sustain electrode Z are different from each other, and the ramp down waveforms applied to the scan / hold electrode Y have a predetermined negative voltage at the sustain voltage. The voltage drops to (-Vw) and the ramp down waveform applied to the common sustain electrode Z drops from the sustain voltage to the ground voltage. That is, the scan / hold electrode Y is lowered to the voltage of the voltage supply unit supplying the negative voltage provided on the scan / hold electrode Y board, and the common sustain electrode Z is placed on the common sustain electrode Z board. Since no voltage supply is needed to supply negative voltage to the power supply, it is reduced to ground voltage.
이와 같이 본 발명은 리셋 구간에서 공통 유지전극(Z)에 램프 업파형이 인가되지 않기때문에 램프 업파형을 인가하기 위한 추가적인 회로(예를 들어, 패스 스위치 블록) 부담 없이 지터 특성을 개선할 수 있는 리셋 파형의 인가가 가능하다.As described above, since the ramp up waveform is not applied to the common sustain electrode Z in the reset period, the jitter characteristic may be improved without burdening an additional circuit (for example, a pass switch block) for applying the ramp up waveform. The reset waveform can be applied.
그리고, 도5에 도시한 본 발명의 트윈 리셋 파형을 인가하면 과방전으로 인한 오방전 현상도 줄일 수 있으며, 이러한 효과를 실제 테스트 결과 디스플레이 상태로부터 확인할 수 있었다.In addition, when the twin reset waveform of the present invention shown in FIG. 5 is applied, erroneous discharge due to overdischarge can be reduced, and this effect can be confirmed from the actual test result display state.
이러한 본 발명의 리셋 구동 파형을 도4에 도시한 종래 리셋 구동 파형과 비교하여 설명하면 다음과 같다.The reset drive waveform of the present invention will be described with reference to the conventional reset drive waveform shown in FIG.
본 발명에 인가되는 리셋 구간에서 전체 셀의 상태를 동일하게 하는 리셋 파형은 도4에 도시한 종래 리셋 파형과 동일하다. 즉, 주사/유지전극(Y)에 인가되는 램프 파형에 의해 전체 셀의 상태를 동일하게 만든다.In the reset period applied to the present invention, the reset waveforms which make the states of all cells the same are the same as the conventional reset waveform shown in FIG. That is, the state of all the cells is made the same by the ramp waveform applied to the scan / sustain electrode Y.
반면, 본 발명은 종래 주사/유지전극(Y)과 공통 유지전극(Z)에 인가되는 램프 업파형의 시간 동안 소정의 전압(Vs)을 갖는 유지전압을 유지하다가 서로 다른 기울기의 램프 다운파형이 인가되어 리셋 구간에서의 동작을 수행한다.On the other hand, the present invention maintains a sustain voltage having a predetermined voltage (Vs) for a ramp up waveform time applied to the conventional scan / sustain electrode (Y) and the common sustain electrode (Z), while ramp down waveforms of different slopes It is applied to perform the operation in the reset section.
상기에서 상세히 설명한 바와 같이 본 발명은 리셋구간에서 주사/유지전극(Y)에 램프 파형을 인가하여 전체 셀의 상태를 동일하게 만들어 주고, 주사/유지전극(Y)과 공통 유지전극(Z)에 소정의 전압(Vs)을 갖는 유지전압과 서로 다른 기울기를 갖는 램프 다운파형을 순차적으로 인가함으로써, 공통 유지전극(Z) 보드에 추가적인 회로 부담 없이 지터특성을 개선할 수 있는 효과가 있다.As described in detail above, the present invention applies the ramp waveform to the scan / sustain electrode Y in the reset section to make the state of all cells the same, and to the scan / sustain electrode Y and the common sustain electrode Z. By sequentially applying a sustain voltage having a predetermined voltage Vs and a ramp down waveform having different slopes, the jitter characteristic can be improved without additional circuit burden on the common sustain electrode Z board.
또한, 공통 유지전극(Z) 보드에 추가적인 회로 부담 없이 지터특성을 개선할 수 있기때문에 추가적인 비용 부담을 줄일 수 있는 효과가 있다.In addition, since the jitter characteristic can be improved without additional circuit burden on the common sustain electrode Z board, additional cost burden can be reduced.
도1은 일반적인 교류 면방전형 플라즈마 디스플레이 패널의 단면도.1 is a cross-sectional view of a typical AC surface discharge plasma display panel.
도2는 일반적인 매트릭스 형태의 플라즈마 디스플레이 패널 전극 배치도.2 is a layout view of a plasma display panel electrode in a general matrix form.
도3은 일반적인 플라즈마 디스플레이 패널 구동 파형도.3 is a waveform diagram of a typical plasma display panel drive;
도4는 종래 지터 특성을 개선하기 위한 플라즈마 디스플레이 패널 구동 파형도.4 is a plasma display panel drive waveform diagram for improving conventional jitter characteristics.
도5는 본 발명 플라즈마 디스플레이 패널 구동 파형도.5 is a waveform diagram of driving the plasma display panel of the present invention;
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