KR100421483B1 - Driving Method of Plasma Display Panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel in which a sustain discharge voltage can be lowered.

In the driving method of the plasma display panel according to the present invention, the auxiliary pulse and the reset pulse are sequentially supplied to the first trigger electrode during the reset period, and the erroneous discharge prevention pulse synchronized with the auxiliary pulse is supplied to the second trigger electrode. Include.

Description

Driving method of plasma display panel {Driving Method of Plasma Display Panel}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving a plasma display panel to lower a sustain discharge voltage.

Plasma Display Panel (hereinafter referred to as "PDP") is a display device using visible light generated from a phosphor when vacuum ultraviolet rays generated by gas discharge excite the phosphor. PDP is thinner and lighter than Cathode Ray Tube (CRT), which has been the mainstay of display means, and has the advantage of being able to realize high definition large screen. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type PDP.

Referring to FIG. 1, a discharge cell of a conventional three-electrode AC surface discharge type PDP is formed on a scan / sustain electrode 12Y and a common sustain electrode 12Z formed on an upper substrate 10, and on a lower substrate 18. The formed address electrode 20X is provided. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan / sustain electrode 12Y and the common sustain electrode 12Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases discharge efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan / sustain electrode 12Y and the common sustain electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 10 / lower substrate 18 and the partition wall 24.

The AC surface discharge type PDP is driven by dividing one frame into several subfields having different discharge times in order to express gray level of an image. Each subfield is further divided into a reset period for uniformly causing discharge, an address period for selecting a discharge cell, and a sustain period for expressing gray scale according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields. Each of the eight subfields is further divided into an address period and a sustain period. Here, the reset period and the address period of each subfield are the same for each subfield, while the sustain period is 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. Is increased. In this way, since the sustain period is different in each subfield, the gray level of the image can be expressed.

Here, in the reset period, a reset pulse is supplied to the common sustain electrode 12Z to cause reset discharge. In the address period, scan pulses are supplied to the scan / sustain electrodes 12Y, and data pulses are supplied to the address electrodes 20X to generate address discharges between the two electrodes 12Y and 20X. During the address discharge, wall charges are formed in the upper and lower dielectric layers 14 and 22. In the sustain period, sustain discharge occurs between the two electrodes 12Y and 12Z by an alternating current signal alternately supplied to the scan / sustain electrode 12Y and the common sustain electrode 12Z.

However, in the conventional AC surface discharge PDP, the sustain discharge space is concentrated in the center of the upper substrate 10, thereby decreasing the utilization of the discharge space. Accordingly, there is a problem that the discharge area is reduced and the luminous efficiency is reduced. In order to solve this problem, a 5-electrode AC surface discharge type PDP as shown in FIG. 2 has been proposed.

2 is a perspective view showing a discharge cell structure of a conventional 5-electrode AC surface discharge type PDP.

Referring to FIG. 2, the conventional 5-electrode AC surface discharge type PDP is positioned at the edges of the discharge cells and the first and second trigger electrodes 34Y and 34Z formed on the upper substrate 30 to be positioned at the center of the discharge cells. The lower substrate 40 in a direction orthogonal to the first and second sustain electrodes 32Y and 32Z, the trigger electrodes 34Y and 34Z, and the sustain electrodes 32Y and 32Z formed on the upper substrate 30. And an address electrode 42X formed at the center of the substrate. An upper dielectric layer 36 and a protective layer 38 are stacked on the upper substrate 30 having the sustain electrodes 32Y and 32Z and the trigger electrodes 34Y and 34Z side by side. The lower dielectric layer 44 and the barrier rib 46 are formed on the lower substrate 40 on which the address electrode 42X is formed, and the phosphor layer 48 is coated on the surfaces of the lower dielectric layer 44 and the barrier rib 46. The trigger electrodes 34Y and 34Z formed at narrow intervals in the center of the discharge cell are used to start the sustain discharge by receiving an AC pulse during the sustain period. The first sustain electrode 32Y and the second sustain electrode 32Z formed at a wide interval at the edge of the discharge cell are supplied with alternating current pulses during the sustain period to start the discharge between the trigger electrodes 34Y and 34Z, and then maintain the plasma discharge. Used for.

3 is a waveform diagram showing a driving waveform of a conventional 5-electrode AC surface discharge type PDP.

Referring to FIG. 3, the conventional 5-electrode AC surface discharge type PDP is driven by dividing one frame into several subfields having different discharge times in order to express the gray level of an image. Each subfield is further divided into a reset period for uniformly generating discharge, an address period for selecting a discharge cell, and a sustain period for expressing gray scale according to the number of discharges. In the reset period, a reset pulse is supplied to the first trigger electrode Ty of the discharge cell to generate reset discharge for initializing the discharge cell. The ramp waveform R is used as the reset pulse supplied to the first trigger electrode Ty. When the ramp waveform R is supplied to the first trigger electrode Ty, a plurality of fine discharges are generated in the discharge cells of the full screen to form uniform wall charges in the discharge cells. In the address period, the scan pulse C is sequentially supplied to the first trigger electrode Ty, and the data pulse Va synchronized with the scan pulse C is supplied to the address electrode X. At this time, an address discharge occurs in the discharge cell supplied with the data pulse Va. In the sustain period, sustain pulses having a predetermined voltage level Vs are alternately supplied to the first and second sustain electrodes Sy and Sz, and lower than sustain pulses to the first and second trigger electrodes Ty and Tz. The trigger pulse having the voltage level Vt is alternately supplied. At this time, the trigger pulse supplied to the first trigger electrode Ty is supplied in synchronization with the sustain pulse supplied to the first sustain electrode Sy, and the trigger pulse supplied to the second trigger electrode Tz is the second sustain electrode. It is supplied in synchronization with the sustain pulse supplied to Sz. Trigger discharge between the first and second trigger electrodes Ty and Tz when the sustain pulse and the trigger pulse are supplied to the first and second sustain electrodes Sy and Sz and the first and second trigger electrodes Ty and Tz. This happens. In this way, when the trigger discharge occurs, charged particles are generated, and the secondary discharge is induced between the first and second sustain electrodes Sy and Sz by the priming effect of the generated charged particles.

However, since the reset pulse is supplied only to the first trigger electrode Ty in the reset period of the 5-electrode AC surface discharge type PDP, a sustain pulse having a high voltage level should be applied during the sustain discharge. That is, since no wall charge is formed on the first sustain electrode Sy, a sustain pulse having a high voltage level should be applied during sustain discharge having a long pass. However, when a sustain pulse having a high voltage level is applied to the first sustain electrode Sy, a discharge occurs with the address electrode X, thereby lowering the discharge efficiency. In order to compensate for this disadvantage, a reset pulse may be applied to the first sustain electrode Sy. However, when the reset pulse is applied to the first sustain electrode Sy, the driving circuit becomes complicated, and since the discharge does not occur on the first sustain electrode Sy during the address discharge, wall charges do not accumulate on the electrode during the address period, so that the sustain discharge Long-pass discharges are induced only when a high voltage is applied. Meanwhile, the first sustain electrode Sy and the first trigger electrode Ty may receive a driving waveform from the same driver. As such, when the first sustain electrode Sy and the first trigger electrode Ty are supplied with the driving waveform from the same driver, the driving circuit is simplified, but the first sustain electrode Sy and the first trigger electrode Ty are independent. It is difficult to induce high efficiency sustain discharge because it is not driven, and high power is applied as a whole to increase power consumption.

Accordingly, an object of the present invention is to provide a method for driving a plasma display panel which can lower the sustain discharge voltage.

1 is a perspective view showing a conventional three-electrode AC surface discharge type plasma display panel.

2 is a perspective view showing a conventional 5-electrode AC surface discharge type plasma display panel.

FIG. 3 is a waveform diagram showing driving waveforms supplied to a five-electrode alternating surface discharge plasma display panel shown in FIG. 2;

4 is a waveform diagram showing a driving waveform supplied to a five-electrode alternating surface discharge plasma display panel according to an embodiment of the present invention.

FIG. 5 is a waveform diagram illustrating driving waveforms supplied to a 5-electrode AC surface discharge plasma display panel according to another embodiment of the present invention; FIG.

<Description of Symbols for Main Parts of Drawings>

10,30: upper substrate 12Y: scan / sustain electrode

12Z: common sustain electrode 14,22,36,44: dielectric layer

16,38: protective film 18,40: lower substrate

20X, 42X: address electrode 24, 46: partition wall

26,48: phosphor layer 32Y, 32Z: sustain electrode

34Y, 34Z: Trigger electrode

In order to achieve the above object, the driving method of the plasma display panel according to the present invention includes the steps of sequentially supplying the auxiliary pulse and the reset pulse to the first trigger electrode during the reset period, and preventing the erroneous discharge synchronized with the auxiliary pulse to the second trigger electrode. Pulse is supplied.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 and 5.

4 is a waveform diagram showing a driving waveform of a 5-electrode AC surface discharge type PDP according to an embodiment of the present invention.

Referring to FIG. 4, the five-electrode AC surface discharge type PDP of the present invention is driven by dividing one frame into several subfields having different number of discharge times in order to express the gray level of an image. Each subfield is further divided into a reset period for uniformly generating discharge, an address period for selecting a discharge cell, and a sustain period for expressing gray scale according to the number of discharges. In the reset period, the auxiliary pulse A and the reset pulse are sequentially supplied to the first trigger electrode Ty of the discharge cell. When the auxiliary pulse A is applied to the first trigger electrode Ty, an auxiliary discharge occurs between the first sustain electrode Sy and the first trigger electrode Ty. At this time, the auxiliary pulse A has a voltage level at which the auxiliary sustain can occur with the first sustain electrode Sy. As a result of the auxiliary discharge, positive wall charges are formed on the first sustain electrode Sy, and negative wall charges are formed on the first trigger electrode Ty. After that, a reset pulse, that is, a ramp waveform R is supplied to the first trigger electrode Ty to generate a reset discharge. At this time, since the ramp waveform R is supplied to the first trigger electrode Ty, fine discharge occurs. Thus, the amount of wall charges formed on the first sustain electrode Sy is not affected. In the address period, the scan pulse C is sequentially supplied to the first trigger electrode Ty, and the data pulse Va synchronized with the scan pulse C is supplied to the address electrode X. At this time, an address discharge occurs in the discharge cell supplied with the data pulse Va. Positive wall charges are formed in the first trigger electrode Ty formed in the discharge cell in which the address discharge is generated. In the sustain period, sustain pulses having a predetermined voltage level Vs are alternately supplied to the first and second sustain electrodes Sy and Sz, and lower than sustain pulses to the first and second trigger electrodes Ty and Tz. The trigger pulse having the voltage level Vt is alternately supplied. At this time, the trigger pulse supplied to the first trigger electrode Ty is supplied in synchronization with the sustain pulse supplied to the first sustain electrode Sy, and the trigger pulse supplied to the second trigger electrode Tz is the second sustain electrode. It is supplied in synchronization with the sustain pulse supplied to Sz. Trigger discharge between the first and second trigger electrodes Ty and Tz when the sustain pulse and the trigger pulse are supplied to the first and second sustain electrodes Sy and Sz and the first and second trigger electrodes Ty and Tz. This happens. In this way, when the trigger discharge occurs, charged particles are generated, and the secondary discharge is induced between the first and second sustain electrodes Sy and Sz by the priming effect of the generated charged particles. At this time, since the positive wall charge is formed on the first sustain electrode Sy, the voltage value of the sustain pulse supplied to the first sustain electrode Sy and the voltage value of the positive wall charge are added together to form a low level of sustain. Pulse can be supplied. Meanwhile, in the embodiment of the present invention as shown in FIG. 4, the discharge may be generated between the first trigger electrode Ty and the second trigger electrode Tz by the auxiliary pulse A supplied to the first trigger electrode Ty. There is. In order to solve such a problem, as shown in FIG. 5, the anti-discharge prevention pulse M synchronized with the auxiliary pulse A may be supplied to the second trigger electrode Tz. As described above, when the mis-discharge prevention pulse M is supplied to the second trigger electrode Tz, pulses having the same polarity are applied to the first and second trigger electrodes Ty and Tz, so that the first and second trigger electrodes Ty, The discharge can be prevented between Tz). On the other hand, the mis-discharge prevention pulse M has a lower voltage value than the auxiliary pulse A, and preferably has the same voltage value Vt as the trigger pulse applied to the second trigger electrode Tz during the sustain period.

As described above, according to the driving method of the plasma display panel according to the present invention, positive wall charges are formed on the first sustain electrode by supplying auxiliary pulses to the first trigger electrode in the reset period for initializing the discharge cells. Thus, since the positive wall charges are formed on the first sustain electrode, the voltage value of the sustain pulse supplied to the first sustain electrode can be minimized.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

A reset period including first and second trigger electrodes formed at an upper center of the discharge cell, first and second sustain electrodes formed at an upper edge of the discharge cell, and an address electrode formed below the discharge cell; In the method of driving a plasma display panel comprising: Sequentially supplying an auxiliary pulse and a reset pulse to the first trigger electrode in the reset period; And supplying an anti-discharge prevention pulse synchronized with the auxiliary pulse to the second trigger electrode. The method of claim 1, And the voltage level of the auxiliary pulse is set such that the first sustain electrode and the first trigger electrode cause discharge. The method of claim 2, And wherein the auxiliary pulses have a positive polarity and positive wall charges are formed on the first sustain electrode by the auxiliary discharge. delete The method of claim 1, And the erroneous discharge prevention pulse has a lower voltage value than the auxiliary pulse. The method of claim 1, And the erroneous discharge prevention pulse has the same voltage value as the trigger pulse supplied to the second trigger electrode in the sustain period in which the discharge cell is discharged in accordance with the gray scale.