KR100421484B1 - Driving Method of Plasma Display Panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel to improve discharge efficiency.

According to an exemplary embodiment of the present invention, a method of driving a plasma display panel includes applying a first erase pulse having a predetermined pulse width to a second sustain electrode during an erase period, and at least one second having a finer width than the first erase pulse during the erase period. Applying an erase pulse to the second trigger electrode, applying a first reset pulse having the same pulse width as the first erase pulse to the first trigger electrode during the reset period, and applying the first reset pulse to the second trigger electrode. Supplying an anti-discharge prevention pulse synchronized with.

Description

Driving method of plasma display panel {Driving Method of Plasma Display Panel}

The present invention relates to a method for driving a plasma display panel, and more particularly, to a method for driving a plasma display panel to improve discharge efficiency.

Plasma Display Panel (hereinafter referred to as "PDP") is a display device using visible light generated from a phosphor when vacuum ultraviolet rays generated by gas discharge excite the phosphor. PDP is thinner and lighter than Cathode Ray Tube (CRT), which has been the mainstay of display means, and has the advantage of being able to realize high definition large screen. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type PDP.

Referring to FIG. 1, a discharge cell of a conventional three-electrode AC surface discharge type PDP includes a scan / sustain electrode 12Y and a common sustain electrode 12Z formed on an upper substrate 10, and a lower substrate 18. An upper dielectric layer 14 and a passivation layer 16 are stacked on the upper substrate 10 on which the scan / sustain electrode 12Y and the common sustain electrode 12Z are arranged side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases discharge efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan / sustain electrode 12Y and the common sustain electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 10 / lower substrate 18 and the partition wall 24.

The AC surface discharge type PDP is driven by dividing one frame into several subfields having different discharge times in order to express gray level of an image. Each subfield is further divided into a reset period for uniformly causing discharge, an address period for selecting a discharge cell, and a sustain period for expressing gray scale according to the number of discharges.

Here, in the reset period, a reset pulse is supplied to the common sustain electrode 12Z to cause reset discharge. In the address period, scan pulses are supplied to the scan / sustain electrodes 12Y, and data pulses are supplied to the address electrodes 20X to cause address discharge between the two electrodes 12Y and 20X. During the address discharge, wall charges are formed in the upper and lower dielectric layers 14 and 22. In the sustain period, sustain discharge occurs between the two electrodes 12Y and 12Z by an alternating current signal alternately supplied to the scan / sustain electrode 12Y and the common sustain electrode 12Z.

However, in the conventional AC surface discharge PDP, the sustain discharge space is concentrated in the center of the upper substrate 10, thereby decreasing the utilization of the discharge space. Accordingly, there is a problem that the discharge area is reduced and the luminous efficiency is reduced. In order to solve this problem, a 5-electrode AC surface discharge type PDP as shown in FIG. 2 has been proposed.

2 is a perspective view showing a discharge cell structure of a conventional 5-electrode AC surface discharge type PDP.

Referring to FIG. 2, the conventional 5-electrode AC surface discharge type PDP is positioned at the edges of the discharge cells and the first and second trigger electrodes 34Y and 34Z formed on the upper substrate 30 to be positioned at the center of the discharge cells. The lower substrate 40 in a direction orthogonal to the first and second sustain electrodes 32Y and 32Z, the trigger electrodes 34Y and 34Z, and the sustain electrodes 32Y and 32Z formed on the upper substrate 30. And an address electrode 42X formed at the center of the substrate. An upper dielectric layer 36 and a protective layer 38 are stacked on the upper substrate 30 having the sustain electrodes 32Y and 32Z and the trigger electrodes 34Y and 34Z side by side. The lower dielectric layer 44 and the barrier rib 46 are formed on the lower substrate 40 on which the address electrode 42X is formed, and the phosphor layer 48 is coated on the surfaces of the lower dielectric layer 44 and the barrier rib 46. The trigger electrodes 34Y and 34Z formed at narrow intervals in the center of the discharge cell are used to start the sustain discharge by receiving an AC pulse during the sustain period. The first sustain electrode 32Y and the second sustain electrode 32Z formed at a wide interval at the edge of the discharge cell are supplied with alternating current pulses during the sustain period to start the discharge between the trigger electrodes 34Y and 34Z, and then maintain the plasma discharge. Used for.

3 is a waveform diagram showing a driving waveform of a conventional 5-electrode AC surface discharge type PDP.

Referring to FIG. 3, the conventional 5-electrode AC surface discharge type PDP is driven by dividing one frame into several subfields having different discharge times in order to express the gray level of an image. Each subfield is further divided into a reset period for uniformly discharging the discharge, an address period for selecting the discharge cells, a sustain period for expressing the gray level according to the number of discharges, and an erasing period for erasing the discharge. In the reset period, the reset pulse R is supplied to the first trigger electrode Ty of the discharge cell to generate reset discharge for initializing the discharge cell. At this time, the ramp waveform is supplied to the reset pulse R, and when the ramp waveform is supplied to the first trigger electrode Ty, the discharge cells are initialized by generating a plurality of fine discharges with the second trigger electrode Tz which is adjacently formed. do. In the address period, the scan pulse C is sequentially supplied to the first trigger electrode Ty, and the data pulse Va synchronized with the scan pulse C is supplied to the address electrode X. At this time, an address discharge occurs in the discharge cell supplied with the data pulse Va. In the sustain period, sustain pulses having a predetermined voltage level Vs are alternately supplied to the first and second sustain electrodes Sy and Sz, and lower than sustain pulses to the first and second trigger electrodes Ty and Tz. The trigger pulse having the voltage level Vt is alternately supplied. At this time, the trigger pulse supplied to the first trigger electrode Ty is supplied in synchronization with the sustain pulse supplied to the first sustain electrode Sy, and the trigger pulse supplied to the second trigger electrode Tz is the second sustain electrode. It is supplied in synchronization with the sustain pulse supplied to Sz. Trigger discharge between the first and second trigger electrodes Ty and Tz when the sustain pulse and the trigger pulse are supplied to the first and second sustain electrodes Sy and Sz and the first and second trigger electrodes Ty and Tz. This happens. In this way, when the trigger discharge occurs, charged particles are generated, and the secondary discharge is induced between the first and second sustain electrodes Sy and Sz by the priming effect of the generated charged particles. In the erase period, the first erase pulse E1 having a fine width is applied to the second sustain electrode Sz, and the second erase pulse E2 is applied to the second trigger electrode Tz to erase the discharge.

In the PDP, the sizes of the red (R) discharge cells, the green (G) discharge cells, and the blue (B) discharge cells are different in order to improve the color temperature. In general, the human eye feels white under any light source (for example, sunlight, fluorescent light, or incandescent light), but when viewed through an image tube of a video camera, the color becomes red or blue depending on the light source. This is due to the color temperature of the light source. If the color temperature is high, the color becomes blue, and if the color temperature is low, the color is red. However, if a white subject is adjusted to be reproduced under a certain light source, other colors may be reproduced correctly. In the PDP, the size of the red discharge cell is the smallest and the size of the blue discharge cell is set the largest in order to improve the color temperature. Since the discharge space of the red discharge cell is the smallest, a high discharge start voltage of several tens of volts or more is applied to the sustain discharge when compared with the blue discharge cell. Accordingly, a sustain pulse having a high voltage level is supplied to all of the red, green, and blue discharge cells. do.

However, when a sustain pulse having a high voltage level is supplied to the first and second sustain electrodes Sy and Sz, the discharge efficiency is reduced by generating an address electrode X formed on the lower substrate 40 and a discharge.

Accordingly, an object of the present invention is to provide a method for driving a plasma display panel which can improve discharge efficiency.

1 is a perspective view showing a conventional three-electrode AC surface discharge type plasma display panel.

2 is a perspective view showing a conventional 5-electrode AC surface discharge type plasma display panel.

FIG. 3 is a waveform diagram illustrating driving waveforms supplied to electrodes of the five-electrode AC surface discharge plasma display panel shown in FIG. 2.

4 and 5 are waveform diagrams showing a method for driving a plasma display panel according to an embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

10,30: upper substrate 12Y: scan / sustain electrode

12Z: common sustain electrode 14,22,36,44: dielectric layer

16,38: protective film 18,40: lower substrate

20X, 42X: address electrode 24, 46: partition wall

26,48: phosphor layer 32Y, 32Z: sustain electrode

34Y, 34Z: Trigger electrode

In order to achieve the above object, a method of driving a plasma display panel according to the present invention includes applying a first erase pulse having a predetermined pulse width to a second sustain electrode during an erase period, and having a finer width than the first erase pulse during the erase period. At least one second erase pulse is applied to the second trigger electrode, a first reset pulse having the same pulse width as the first erase pulse is applied to the first trigger electrode during the reset period, and the second trigger And supplying an anti-discharge prevention pulse synchronized with the first reset pulse to the electrode.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 and 5.

4 is a waveform diagram illustrating driving waveforms of the plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 4, the PDP of the present invention is driven by dividing one frame into several subfields having different discharge times in order to express the gray level of an image. Each subfield is further divided into a reset period for uniformly discharging the discharge, an address period for selecting the discharge cells, a sustain period for expressing the gray level according to the number of discharges, and an erasing period for erasing the discharge. First, during the erase period, a first erase pulse E1 having a predetermined pulse width is applied to the second sustain electrode Sz, and a second erase pulse E2 having a fine pulse width to the second trigger electrode Tz. Is applied. At this time, the first erase pulse E1 is set to the same pulse width as the sustain pulse applied in the sustain period. Therefore, negative wall charges are stored in the second sustain electrode Sz to which the first erase pulse E1 is applied. At this time, since the second erase pulse E2 having a fine pulse width is applied to the second trigger electrode Tz, an erase discharge occurs between the trigger electrodes Ty and Tz.

In the reset period, the first and second reset pulses R1 and R2 are sequentially applied to the first trigger electrode Ty. The first reset pulse R1 is set to the same pulse width as the sustain pulse. The first reset pulse R1 causes the discharge to occur between the first trigger electrode Ty and the first sustain electrode Sy. To this end, the first reset pulse R1 has a voltage value set to cause discharge with the first sustain electrode Sy. Due to the discharge between the first trigger electrode Ty and the first sustain electrode Sy, negative wall charges are accumulated on the first trigger electrode Ty, and positive wall charges are accumulated on the first sustain electrode Sy. . Thereafter, the second reset pulse R2 is supplied to the first trigger electrode Ty. In this case, a ramp waveform is supplied to the second reset pulse R2, and a plurality of fine discharges are generated between the first and second trigger electrodes Ty and Tz by the ramp waveform. Since fine discharge occurs between the first and second trigger electrodes Ty and Tz, the wall charges formed on the first sustain electrode Sy are not affected. In the address period, the scan pulse C is sequentially supplied to the first trigger electrode Ty, and the data pulse Va synchronized with the scan pulse C is supplied to the address electrode X. At this time, an address discharge occurs in the discharge cell supplied with the data pulse Va. In the sustain period, sustain pulses having a predetermined voltage level Vs are alternately supplied to the first and second sustain electrodes Sy and Sz, and lower than sustain pulses to the first and second trigger electrodes Ty and Tz. The trigger pulse having the voltage level Vt is alternately supplied. Trigger discharge between the first and second trigger electrodes Ty and Tz when the sustain pulse and the trigger pulse are supplied to the first and second sustain electrodes Sy and Sz and the first and second trigger electrodes Ty and Tz. This happens. In this way, when the trigger discharge occurs, charged particles are generated, and the secondary discharge is induced between the first and second sustain electrodes Sy and Sz by the priming effect of the generated charged particles. When sustain discharge is started between the first and second sustain electrodes Sy and Sz, a positive sustain pulse is supplied to the first sustain electrode Sy, and the second sustain electrode Sz maintains a ground potential. On the other hand, positive wall charges formed in the reset period are accumulated in the first sustain electrode Sy, and negative wall charges formed in the erase period are accumulated in the second sustain electrode Sz. Therefore, even if a low level sustain pulse is supplied to the first and second sustain electrodes Sy and Sz, the discharge can be started.

Meanwhile, in the exemplary embodiment of the present invention as shown in FIG. 4, the discharge may be generated between the first trigger electrode Ty and the second trigger electrode Tz by the auxiliary pulse R1 supplied to the first trigger electrode Ty. There is. In order to solve this problem, as shown in FIG. 5, the anti-discharge prevention pulse M1 synchronized with the auxiliary pulse R1 may be supplied to the second trigger electrode Tz. As such, when the mis-discharge prevention pulse M1 is supplied to the second trigger electrode Tz, pulses having the same polarity are applied to the first and second trigger electrodes Ty and Tz, so that the first and second trigger electrodes Ty, It is possible to prevent the discharge from occurring between Tz). The mis-discharge prevention pulse M1 is set to a lower voltage value than the auxiliary pulse R1. On the other hand, the voltage value of the mis-discharge prevention pulse M1 may be set equal to the trigger pulse.

As described above, according to the driving method of the plasma display panel according to the present invention, since the wall charges having different polarities are formed in the first and second sustain electrodes in the erase period and the reset period, the sustain pulse having a low voltage level in the sustain period Can be supplied. Therefore, the discharge efficiency can be improved in the PDP of the present invention.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (8)

A first and second trigger electrodes formed at an upper center of the discharge cell, first and second sustain electrodes formed at an upper edge of the discharge cell, and an address electrode formed below the discharge cell; In the driving method of a plasma display panel which is divided into a period, an address period, a sustain period, and an erase period, Applying a first erase pulse having a predetermined pulse width to the second sustain electrode during the erase period; Applying at least one second erase pulse having a finer width than the first erase pulse to the second trigger electrode during the erase period; Applying a first reset pulse having the same pulse width as the first erase pulse to the first trigger electrode during the reset period; And supplying an anti-discharge prevention pulse synchronized with the first reset pulse to the second trigger electrode. The method of claim 1, And the first erase pulse has the same pulse width as the sustain pulse applied in the sustain period. The method of claim 1, And the voltage of the first reset pulse is set to cause a discharge with the first sustain electrode. The method of claim 1, And applying a second reset pulse to the first trigger electrode after the first reset pulse is applied in the reset period. The method of claim 4, wherein And the second reset pulse has a ramp waveform. delete The method of claim 1, And the erroneous discharge preventing pulse has a lower voltage value than the first reset pulse. The method of claim 1, And the erroneous discharge prevention pulse is set to the same voltage value as the trigger pulse supplied to the second trigger electrode in the sustain period in which the discharge cells are discharged in accordance with the gray scale.