KR20020068548A - Plasma display panel - Google Patents

Abstract

PURPOSE: A plasma display panel is provided to enable high speed operation and improve discharge efficiency. CONSTITUTION: A plasma display panel comprises a top plate(50), sustain electrode pair(62Y,62Z) and trigger electrodes(64Y,64Z) on the top plate(50), a bottom plate(54) opposite to the top plate(50), a first dielectric layer(56) on the bottom plate(54), an address electrode(58X) on the first dielectric layer(56), and a second dielectric layer(60) covering the address electrode(58X). The sustain electrode pair(62Y,62Z) are formed outside a discharge cell. The trigger electrodes(64Y,64Z) are formed at the center of the discharge cell. A third dielectric layer is formed between the first dielectric layer(56) and the address electrode(58X) in parallel to the address electrode(58X). A pulse signal is applied to the address electrode(58X) during a sustain period.

Description

Plasma Display Panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel capable of high-speed driving and improving discharge efficiency.

Plasma Display Panel (hereinafter referred to as "PDP") is a display device using visible light generated from a phosphor when vacuum ultraviolet rays generated by gas discharge excite the phosphor. PDP is thinner and lighter than Cathode Ray Tube (CRT), which has been the mainstay of display means, and has the advantage of being able to realize high definition large screen. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type PDP.

Referring to FIG. 1, a discharge cell of a conventional three-electrode AC surface discharge type PDP includes a scan / sustain electrode 12Y and a common sustain electrode 12Z formed on an upper substrate 10, and a lower substrate 18. The formed address electrode 20X is provided. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan / sustain electrode 12Y and the common sustain electrode 12Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases discharge efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan / sustain electrode 12Y and the common sustain electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 10 / lower substrate 18 and the partition wall 24.

The AC surface discharge type PDP is driven by dividing one frame into several subfields having different discharge times in order to express gray level of an image. Each subfield is further divided into a reset period for uniformly causing discharge, an address period for selecting a discharge cell, and a sustain period for expressing gray scale according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields. Each of the eight subfields is further divided into an address period and a sustain period. Here, the reset period and the address period of each subfield are the same for each subfield, while the sustain period is 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. Is increased. In this way, since the sustain period is different in each subfield, the gray level of the image can be expressed.

Here, in the reset period, a reset pulse is supplied to the common sustain electrode 12Z to cause reset discharge. In the address period, scan pulses are supplied to the scan / sustain electrodes 12Y, and data pulses are supplied to the address electrodes 20X to generate address discharges between the two electrodes 12Y and 20X. During the address discharge, wall charges are formed in the upper and lower dielectric layers 14 and 22. In the sustain period, sustain discharge occurs between the two electrodes 12Y and 12Z by an alternating current signal alternately supplied to the scan / sustain electrode 12Y and the common sustain electrode 12Z.

However, in the conventional AC surface discharge PDP, the sustain discharge space is concentrated in the center of the upper substrate 10, thereby decreasing the utilization of the discharge space. Accordingly, there is a problem that the discharge area is reduced and the luminous efficiency is reduced. In order to solve this problem, a 5-electrode AC surface discharge type PDP as shown in FIG. 2 has been proposed.

2 and 3 are a perspective view and a cross-sectional view showing a discharge cell structure of a conventional 5-electrode AC surface discharge type PDP.

Referring to FIGS. 2 and 3, the conventional 5-electrode AC surface discharge type PDP includes first and second trigger electrodes 34Y and 34Z formed on the upper substrate 30 so as to be positioned at the center portion of the discharge cell. Scan / sustain electrode 32Y and common sustain electrode 32Z, trigger electrodes 34Y and 34Z, scan / sustain electrode 32Y and common sustain electrode 32Z formed on upper substrate 30 so as to be located at the edges. Address electrode 42X formed in a central portion of the lower substrate 40 in a direction orthogonal to each other. The upper dielectric layer 36 and the protective film 38 are formed on the upper substrate 30 having the scan / sustain electrode 32Y, the first trigger electrode 34Y, the second trigger electrode 34Z, and the common sustain electrode 32Z side by side. This is laminated. The lower dielectric layer 44 and the barrier rib 46 are formed on the lower substrate 40 on which the address electrode 42X is formed, and the phosphor layer 48 is coated on the surfaces of the lower dielectric layer 44 and the barrier rib 46. The trigger electrodes 34Y and 34Z formed at a narrow interval Ni at the center of the discharge cell are used to start sustain discharge by receiving an AC pulse during the sustain period. The scan / sustain electrode 32Y and the common sustain electrode 32Z formed at a wide interval Wi at the edge of the discharge cell are supplied with an alternating pulse during the sustain period, and then discharge is started between the trigger electrodes 34Y and 34Z. Used to maintain.

The conventional 5-electrode AC surface discharge type PDP is driven by dividing one frame into several subfields having different discharge times in order to express gray levels of an image. Each subfield is further divided into a reset period for uniformly generating discharge, an address period for selecting a discharge cell, and a sustain period for expressing gray scale according to the number of discharges. In the reset period, a reset pulse is supplied to the second trigger electrode 34Z of the discharge cell to generate reset discharge for initializing the discharge cell. In the address period, scan pulses are sequentially supplied to the first trigger electrode 34Y, and data pulses synchronized with the scan pulses are supplied to the address electrodes 42X. At this time, an address discharge occurs in the discharge cell supplied with data. In the sustain period, alternating pulses of different levels are alternately applied to the first and second trigger electrodes 34Y and 34Z, the scan / sustain electrodes 32Y, and the common sustain electrode 32Z. First, when a discharge is started between the first and second trigger electrodes 34Y and 34Z, two between the scan / sustain electrode 32Y and the common sustain electrode 32Z due to the priming effect of the charged particles generated at this time. Differential discharges are induced. Even if the distance Wi between the scan / sustain electrode 32Y and the common sustain electrode 32Z is large, the discharge can be performed even with sustain pulses having a relatively low voltage level due to the priming discharge between the first and second trigger electrodes 34Y and 34Z. It can be raised.

The sustain discharge process of the conventional 5-electrode AC surface discharge type PDP will be described in detail with reference to FIGS. 4A and 4B. When the sustain pulse is applied to the first trigger electrode Ty, the scan / sustain electrode Sy, the second trigger electrode Tz, and the common sustain electrode Sz, first, the first trigger electrode Ty and the second trigger electrode are first applied. Discharge occurs between (Tz). After the discharge occurs between the first trigger electrode Ty and the second trigger electrode Tz, the second trigger electrode Tz and the common sustain electrode Sz or the first trigger electrode Ty and the scan / sustain electrode Sy Discharge occurs in the liver. After the discharge occurs between the second trigger electrode Tz and the common sustain electrode Sz or the first trigger electrode Ty and the scan / sustain electrode Sy, between the scan / sustain electrode Sy and the common sustain electrode Sz. Discharge occurs. At this time, even if the interval Wi between the scan / sustain electrode Sy and the common sustain electrode Sz is large, the first and second trigger electrodes Ty and Tz, the second trigger electrode Tz, and the common sustain electrode Sz. Or a priming discharge between the first trigger electrode Ty and the scan / sustain electrode Sy may cause a discharge even with a sustain pulse of a relatively low voltage level. In this manner, the discharge is started using the trigger electrodes Ty and Tz formed at a narrow interval Ni, thereby suppressing an increase in the discharge start voltage, while the scan / sustain electrode Sy and the common sustain electrode ( A long discharge path between Sz) can cause sustain discharge.

The discharge contributing to the luminance in the five-electrode PDP operating as described above is the discharge occurring between the scan / sustain electrode Sy and the common sustain electrode Sz. The discharges occurring between the trigger electrodes Ty and Tz and the second trigger electrode Tz and the common sustain electrode Sz or between the first trigger electrode Ty and the scan / sustain electrode Sy are the scan / sustain electrodes Sy. And a discharge for generating charged particles such that a discharge can occur between the common sustain electrode Sz. Therefore, microdischarge should occur between the trigger electrodes Ty and Tz and the second trigger electrode Tz and the common sustain electrode Sz or between the first trigger electrode Ty and the scan / sustain electrode Sy. However, a strong discharge occurs between the trigger electrodes Ty and Tz formed at narrow intervals Ni. In addition, a strong discharge occurs between the second trigger electrode Tz and the common sustain electrode Sz or between the first trigger electrode Ty and the scan / sustain electrode Sy. As such, when a strong discharge occurs between the trigger electrodes Ty and Tz and the second trigger electrode Tz and the common sustain electrode Sz or the first trigger electrode Ty and the scan / sustain electrode Sy, the scan / sustain electrode The discharge between (Sy) and the common sustain electrode (Sz) is weakened, which lowers the discharge efficiency of the PDP. In addition, in the conventional five-electrode PDP, the larger the area on which the phosphor 48 is coated, the higher the discharge efficiency is. In order to increase the coating area of the phosphor 48, the height of the partition wall 46 must be increased. However, when the height of the partition wall 46 is increased, a high voltage must be applied to the address electrode 42X. Therefore, when the height of the partition wall 46 is increased, a lot of power consumption is consumed, and high-speed addressing cannot be performed in the address period.

Accordingly, an object of the present invention is to provide a plasma display panel capable of high speed driving and improving discharge efficiency.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a perspective view showing a discharge cell structure of a conventional 5-electrode AC surface discharge type plasma display panel.

3 is a cross-sectional view illustrating a discharge cell structure of the 5-electrode AC surface discharge plasma display panel shown in FIG. 2;

4A to 4B are cross-sectional views illustrating sustain discharges generated in the 5-electrode AC surface discharge type plasma display panel shown in FIG. 2;

5A and 5B are sectional views showing the discharge cell structure of the plasma display panel according to the first embodiment of the present invention.

6A and 6B are sectional views showing the discharge cell structure of the plasma display panel according to the second embodiment of the present invention.

FIG. 7A is a cross-sectional view showing sustain discharge occurring in the plasma display panel according to the first embodiment of the present invention shown in FIGS. 5A and 5B.

FIG. 7B is a cross-sectional view illustrating sustain discharge occurring in the plasma display panel according to the second embodiment of the present invention shown in FIGS. 6A and 6B.

<Description of Symbols for Main Parts of Drawings>

10,30,50: Upper substrate 12Y, 32Y, 62Y: Scanning / sustaining electrode

12Z, 32Z, 62Z: common sustain electrode 14, 22, 36, 44, 52, 56, 60, 66, 74: dielectric layer

16,38,70: protective film 18, 40, 54: lower substrate

20X, 42X, 58X: Address electrode 24, 46, 72: Bulkhead

26,48: phosphor layer 34Y, 34Z, 64Y, 64Z: trigger electrode

In order to achieve the above object, the plasma display panel of the present invention includes a pair of sustain electrodes formed on the upper substrate and formed at the periphery of the discharge cell, trigger electrodes formed on the upper substrate and formed at the center of the discharge cell, A lower substrate is disposed to face each other, a first dielectric layer formed on the lower substrate, an address electrode formed on the first dielectric layer, and a second dielectric layer formed on the address electrode to cover the address electrode.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5A to 7B.

5A and 5B are diagrams illustrating discharge cells of the 5-electrode plasma display panel according to the first embodiment of the present invention.

FIG. 5B is a view showing the upper substrate rotated 90 ° with respect to the lower substrate in order to show the lower electrode structure of the 5-electrode PDP discharge cell according to the first embodiment of the present invention in detail.

5A and 5B, the five-electrode PDP according to the first embodiment of the present invention includes first and second trigger electrodes 64Y and 64Z formed on the upper substrate 50 to be positioned at the center of the discharge cell. Scan / sustain electrode 62Y and common sustain electrode 62Z, trigger electrodes 64Y and 64Z, scan / sustain electrode 62Y, and common formed on upper substrate 50 so as to be located at the edge of the discharge cell. The address electrode 58X is formed on the lower substrate 54 in a direction orthogonal to the sustain electrodes 62Z. The upper dielectric layer 52 and the passivation layer 70 are formed on the upper substrate 50 having the scan / sustain electrode 62Y, the first trigger electrode 64Y, the second trigger electrode 64Z, and the common sustain electrode 62Z side by side. The first lower dielectric layer 56 is formed on the lower substrate 54, and the address electrode 58X is formed on the first lower dielectric layer 56. The second lower dielectric layer 60 is formed on the address electrode 58X. The second lower dielectric layer 60 is formed to cover the address electrode 58X formed at the center of the discharge cell. Therefore, the second lower dielectric layer 60 has a smaller area than the first lower dielectric layer 56 formed on the entire surface of the lower substrate 54 and is formed in a larger area than the address electrode 58X. In an embodiment of the present invention, an address electrode 58X is formed on the first lower dielectric layer 56. When the address electrode 58X is formed on the first lower dielectric layer 56, the gap between the address electrodes 58X and the electrodes 62Y, 64Y, 64Z, and 62Z formed on the upper substrate 50 is narrowed. Therefore, the address voltage supplied to the electrode to the address electrode 58X can be lowered, so that high-speed driving can be achieved and discharge efficiency can be improved. In addition, the height of the partition wall 72 may be increased as the distance between the address electrodes 58X and the electrodes 62Y, 64Y, 64Z, 62Z formed on the upper substrate 50 becomes narrow. Therefore, many phosphors can be applied on the partition wall 72 to improve the discharge efficiency of the PDP.

6A and 6B illustrate discharge cells of a 5-electrode plasma display panel according to a second embodiment of the present invention.

FIG. 6B is a view illustrating a lower electrode structure of the 5-electrode PDP discharge cell according to the second embodiment of the present invention rotated 90 ° with respect to the lower substrate in detail.

6A and 6B, the five-electrode PDP according to the second embodiment of the present invention includes first and second trigger electrodes 64Y and 64Z formed on the upper substrate 50 to be positioned at the center of the discharge cell. Scan / sustain electrode 62Y and common sustain electrode 62Z, trigger electrodes 64Y and 64Z, scan / sustain electrode 62Y, and common formed on upper substrate 50 so as to be located at the edge of the discharge cell. The address electrode 58X is formed on the lower substrate 54 in a direction orthogonal to the sustain electrodes 62Z. The upper dielectric layer 52 and the passivation layer 70 are formed on the upper substrate 50 having the scan / sustain electrode 62Y, the first trigger electrode 64Y, the second trigger electrode 64Z, and the common sustain electrode 62Z side by side. This is laminated. The first and second lower dielectric layers 56 and 66 are sequentially formed on the lower substrate 54, and the address electrode 58X is formed on the second lower dielectric layer 66. The third lower dielectric layer 74 is formed on the address electrode 58X to cover the address electrode 58X. The first lower dielectric layer 56 is formed on the entire surface of the lower electrode 54. The second lower dielectric layer 66 is formed in a direction crossing the electrodes 62Y, 64Y, 64Z, and 62Z formed on the upper substrate 50 at the center of the discharge cell so that the address electrode 58X can be formed. The third lower dielectric layer 74 is formed on the address electrode 58X and the second lower dielectric layer 66 so as to overturn the address electrode 58X. As such, when the address electrodes 58X are formed on the first and second lower dielectric layers 56 and 66, the gaps between the address electrodes 58X and the electrodes 62Y, 64Y, 64Z, and 62Z formed on the upper substrate 50 are determined. This narrows. Therefore, the address voltage supplied to the electrode to the address electrode 58X can be lowered, thereby enabling high-speed driving and improving the discharge efficiency as compared with the related art. In addition, the height of the partition wall 72 may be increased as the distance between the address electrodes 58X and the electrodes 62Y, 64Y, 64Z, 62Z formed on the upper substrate 50 becomes narrow. Therefore, many phosphors can be applied on the partition wall 72 to improve the discharge efficiency of the PDP. In particular, in the second embodiment of the present invention, since the address electrodes 58X are formed on the first and second lower dielectric layers 56 and 66, the height of the partition wall 72 is improved as compared with the first embodiment. The address voltage supplied to the address electrode 58X can be lowered. Meanwhile, in the sustain period of the present invention, a pulse having a frequency twice as high as a sustain pulse applied to the electrodes 62Y, 64Y, 64Z, and 62Z formed on the upper substrate 50 may be supplied to the address electrode 58X. . The pulses supplied to the address electrode 58X are alternately synchronized with the sustain pulses supplied to the first trigger electrode 64Y and the scan / sustain electrode 62Y and the second trigger electrode 64Z and the common sustain electrode 62Z. It is supplied. At this time, the voltage value of the pulse supplied to the address electrode 58X is set so that weak discharge can occur with the scan / sustain electrode 62Y or the common sustain electrode 62Z.

7A and 7B illustrate a sustain discharge process of the plasma display panel according to the first and second embodiments of the present invention.

7A and 7B, first, a sustain pulse is applied to the first trigger electrode 64Y, the scan / sustain electrode 62Y, the second trigger electrode 64Z, and the common sustain electrode 62Z, and the address electrode ( When a pulse having a predetermined voltage value is applied to 58X, a discharge occurs between the scan / sustain electrode 62Y or the common sustain electrode 62Z and the address electrode 58X. At this time, since the address electrode 58X is formed high, the voltage value of the pulse applied to the address electrode 58X can be minimized. After the discharge occurs between the scan / sustain electrode 62Y or the common sustain electrode 62Z and the address electrode 58X, a sustain discharge occurs between the scan / sustain electrode 62Y and the common sustain electrode 62Z. At this time, only the wall charges are formed in the trigger electrodes 64Y and 64Z, and thus the sustain discharges are easily generated. Compared with the conventional 5-electrode PDP, in the present invention, only one weak discharge occurs before the sustain discharge occurs between the scan / sustain electrode 62Y and the common sustain electrode 62Z. Therefore, in the present invention, the luminous efficiency of the PDP can be improved. In addition, in the present invention, since no discharge occurs between the trigger electrodes 64Y and 64Z, a low voltage for forming wall charges may be applied to the trigger electrodes 64Y and 64Z. Therefore, power consumption of the PDP can be minimized.

As described above, according to the plasma display panel according to the present invention, the gap between the electrodes formed on the upper substrate and the electrodes formed on the lower substrate can be narrowed and the height of the partition wall can be increased. By narrowing the distance between the electrodes formed on the upper and lower substrates, the driving voltage can be lowered, thereby enabling high-speed driving and improving the discharge efficiency. In addition, since the height of the partition wall is increased, the application area of the discharge space and the phosphor can be increased, thereby improving the discharge efficiency. Furthermore, in the present invention, since the sustain discharge can be started by generating a weak discharge between the scan / sustain electrode or the common sustain electrode and the address electrode, the discharge efficiency can be improved. In addition, since the trigger electrodes do not discharge in the sustain period and form only wall charges, voltages applied to the trigger electrodes can be minimized.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (4)

A pair of sustain electrodes formed on the upper substrate and formed at the periphery of the discharge cell; Trigger electrodes formed on the upper substrate and formed in the center of the discharge cell, A lower substrate installed to face the upper substrate; A first dielectric layer formed on the lower substrate; An address electrode formed on the first dielectric layer; And a second dielectric layer formed on the address electrode to cover the address electrode. The method of claim 1, And a third dielectric layer formed parallel to the address electrode between the first dielectric layer and the address electrode. The method according to claim 1 or 2, And a pulse signal is supplied to the address electrode in a sustain period for sustaining emission of the discharge cells. The method of claim 3, wherein The pulse signal has a frequency twice that of the sustain pulses supplied to the sustain electrode pairs and the trigger electrodes in the sustain period, and is supplied in synchronization with the sustain pulses supplied to the sustain electrode pairs and the trigger electrodes. Plasma display panel.