KR20030002207A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

PURPOSE: A semiconductor device is provided to sufficiently decrease the stress applied by a nitride layer to a substrate and to reduce a junction leakage current by interposing an oxide layer functioning as a buffer layer between the substrate and the nitride layer. CONSTITUTION: A gate insulation layer(210), a gate in which a polysilicon layer(220) and a tungsten layer(230) are stacked, and an insulation layer(240) are sequentially stacked in a cell region of a semiconductor substrate(200). A spacer is formed on the side of the insulation layer and the gate, and is formed on the substrate. The first oxide layer, the first nitride layer, the second oxide layer and the second nitride layer are sequentially stacked in the spacer.

Description

Semiconductor device and its manufacturing method {SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a semiconductor device capable of reducing a junction leakage current due to stress of a nitride film and a method for manufacturing the same.

As the line width of the gate decreases due to the high integration of the semiconductor device, the gate resistance increases, and thus the signal processing speed of the device decreases. Therefore, in order to reduce such gate resistance, in the highly integrated semiconductor device having a design rule of 0.13 µm or less, a tungsten film having a low resistance is stacked on the polysilicon film to form a gate. On the other hand, by using the tungsten film as the gate electrode material, the exposed portion of the tungsten film is sealed with a nitride film in order to prevent the blow up of the tungsten film caused by oxidation during the subsequent heat treatment process.

1 is a cross-sectional view for explaining a method of manufacturing a conventional semiconductor device having the tungsten gate described above.

Referring to FIG. 1, a gate insulating layer 110 is formed on a semiconductor substrate 100 in which a cell region C and a peripheral region P are defined, and a polysilicon layer 120 and tungsten as a gate material thereon. The film 130 is formed sequentially. After that, an insulating film for hard mask 140 is formed on the tungsten film 130, and the tungsten film 130 and the polysilicon film 120 are etched using the insulating film 140 as a mask to form the cell region C. Gates G1 and G2 are formed in the and peripheral regions P, respectively.

Then, the first oxide film 150 is formed on the surface of the semiconductor substrate 100 and the sidewalls of the polysilicon film 120 by a selective oxidation process, and a tungsten film generated by oxidation in a subsequent heat treatment process ( In order to prevent blow-up of the 130, the first nitride film 160 is formed on the surface of the substrate on which the oxide film 150 is formed. Thereafter, impurity ions are implanted into the substrate 100 on both sides of the gates G1 and G2 to form a source and a drain (not shown), and the second nitride film 170 and the second oxide film 180 are formed on the entire surface of the substrate. To form sequentially.

Next, a first mask pattern (not shown) for exposing the peripheral region P and masking the cell region C is formed by a photolithography process, and the second oxide layer 180 of the exposed peripheral region P is formed. The second nitride film 170, the first nitride film 160, and the first oxide film 150 are blanket-etched to expose the surface of the substrate 100, so that the gate G2 and the insulating film of the peripheral region P are exposed. After forming the spacer S1 on the sidewalls 140, the first mask pattern is removed by a known method. Then, a second mask pattern (not shown) for exposing the cell region C and masking the peripheral region P is formed by a photolithography process, and the second oxide layer 180 of the exposed cell region P is formed. After wet etching, the second nitride film 170, the first nitride film 160, and the first oxide film 150 are etched by a blanket such that the surface of the substrate 100 is exposed to the gate of the cell region C. After the spacers S2 are formed on the sidewalls of the substrate G1 and the insulating layer 140, the second mask pattern is removed by a known method.

Then, after the third nitride film 190 is deposited on the substrate having the resultant structure, a subsequent process such as a contact forming process may be performed although not shown. Here, the third nitride film 190 serves as an etch stop layer in the contact forming process.

However, in the conventional semiconductor device described above, as shown in FIG. 1, since the substrate 100 and the third nitride film 190 serving as an etch stop layer are in direct contact with each other, the third nitride film 190 is in contact with the third nitride film 190. As a result, stress is applied to the substrate 100 to cause an interface defect or the like. As a result, the junction leakage current increases, resulting in a problem that the characteristics of the device deteriorate. In particular, in a memory device such as a dynamic random access memory (DARM), it is difficult to set a desired refresh condition due to the increase of the junction leakage current, and thus, excellent refresh characteristics cannot be obtained.

In addition, due to the stress applied by the nitride film, there is a problem in that the mobility of electrons is reduced and current characteristics of the device are deteriorated.

Accordingly, the present invention is to solve the above problems, an object of the present invention to provide a semiconductor device capable of reducing the junction leakage current due to the stress of the nitride film.

Another object of the present invention is to provide a method of manufacturing the semiconductor device.

1 is a cross-sectional view illustrating a conventional method for manufacturing a semiconductor device.

2A to 2E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a first embodiment of the present invention.

3A to 3E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a second embodiment of the present invention.

※ Explanation of codes for main parts of drawing

100, 200, 300: semiconductor substrate

110, 210, 310: gate insulating film

120, 220, 320: polysilicon film

130, 230, 330: tungsten film

140, 240, 340: insulating film

150, 180, 250, 270, 280, 350, 370, 390: oxide film

160, 170, 190, 260, 290, 360, 380, 400: nitride film

C: Cell area

P: peripheral area

G1, G2: Gate

In order to achieve the object of the present invention, a semiconductor device according to the present invention comprises a gate insulating film, a gate of a polysilicon film and a tungsten film stacked, the semiconductor substrate of the cell region in which the insulating film is sequentially stacked; And an insulating film and a spacer formed on the side of the gate and the substrate surface, wherein the spacer has a structure in which a first oxide film, a first nitride film, a second oxide film, and a second nitride film are sequentially stacked.

Here, the second nitride film has a thinner thickness on the surface of the substrate than the side portions of the gate and the insulating film.

In addition, in order to achieve another object of the present invention, the method of manufacturing a semiconductor device according to the first embodiment of the present invention sequentially the gate insulating film, the gate in which the polysilicon film and tungsten film is laminated in the cell region of the semiconductor substrate, and the insulating film Forming to; Selectively forming a first oxide film on the side of the polysilicon film and the substrate surface; Forming a first nitride film on the entire surface of the substrate on which the first oxide film is formed; Forming a second oxide film on the first nitride film; Forming a spacer by forming a second nitride film on the second oxide film; And removing the insulating film and the second nitride film on the substrate by a predetermined thickness.

In addition, the semiconductor device manufacturing method according to the second embodiment of the present invention comprises the steps of sequentially forming a gate insulating film, a gate in which a polysilicon film and a tungsten film is laminated, and an insulating film in the cell region of the semiconductor substrate; Selectively forming a first oxide film on the side of the polysilicon film and the substrate surface; Forming a first nitride film only on a side of the gate and the insulating film on which the first oxide film is formed; Forming a second oxide film on the substrate on which the first nitride film is formed; And forming a spacer by forming a second nitride film on the second oxide film.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

First, referring to the semiconductor device according to the present invention, as shown in FIGS. 2E and 3E, the gate spacers S2 of the cell region C may include the oxide films 250 and 350, the nitride films 260 and 360, and the oxide film ( 280 and 380 and nitride films 290B and 380 are stacked in this order.

Here, the oxide films 250 and 350 are formed on the sidewalls of the polysilicon films 220 and 320 of the gate G1 and the substrate surface. In addition, the nitride films 260 and 360 prevent blow-up of the tungsten films 230 and 330 according to a subsequent heat treatment process, and the oxide films 280 and 380 serve as buffers for the nitride films 290B and 380. 290B and 380 serve as an etch stop layer in subsequent processing for contact formation.

In this case, as illustrated in FIG. 2E, a nitride film 260 is formed on the gate G1 and the insulating layer 240 and on the surface of the substrate 200, and the nitride film 290B is formed on the gate G1 and the insulating film 240. By forming a thinner thickness on the upper surface of the substrate 200 than the side portion, it is possible to minimize the stress caused by the nitride film.

Alternatively, as shown in FIG. 3E, the nitride film 360 is formed only at the sides of the gate G1 and the insulating film 340, the nitride film 380 is formed to have a uniform thickness, and the nitride film is formed on the nitride film 380. 400 may be further formed.

That is, in the present invention, the oxide films 250, 350, 280, which act as a buffer film between the substrates 200, 300 and the nitride films 260, 360, as well as between the nitride films 260, 360, and the nitride films 290B, 380. By interposing the respective 370, the stress applied to the substrate due to the nitride film can be sufficiently alleviated, so that the junction leakage current can be reduced.

In addition, the reduced junction leakage current may improve the refresh characteristics of a memory device such as a DARM.

In addition, the mobility of the electrons increases and decreases due to the relaxed stress, so that the current characteristics of the device are not only improved, but also the interface defects are reduced, thereby improving the hot carrier characteristics, thereby improving the characteristics of the device.

Next, a method of manufacturing a semiconductor device according to an embodiment of the present invention will be described.

2A through 2E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a first embodiment of the present invention.

Referring to FIG. 2A, a gate insulating layer 210 is formed on a semiconductor substrate 200 in which a cell region C and a peripheral region P are defined, and a polysilicon layer 220 and tungsten as a gate material thereon. The film 230 is formed sequentially. Thereafter, an insulating film 240 for a hard mask is formed on the tungsten film 230, and the tungsten film 230 and the polysilicon film 220 are etched using the insulating film 240 as a mask to form the cell region C. Gates G1 and G2 are formed in the and peripheral regions P, respectively.

Referring to FIG. 2B, a first oxide film 250 is formed on the surface of the semiconductor substrate 200 and the sidewalls of the polysilicon film 220 by a selective oxidation process, and the tungsten film 230 generated due to oxidation during the subsequent heat treatment process. In order to prevent blow-up of the Ns), the first nitride layer 260 is formed on the surface of the substrate on which the first oxide layer 250 is formed. Preferably, the first nitride film 260 is formed to a thickness of 50 to 100 GPa. Thereafter, impurity ions are implanted into the substrate 200 on both sides of the gates G1 and G2 to form a source and a drain (not shown), and a second oxide film 270 is formed on the entire surface of the substrate. Preferably, the second oxide film 270 is formed to a thickness of 500 to 900 GPa.

Referring to FIG. 2C, a first mask pattern (not shown) for exposing the peripheral region P and masking the cell region C may be formed by a photolithography process, and the second oxide layer may be formed in the exposed peripheral region P. 270, the first nitride film 260, and the first oxide film 250 are blanket-etched to expose the surface of the substrate 200 to form a spacer S1, and then the first mask is known. Remove the pattern. Then, a second mask pattern (not shown) for exposing the cell region C and masking the peripheral region C is formed by a photolithography process, and the second oxide film 270 of the exposed cell region P is formed. After removal by wet etching to expose the surface of the first nitride film 260, the second mask pattern is removed by a known method.

Referring to FIG. 2D, a third oxide film 280 acting as a buffer film on the structure of FIG. 2C is formed to a thickness of 50 to 100 GPa, and a second nitride film 290A to a thickness A of 250 to 350 GPa thereon. ). Next, as shown in FIG. 2E, by etching the blanket, the insulating layer 240 and the second nitride layer 290B on the substrate 200 are partially etched to have a thickness B of 100 to 150 Å thinner than the thickness of A. The spacer S2 is formed.

Subsequently, although not shown, an insulating film is formed over the entire surface of the substrate, and the insulating film is etched using the second nitride film 290B as an etch stop layer to form a contact hole for exposing the source and drain. Proceed.

3A to 3E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a second embodiment of the present invention, and the same reference numerals are given to the same components as those of the first embodiment in FIGS. 3A to 3E.

Referring to FIG. 3A, a gate insulating layer 310 is formed on a semiconductor substrate 300 in which a cell region C and a peripheral region P are defined, and a polysilicon layer 320 and tungsten as a gate material thereon. The film 330 is formed sequentially. Thereafter, an insulating film 340 for a hard mask is formed on the tungsten film 330, and the tungsten film 330 and the polysilicon film 320 are etched using the insulating film 340 as a mask to form the cell region C. Gates G1 and G2 are formed in the and peripheral regions P, respectively.

Referring to FIG. 3B, a first oxide film 350 is formed on the surface of the semiconductor substrate 300 and the sidewalls of the polysilicon film 320 by a selective oxidation process, and a tungsten film 330 generated due to oxidation in a subsequent heat treatment process. In order to prevent blow-up of the Ns), the first nitride layer 360 is formed on the surface of the substrate on which the first oxide layer 350 is formed. Thereafter, the first nitride film 360 is etched back such that the first nitride film 360 remains only on the sidewalls of the gates G1 and G2, and then impurity ions are implanted into the substrate 300 on both sides of the gates G1 and G2. Source and drain (not shown) are formed.

Thereafter, as shown in FIG. 3C, the second oxide film 370, the second nitride film 380, and the third oxide film 390 are sequentially formed on the structure of FIG. 3B. Thereafter, a first mask pattern (not shown) for exposing the peripheral region P and masking the cell region C is formed by a photolithography process, and the third oxide layer 390 of the exposed peripheral region P is formed. After the second nitride film 380, the second oxide film 370, and the first oxide film 350 are blanket-etched to expose the surface of the substrate 300, a spacer S1 is formed, and the spacer S1 is known. The first mask pattern is removed.

Referring to FIG. 3D, a second mask pattern (not shown) that exposes the cell region C and masks the peripheral region C is formed by a photolithography process, and a third oxide film (not shown) of the exposed cell region P is formed. 390 (see FIG. 3C) is removed by wet etching to expose the surface of the second nitride film 380, and then the spacer S1 is formed by removing the second mask pattern by a known method.

3E, a third nitride film 400 is formed as an etch stop layer on the structure of FIG. 3D. Subsequently, although not shown, an insulating film is formed over the entire surface of the substrate, and a contact hole for exposing the source and drain is formed by etching the insulating film by using the third nitride film 400 as an etch stop layer. Proceed.

According to the present invention described above, the junction leakage current can be reduced by sufficiently relieving the stress applied to the substrate due to the nitride film by interposing an oxide film acting as a buffer film between the substrate and the nitride film.

In addition, the reduced junction leakage current improves the refresh characteristics of a memory device such as a DARM.

In addition, the mobility of electrons increases and decreases due to the relaxed stress, thereby improving the current characteristics of the device, and also improving the hot carrier characteristics by reducing interface defects, thereby improving the device characteristics.

In addition, the fail rate of the device is reduced by the reduction of such interface defects and the like, thereby improving the productivity of the device.

In addition, this invention is not limited to the said Example, It can implement in a various deformation | transformation in the range which does not deviate from the technical summary of this invention.

Claims (10)

A semiconductor substrate in a cell region in which a gate insulating film, a gate in which a polysilicon film and a tungsten film are stacked, and an insulating film are sequentially stacked; And A spacer formed on a side surface of the insulating layer and the gate and a substrate surface; And the spacer has a structure in which a first oxide film, a first nitride film, a second oxide film, and a second nitride film are sequentially stacked. The method of claim 1, And the second nitride film has a thickness thinner on the surface of the substrate than on the sides of the gate and the insulating film. The method according to claim 1 or 2, And the second nitride film has a thickness of 100 to 150 GPa on the surface of the substrate. The semiconductor device according to claim 1, wherein the first nitride film is formed only at sides of the gate and the insulating film. Sequentially forming a gate insulating film, a gate in which a polysilicon film and a tungsten film are stacked, and an insulating film in a cell region of the semiconductor substrate; Selectively forming a first oxide film on sides of the polysilicon film and on the substrate surface; Forming a first nitride film over an entire surface of the substrate on which the first oxide film is formed; Forming a second oxide film on the first nitride film; And Forming a spacer by forming a second nitride film on the second oxide film. The method of claim 5, And removing the insulating film and the second nitride film over the substrate by a predetermined thickness. The method according to claim 5 or 6, The second nitride film is a semiconductor device manufacturing method, characterized in that formed in a thickness of 250 to 350 내지. The method of claim 7, wherein The removing of the second nitride film is performed such that the thickness of the second nitride film is 100 to 150 kPa. Sequentially forming a gate insulating film, a gate in which a polysilicon film and a tungsten film are stacked, and an insulating film in a cell region of the semiconductor substrate; Selectively forming a first oxide film on sides of the polysilicon film and on the substrate surface; Forming a first nitride film only on sides of the gate and the insulating film on which the first oxide film is formed; Forming a second oxide film on the substrate on which the first nitride film is formed; And Forming a spacer by forming a second nitride film on the second oxide film. The method of claim 9, A method of manufacturing a semiconductor device, further comprising the step of forming a third nitride film on the second nitride film.