KR20020049956A - Table Device For Loading The Semiconductor Package - Google Patents

Table Device For Loading The Semiconductor Package Download PDF

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Publication number
KR20020049956A
KR20020049956A KR1020000079284A KR20000079284A KR20020049956A KR 20020049956 A KR20020049956 A KR 20020049956A KR 1020000079284 A KR1020000079284 A KR 1020000079284A KR 20000079284 A KR20000079284 A KR 20000079284A KR 20020049956 A KR20020049956 A KR 20020049956A
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KR
South Korea
Prior art keywords
semiconductor package
loading
vacuum
transfer means
semiconductor
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KR1020000079284A
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Korean (ko)
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KR100396982B1 (en
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나익균
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곽 노 권
주식회사 한미
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First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=27683900&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=KR20020049956(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by 곽 노 권, 주식회사 한미 filed Critical 곽 노 권
Priority to KR10-2000-0079284A priority Critical patent/KR100396982B1/en
Priority to GB0107260A priority patent/GB2370411B/en
Priority to CNB011095148A priority patent/CN1208824C/en
Priority to IT2001TO000347A priority patent/ITTO20010347A1/en
Priority to US09/834,557 priority patent/US6446354B1/en
Priority to SG200102266A priority patent/SG98444A1/en
Priority to SG200503722A priority patent/SG129308A1/en
Priority to JP2001129146A priority patent/JP3699661B2/en
Priority to TW090112356A priority patent/TW495866B/en
Publication of KR20020049956A publication Critical patent/KR20020049956A/en
Priority to HK03100353.8A priority patent/HK1048196B/en
Publication of KR100396982B1 publication Critical patent/KR100396982B1/en
Application granted granted Critical
Priority to HK06112371A priority patent/HK1091947A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67721Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips, lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0756Stacked arrangements of devices

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PURPOSE: A table for loading a semiconductor package is provided to make the semiconductor package settled in a loading groove without an error, by sawing a plurality of semiconductor packages and by loading settling cleaned and dried semiconductor packages in the first and second loading units of a loading table having a guide inclined unit. CONSTITUTION: The first and second loading units in which the plurality of semiconductor packages vacuum-absorbed to a horizontal transfer unit are settled at regular intervals are respectively formed on the upper surface of a semiconductor package loading table(201). A plurality of vacuum pipes supplies high pressure vacuum, connected to the lower surface of the semiconductor package loading table. A transfer unit supports the lower surface of the semiconductor package loading table. A nut member is formed in the lower portion of the transfer unit. A screw axis horizontally transfers the transfer unit to a predetermined position, coupled to the nut member. A loading table guiding member guides the transfer of the transfer unit which moves along the screw axis.

Description

반도체패키지 적재 테이블장치{Table Device For Loading The Semiconductor Package}Table Device For Loading The Semiconductor Package

본 발명은 반도체 패키지장치를 절단하여 적재하는 테이블장치에 관한 것으로, 특히, 반도체 전 공정에서 제조된 다수의 반도체 패키지를 쏘잉 머신(Sawing Machine) 등의 절단장치를 통하여 낱개로 절단한 후, 클리닝 및 건조한 반도체패키를 제1,제2적재부를 갖는 적재테이블에 안치시키므로 반도체 패키지를 적재홈에 에러 없이 정확하게 안치시키도록 하는 반도체 패키지 적재테이블장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a table device for cutting and loading a semiconductor package device. In particular, a plurality of semiconductor packages manufactured in the entire semiconductor process are cut individually through a cutting device such as a sawing machine, and then cleaned and The present invention relates to a semiconductor package loading table apparatus for placing a dry semiconductor package on a loading table having first and second loading portions to accurately place a semiconductor package in a loading groove without errors.

일반적으로, 반도체 패키지 장치는 실리콘으로 된 반도체기판 상에 트랜지스터 및 커패시터등과 같은 고집적회로가 형성된 반도체칩(Chip)을 붙인 후에 반도체기판의 상면에 레진수지로 몰딩한 후, 기판의 하면에 리드프레임의 역할을 하는 솔더볼(BGA; Ball Grid Array)을 접착시켜 칩과 통전을 하도록 만든 반도체 패키지를 쏘잉머신을 통하여 낱개로 절단(싱귤레이션 작업 이라함)하도록 한다.In general, a semiconductor package device attaches a semiconductor chip having a high integrated circuit such as a transistor and a capacitor to a semiconductor substrate made of silicon, molds the resin on the upper surface of the semiconductor substrate, and then forms a lead frame on the lower surface of the substrate. By bonding a ball grid array (BGA), which plays the role of a solder ball, a semiconductor package made to conduct electricity with a chip is individually cut through a sawing machine (called a singulation operation).

이와 같이, 반도체 패키지를 절단한 후에 표면에 묻은 이물질을 제거하기 위하여 클리닝 및 드라이 작업을 거쳐서 반도체 패키지를 트레이에 적재하기 위하여 임시로 제품을 적재 하거나 이송하도록 하는 반도체패키지 적재이송장치가 사용된다.As described above, a semiconductor package loading and transferring device is used to temporarily load or transfer a product in order to remove the foreign matter on the surface after cutting the semiconductor package and to load the semiconductor package onto the tray through cleaning and drying operations.

상기 반도체패키지 적재이송장치에는 반도체가 적재되는 적재테이블이 사용되고, 이 적재테이블에는 반도체 패키지를 적재하도록 하는 요홈이 반도체패키지수만큼 형성된 적재판이 구비되어진다. 그리고, 상기 적재판의 저면에는 진공홈을 구비한 보조적재판이 형성되어진다.In the semiconductor package loading and transporting apparatus, a loading table on which a semiconductor is loaded is used, and the loading table is provided with a loading plate on which grooves for loading a semiconductor package are formed by a semiconductor package index. In addition, an auxiliary loading plate having a vacuum groove is formed on the bottom of the loading plate.

상기 반도체 패키지를 낱개로 절단하는 쏘잉머신은 절단날의 두께가 0.1㎜정도 되기 때문에 반도체패키지를 절단한 후에 반도체 패키지와 다른 반도체 패키지키지 사이의 거리가 0.1㎜정도가 된다.Since the sawing machine for cutting the semiconductor package individually has a thickness of about 0.1 mm, the distance between the semiconductor package and another semiconductor package package is about 0.1 mm after cutting the semiconductor package.

그런데, 종래에는 상기 다수의 반도체패키지 들은 한 번에 반도체패키지 이송장치의 진공흡착수단을 집어서 적재테이블의 적재홈에 안착시키게 되는 데, 이 적재홈에는 0.05㎜의 가이드 경사부가 형성되어지고, 이것을 각도로 환산하면 경사각은 1°이하가 된다.However, in the related art, the plurality of semiconductor packages pick up the vacuum suction means of the semiconductor package transfer device at one time and settle them in the loading grooves of the loading table. The loading grooves are formed with a guide inclination of 0.05 mm. In terms of angle, the inclination angle is 1 ° or less.

그러므로, 절단된 반도체 패키지를 적재테이블의 적재홈에 정확하게 안치시키기가 어려워서 자주 에러(Error)가 발생할 뿐만아니라 적재테이블의 적재홈의 가이드경사부를 정확하게 가공하기 어려운 문제점을 지닌다.Therefore, it is difficult to accurately place the cut semiconductor package in the loading groove of the loading table, so that an error occurs frequently and it is difficult to accurately process the guide inclined portion of the loading groove of the loading table.

본 발명은 이러한 점을 감안하여 안출한 것으로서, 반도체 전 공정에서 제조된 다수의 반도체 패키지를 쏘잉 머신(Sawing Machine) 등의 절단장치를 통하여 낱개로 절단한 후, 클리닝 및 건조한 반도체패키지를 제1,제2적재부를 갖는 적재테이블에 안치시키므로 반도체 패키지를 적재홈에 에러 없이 정확하게 안치시키도록 하는 것이 목적이다.The present invention has been made in view of this point, and after cutting a plurality of semiconductor packages manufactured in the entire semiconductor process through a cutting device such as a sawing machine (Sawing Machine) individually, cleaning and drying the semiconductor package 1, It is an object to place a semiconductor package correctly and without error in a loading groove because it is settled in the loading table which has a 2nd loading part.

도 1은 본 발명의 반도체 패키지 적재테이블 장치의 구성을 보인 도면으로써,1 is a view showing the configuration of a semiconductor package stacking table device of the present invention,

(a)는 평면도이고, (b)는 측면도이다.(a) is a top view, (b) is a side view.

도 2는 본 발명의 반도체패키지 적재테이블을 보인 도면으로써,2 is a view showing a semiconductor package loading table of the present invention,

(a)는 적재판의 평면도이고, (b)는 적재판의 단면도이고,(a) is a plan view of the loading plate, (b) is a sectional view of the loading plate,

(c)는 보조판의 평면도이다.(c) is a top view of an auxiliary plate.

도 3은 본 발명의 반도체 패키지 적재테이블의 요부를 상세하게 보인 도면으로써,3 is a view showing in detail the main portion of the semiconductor package mounting table of the present invention,

(a)는 평면도이고, (b)는 단면도이다.(a) is a top view, (b) is sectional drawing.

도 4는 본 발명의 반도체 패키지 이송수단을 보인 도면으로써4 is a view showing a semiconductor package transfer means of the present invention;

(a)는 평면도이고, (b)는 측면도이다.(a) is a top view, (b) is a side view.

도 5는 본 발명의 반도체패키지 이송수단의 진공블럭을 보인 저면도로써,5 is a bottom view showing a vacuum block of the semiconductor package transfer means of the present invention,

(a)는 반도체패키지 적재테이블의 제1적재부에 반도체 패키지를 적재하기 위한 상태를 보인 도면이고,(a) is a view showing a state for loading a semiconductor package in the first loading portion of the semiconductor package loading table,

(b)는 반도체패키지 적재테이블의 제2적재부에 반도체 패키지를 적재하기 위한 상태를 보인 도면이다.(b) shows the state for loading a semiconductor package in the 2nd loading part of a semiconductor package loading table.

도 6은 본 발명의 사용 상태를 다른 구성과 개략적으로 보인 도면이다.6 is a view schematically showing another use configuration of the present invention.

-도면의 주요부분에 대한 부호의 설명-Explanation of symbols on the main parts of the drawing

100 : 드라이장치 200 : 적재이송수단100: dry device 200: loading transfer means

201 : 반도체패키지 적재테이블201: semiconductor package loading table

202 : 적재테이블 안내부재202: loading table guide member

203 : 나사축 206 : 너트부재203: screw shaft 206: nut member

210 : 적재판 211,212 : 적재부210: loading plate 211, 212: loading portion

213 : 볼도피홈 213a : 여유공간부213: Ball Dodgeway 213a: Free Space

214 : 진공통로 215 : 가이드경사부214: vacuum passage 215: guide slope

216 : 체결볼트 220 : 보조판216: fastening bolt 220: auxiliary plate

221 : 진공홈 222 : 진공구멍221: vacuum groove 222: vacuum hole

300 : 반도체패키지 이송수단300: semiconductor package transfer means

310 : 수평이송수단 320 : 수직이송수단310: horizontal transfer means 320: vertical transfer means

330 : 진공흡착수단 331 : 진공블럭330: vacuum suction means 331: vacuum block

332 : 진공통로 333 : 진공흡착패드332: vacuum passage 333: vacuum adsorption pad

334 : 솔더볼도피홈 501 : 양품트레이적재부334: solder ball escape groove 501: good quality tray loading

502 : 불량품트레이적재부502: defective goods tray loading

이러한 목적은, 반도체칩이 형성된 스트립을 절단장치에서 각각의 반도체패키지로 절단하여 진공으로 흡착하여 이송하는 반도체 패키지 이송수단과; 상기 반도체패키지 이송수단에 흡착된 반도체 패키지를 적재하는 적재이송수단과; 상기 적재이송수단에 적재된 반도체패키지를 잡아서 검사장치로 이송하는 제품선별이송수단과; 상기 제품선별이송수단에 양품과 불량품으로 구별된 반도체 패키지를 구별하여 적재하는 양품트레이적재부 및 불량품트레이적재부로 구성된 반도체 패키지 핸들러장치에 있어서, 상기 적재이송수단은, 상기 수평이송수단에 진공 흡착된 다수의 반도체패키지가 일정간격으로 안치되는 제1,제2적재부를 상부면에 각각 형성하는 반도체패키지 적재테이블과; 상기 반도체패키지 적재테이블의 저면으로 연결되어서 고압의 진공을 가하는 복수개의 진공파이프와; 상기 반도체패키지 적재테이블을 저면에서 지지하고 하부에 너트부재를 갖는 이송부와; 상기 너트부재에 체결되어서 수평으로 상기 이송부를 소정의 위치로 이송시키는 나사축과; 상기 나사축을 따라서 이동하는 상기 이송부의 이동을 안내하는 적재테이블 안내부재로 구성된 반도체 패키지 적재테이블 적재장치를 제공함으로써 달성된다.This object includes a semiconductor package transfer means for cutting a strip having a semiconductor chip formed thereon into a semiconductor package in a cutting device, and absorbing and transporting the same by vacuum; Stack transfer means for stacking a semiconductor package adsorbed to the semiconductor package transfer means; A product selection transfer means for catching and transferring the semiconductor package loaded in the load transfer means to an inspection apparatus; A semiconductor package handler device comprising a good quality tray loading portion and a bad quality tray loading portion for discriminating and loading semiconductor packages classified as good or bad from the product selection transferring means, wherein the load transferring means is vacuum-adsorbed by the horizontal transfer means. A semiconductor package stacking table for forming a first and a second stacking portion in which a plurality of semiconductor packages are placed at predetermined intervals, respectively, on an upper surface thereof; A plurality of vacuum pipes connected to the bottom of the semiconductor package loading table to apply a high pressure vacuum; A transfer part supporting the semiconductor package loading table at a bottom thereof and having a nut member at a bottom thereof; A screw shaft which is fastened to the nut member and horizontally conveys the conveying part to a predetermined position; It is achieved by providing a semiconductor package stacking table stacking device composed of a stacking table guide member for guiding movement of the conveying unit moving along the screw shaft.

이하, 첨부한 도면에 의거하여 본 발명의 구성에 대하여 상세히 설명한다.EMBODIMENT OF THE INVENTION Hereinafter, the structure of this invention is demonstrated in detail based on an accompanying drawing.

도 1은 본 발명의 반도체 패키지 적재테이블 장치의 구성을 보인 도면이고, 도 2는 본 발명의 반도체패키지 적재테이블을 보인 도면이며, 도 3은 본 발명의 반도체 패키지 적재테이블의 요부를 상세하게 보인 도면이며, 도 4는 본 발명의 반도체 패키지 이송수단을 보인 도면이고, 도 5는 본 발명의 반도체패키지 이송수단의진공블럭을 보인 저면도이고, 도 6은 본 발명의 사용 상태를 다른 구성과 개략적으로 보인 도면이다.1 is a view showing the configuration of a semiconductor package stacking table apparatus of the present invention, Figure 2 is a view showing a semiconductor package stacking table of the present invention, Figure 3 is a view showing the main portion of the semiconductor package stacking table of the present invention in detail 4 is a view showing a semiconductor package transfer means of the present invention, FIG. 5 is a bottom view showing a vacuum block of the semiconductor package transfer means of the present invention, and FIG. The figure shown.

우선, 본 발명의 구성을 살펴 보면, 반도체칩이 형성된 스트립(A)을 절단장치에서 각각의 반도체패키지(1)로 절단하여 진공으로 흡착하여 이송하는 반도체 패키지 이송수단(300)과; 상기 반도체패키지 이송수단(300)에 흡착된 반도체 패키지를 적재하는 적재이송수단(200)과; 상기 적재이송수단(200)에 적재된 반도체패키지(1)를 잡아서 검사장치로 이송하는 제품선별이송수단(400)과; 상기 제품선별이송수단(400)에 양품과 불량품으로 구별된 반도체 패키지(1)를 구별하여 적재하는 양품트레이적재부(501) 및 불량품트레이적재부(502)로 구성된 반도체 패키지 핸들러장치에 있어서, 상기 적재이송수단(200)은, 상기 수평이송수단(300)에 진공 흡착된 다수의 반도체패키지(1)가 일정간격으로 안치되는 제1,제2적재부(211)(212)를 상부면에 각각 형성하는 반도체패키지 적재테이블(201)과; 상기 반도체패키지 적재테이블(201)의 저면으로 연결되어서 고압의 진공을 가하는 복수개의 진공파이프(230)와; 상기 반도체패키지 적재테이블(201)을 저면에서 지지하고 하부에 너트부재(206)를 갖는 이송부(205)와; 상기 너트부재(206)에 체결되어서 수평으로 상기 이송부(205)를 소정의 위치로 이송시키는 나사축(203)과; 상기 나사축(203)을 따라서 이동하는 상기 이송부(205)의 이동을 안내하는 적재테이블 안내부재(202)로 구성된다.First, looking at the configuration of the present invention, the semiconductor package transfer means 300 for cutting the strip (A) on which the semiconductor chip is formed with each semiconductor package (1) in the cutting device to suck and transport by vacuum; A load transfer means (200) for loading the semiconductor package adsorbed on the semiconductor package transfer means (300); A product selection transfer means (400) for catching and transferring the semiconductor package (1) loaded on the load transfer means (200) to an inspection apparatus; In the semiconductor package handler device comprising a non-defective tray loading unit 501 and a defective tray loading unit 502 for distinguishing and loading the semiconductor package 1 distinguished between good and defective products in the product selection and transfer means 400, Loading transfer means 200, the first and second loading portion 211, 212, each of which a plurality of semiconductor packages (1) vacuum-adsorbed by the horizontal transfer means 300 is placed at a predetermined interval, respectively, on the upper surface A semiconductor package stacking table 201 which is formed; A plurality of vacuum pipes 230 connected to the bottom of the semiconductor package loading table 201 to apply a high pressure vacuum; A transfer part 205 supporting the semiconductor package loading table 201 at a bottom thereof and having a nut member 206 at a bottom thereof; A screw shaft (203) fastened to the nut member (206) to horizontally transfer the conveying portion (205) to a predetermined position; It consists of a loading table guide member 202 for guiding the movement of the transfer unit 205 moving along the screw shaft 203.

그리고, 도 2(a)(b)(c)에 도시된 바와 같이, 상기 반도체패키지 적재테이블(201)은, 상기 반도체 패키지(1)가 안치되는 적재홈(211)과 적재되지 않는 여유공간부(213a)가 각각 교차하여 형성되는 제1,제2적재부(211)(212)를 구비하는 적재판(210)과; 상기 적재판(210)의 저면에 다수의 체결볼트(216)에 의하여 체결 고정되어 상기 진공파이프(230)로 부터 공급되는 진공을 안내하는 진공구멍(222)이 형성된 보조판(220)을 포함하여 이루어진다.As shown in FIGS. 2A, 2B, and 2C, the semiconductor package loading table 201 includes a loading groove 211 in which the semiconductor package 1 is placed and a free space portion not loaded. A stacking plate 210 having first and second stacking portions 211 and 212 formed by crossing 213a, respectively; It comprises a sub-plate 220 is fastened and fixed by a plurality of fastening bolts 216 on the bottom surface of the mounting plate 210 is formed with a vacuum hole 222 for guiding the vacuum supplied from the vacuum pipe 230 .

그리고, 도 3(a)(b)에 도시된 바와 같이, 상기 제1,제2적재부(211)(212)의 적재홈(213)의 중심부분에는 에어가 이동하는 진공통로(214)가 형성되고, 이 적재홈(213)의 가장자리에는 반도체패키지(1)의 안착을 안내하는 가이드경사부(215)가 형성된다.3 (a) and 3 (b), a vacuum passage 214 through which air moves is provided at a central portion of the loading groove 213 of the first and second loading parts 211 and 212. The guide inclined portion 215 is formed at the edge of the loading groove 213 to guide the mounting of the semiconductor package 1.

한편, 상기 가이드경사부(215)는 네 개의 면에 모두 형성되고, 경사각도는, 20 ∼ 40 °인 것이 바람직 하다.On the other hand, the guide inclined portion 215 is formed on all four surfaces, the inclination angle is preferably 20 to 40 °.

상기 적재판(210)과 보조판(210)을 체결하는 체결볼트(216) 대신에 체결나사를 사용할 수도 있다.Fastening screws may be used instead of the fastening bolts 216 for fastening the loading plate 210 and the auxiliary plate 210.

이하, 본 발명의 작용을 상세하게 살펴보도록 한다.Hereinafter, the operation of the present invention will be described in detail.

먼저, 본 발명에 따른 반도체 패키지장치 적재테이블 장치의 사용 상태를 살펴 보게 되면, 도 6에 도시된 바와 같이, 절단장치(미도시)에서 싱귤레이션이 완성된 반도체패키지(1)는 클리닝장치(미도시)에서 클리닝된 후에 드라이장치(100)에서 건조 되어진다.First, referring to the state of use of the semiconductor package apparatus loading table apparatus according to the present invention, as shown in FIG. 6, the semiconductor package 1 in which the singulation is completed in the cutting apparatus (not shown) is a cleaning apparatus (not illustrated). After drying in the drying apparatus 100.

그리고, 상기 드라이장치(100)에서 건조가 완료 되어지면, 반도체패키지 이송수단(300)의 수평이송수단(310)과 수직이송수단(320)에 의하여 수평과 수직으로 이송하는 진공흡착수단(330)에 의하여 싱귤레이션(Singulation)이 완료된 반도체패키지(1)는 흡착되어진다.Then, when drying is completed in the dry apparatus 100, the vacuum adsorption means 330 to transfer horizontally and vertically by the horizontal transfer means 310 and the vertical transfer means 320 of the semiconductor package transfer means 300. As a result, the semiconductor package 1 having completed singulation is adsorbed.

상기 수직이송수단(32)의 저면에는 진공흡착수단(330)이 설치되어져 있으며, 이 진공흡착수단(330)은, 진공블럭(331)이 부착되어져 있으며, 이 진공블럭(331)의 저면에는 진공흡착패드(333)가 흡착되어져 있다.A vacuum suction means 330 is provided on the bottom of the vertical transfer means 32. The vacuum suction means 330 has a vacuum block 331 attached thereto, and a vacuum is provided on the bottom of the vacuum block 331. The suction pad 333 is adsorbed.

상기 진공흡착패드(333)가 반도체 패키지(1)를 부착하여 잡을 때, 상기 솔더볼(2)의 간섭을 피하도록 볼도피홈(334)이 형성되어져 있고, 이 볼도피홈(334)의 중앙에는 진공통로(332)를 형성하여서 반도체패키지(1)를 흡착할 때, 진공이 공급 되어 흡착한다.When the vacuum adsorption pad 333 attaches and grips the semiconductor package 1, a ball escape groove 334 is formed to avoid interference of the solder ball 2, and in the center of the ball escape groove 334. When the vacuum passage 332 is formed to adsorb the semiconductor package 1, a vacuum is supplied and adsorbed.

이와 같이, 상기 반도체패키지 이송수단(300)의 진공흡착패드(333)에 반도체패키지(1)를 흡착시킨 후에 소정의 위치에 있는 적재이송수단(200)으로 이동하도록 한다.As described above, the semiconductor package 1 is absorbed by the vacuum adsorption pad 333 of the semiconductor package transfer means 300 and then moved to the loading transfer means 200 at a predetermined position.

그리고, 상기 진공흡착패드(333)에 흡착된 반도체패키지(1)에 진공을 해제하여서 반도체패키지 적재테이블(201)의 제1적재부(211)의 적재홈(213)에 진공을 가하여 반도체패키지(1)를 흡착하여 고정하도록 한다.Then, the vacuum is released to the semiconductor package 1 adsorbed on the vacuum adsorption pad 333 to apply a vacuum to the loading groove 213 of the first loading portion 211 of the semiconductor package loading table 201 to provide a semiconductor package ( 1) is fixed by adsorption.

그리고, 상기 제1적재부(211)에서 반도체페키지(1)를 흡착한 후에는 상기 반도체패키지 이송수단(300)의 수평이송수단(310)을 수평으로 이동하여서 상기 제2적재부(212)에 진공흡착패드(333)를 위치시키도록 한다.After the semiconductor package 1 is adsorbed by the first loading unit 211, the horizontal transfer unit 310 of the semiconductor package transferring unit 300 is moved horizontally to the second loading unit 212. Position the vacuum adsorption pad 333.

그리고, 상기 진공흡착패드(333)에 진공을 해제하여 반도체패키지(1)가 반도체패키지 적재테이블(201)의 제2적재부(212)의 적재홈(213)에 가하여진 진공에 의하여 흡착되도록 한다.Then, the vacuum is released to the vacuum adsorption pad 333 so that the semiconductor package 1 is adsorbed by the vacuum applied to the loading groove 213 of the second loading part 212 of the semiconductor package loading table 201. .

상기 제1,제2적재부(211)(212)에 가하여진 진공은, 진공파이프(230)를 통하여 진공구멍(222), 진공홈(221) 및 진공통로(214)로 가하여진 진공이 공급되어지게 된다.The vacuum applied to the first and second loading parts 211 and 212 is supplied with the vacuum applied to the vacuum hole 222, the vacuum groove 221, and the vacuum passage 214 through the vacuum pipe 230. Will be.

상기 반도체패키지(1)가 제1,제1적재홈(213)에 안착되어질 때, 상기 가이드경사부(215)가 반도체패키지(1)가 악간 어긋나게 안착되더라도 부드럽게 진입하도록 하는 역할을 하게 된다.When the semiconductor package 1 is seated in the first and first loading grooves 213, the guide inclined portion 215 serves to smoothly enter the semiconductor package 1 even when the semiconductor package 1 is misaligned.

그리고, 종래에 비하여 실제적으로 적재홈(213)의 최대폭이 커지는 효과가 있지만 이웃하는 부분에 여유공간부(213a)가 형성되어서 이웃하는 적재홈(213)이 서로 간섭하는 현상을 방지하게 된다.In addition, compared to the related art, the maximum width of the loading groove 213 is actually increased, but the free space portion 213a is formed in the neighboring portion to prevent the neighboring loading grooves 213 from interfering with each other.

이 것은 본 발명에서 제1,제2적재부(211)(212)가 반도체패키지(1)를 서로 어긋나게 각각 안착할 수 있는 구조를 가지므로 가능하다.This is possible because the first and second loading parts 211 and 212 have a structure in which the semiconductor packages 1 can be mounted to be shifted from each other.

상기 도 3(b)에서 보는 바와 같이, 상기 가이드경사부(215)의 경사각도(α)는 20 ∼ 40 °이므로 반도패키지(1)가 적재홈(213)에 부드럽게 안착하는 것이 가능하다.As shown in FIG. 3 (b), the inclination angle α of the guide inclined portion 215 is 20 to 40 °, so that the peninsula package 1 may be gently seated in the loading groove 213.

상기 적재홈(213)에 반도체패키지(1)가 안착되는 경우, 솔더볼(2)이 상측으로 돌출된 상태로 안착되고, 상기 반도체패키지(1)의 저면부분은 적재홈(213)에 약간 돌출된 부분인 접촉면부(217)에 접촉되면서 진공압력이 반도체 패키지(1)의 저면에 효과적으로 가하여지게 된다,When the semiconductor package 1 is seated in the loading groove 213, the solder ball 2 is seated in a state of protruding upward, and a bottom portion of the semiconductor package 1 slightly protrudes from the loading groove 213. The vacuum pressure is effectively applied to the bottom surface of the semiconductor package 1 while being in contact with the contact surface portion 217 which is a part.

이와 같은 상태에서, 상기 반도체패키지 적재테이블(201)에 안치된 반도체패키지(1)를 상기 제품선별이송수단(400)에서 집어서 비젼검사장치(미도시)에서 제품을 검사한 후에 양품은 양품 트레이적재부(501)에 불량은 불량품 적재트레이부(502)에 각각 안치하도록 한다.In such a state, after the semiconductor package 1 placed on the semiconductor package loading table 201 is picked up by the product selection transfer means 400 and the product is inspected by a vision inspection device (not shown), a good product is a good quality tray. The defects in the stacking portion 501 are settled in the defective stacking tray portion 502, respectively.

따라서, 상기한 바와 같이, 본 발명에 따른 반도체패키지 적재테이블 장치를 사용하게 되면, 반도체 전 공정에서 제조된 다수의 반도체 패키지를 쏘잉 머신(Sawing Machine) 등의 절단장치를 통하여 낱개로 절단한 후, 클리닝 및 건조한 반도체패키를 가이드경사부를 갖는 적재테이블의 제1,제2적재부에 각각 안치시키므로 반도체 패키지를 적재홈에 에러 없이 정확하게 안치시켜서 반도체패키지 공급 불량률을 현저하게 줄이도록 하는 매우 유용하고 효과적인 발명이다.Therefore, as described above, when using the semiconductor package loading table apparatus according to the present invention, after cutting a plurality of semiconductor packages manufactured in the entire semiconductor process individually through a cutting device such as a sawing machine (Sawing Machine), Very useful and effective invention to clean and dry the semiconductor package in the first and second loading parts of the loading table having the guide inclination, respectively, to accurately place the semiconductor package in the loading groove without error and to significantly reduce the failure rate of the semiconductor package supply. to be.

Claims (5)

반도체칩이 형성된 스트립을 절단장치에서 각각의 반도체패키지로 절단하여 진공으로 흡착하여 이송하는 반도체 패키지 이송수단과; 상기 반도체패키지 이송수단에 흡착된 반도체 패키지를 적재하는 적재이송수단과; 상기 적재이송수단에 적재된 반도체패키지를 잡아서 검사장치로 이송하는 제품선별이송수단과; 상기 제품선별이송수단에 양품과 불량품으로 구별된 반도체 패키지를 구별하여 적재하는 양품트레이적재부 및 불량품트레이적재부로 구성된 반도체 패키지 핸들러장치에 있어서,Semiconductor package transfer means for cutting the strips on which the semiconductor chips are formed into respective semiconductor packages in a cutting device, and absorbing and transporting them in a vacuum; Stack transfer means for stacking a semiconductor package adsorbed to the semiconductor package transfer means; A product selection transfer means for catching and transferring the semiconductor package loaded in the load transfer means to an inspection apparatus; In the semiconductor package handler device comprising a non-defective tray loading portion and a defective tray loading portion for discriminating and loading the semiconductor package distinguished between good and defective products in the product selection transfer means, 상기 적재이송수단은, 상기 수평이송수단에 진공 흡착된 다수의 반도체패키지가 일정간격으로 안치되는 제1,제2적재부를 상부면에 각각 형성하는 반도체패키지 적재테이블과;The stack transfer means may include a semiconductor package stacking table configured to form first and second stack portions on the upper surface of the semiconductor package, wherein the plurality of semiconductor packages vacuum-adsorbed to the horizontal transfer means are placed at predetermined intervals; 상기 반도체패키지 적재테이블 저면으로 연결되어서 고압의 진공을 가하는 복수개의 진공파이프와;A plurality of vacuum pipes connected to a bottom surface of the semiconductor package stacking table to apply a high pressure vacuum; 상기 반도체패키지 적재테이블을 저면에서 지지하고 하부에 너트부재를 갖는 이송부와;A transfer part supporting the semiconductor package loading table at a bottom thereof and having a nut member at a bottom thereof; 상기 너트부재에 체결되어서 수평으로 상기 이송부를 소정의 위치로 이송시키는 나사축과;A screw shaft which is fastened to the nut member and horizontally conveys the conveying part to a predetermined position; 상기 나서축을 따라서 이동하는 상기 이송부의 이동을 안내하는 적재테이블 안내부재로 구성된 것을 특징으로 하는 반도체 패키지 적재테이블 적재장치.And a stacking table guide member for guiding the movement of the conveying unit moving along the next axis. 제 1 항에 있어서, 상기 반도체패키지 적재테이블은, 상기 반도체 패키지가 안치되는 적재홈과 적재되지 않는 여유공간부가 각각 교차하여 형성되는 제1,제2적재부를 구비하는 적재판과; 상기 적재판의 저면에 다수의 체결볼트에 의하여 체결 고정되어 상기 진공파이프로 부터 공급되는 진공을 안내하는 진공구멍이 형성된 보조판을 포함하여 이루어진 것을 특징으로 하는 반도체패키지 적재테이블장치.The semiconductor package mounting table of claim 1, further comprising: a loading plate having first and second loading portions formed by crossing the loading grooves in which the semiconductor packages are placed and the free space portions not being loaded; And an auxiliary plate having a vacuum hole for guiding the vacuum supplied from the vacuum pipe by being fastened and fixed by a plurality of fastening bolts to the bottom of the loading plate. 제 1 항에 있어서, 상기 제1,제2적재부의 적재홈의 중심부분에는 에어가 이동하는 진공통로가 형성되고, 이 적재홈의 가장자리에는 반도체패키지의 안착을 안내하는 가이드경사부가 형성된 것을 특징으로 하는 반도체패키지 적재테이블장치.According to claim 1, wherein the vacuum passage through which air moves is formed in the central portion of the loading groove of the first and second loading portion, and the guide inclined portion for guiding the mounting of the semiconductor package is formed at the edge of the loading groove A semiconductor package loading table device. 제 3 항에 있어서, 상기 가이드경사부는 네 개의 면에 모두 형성되고, 경사각도는, 20 ∼ 40 °인 것을 특징으로 하는 반도체패키지 적재테이블장치.4. The semiconductor package stacking table device according to claim 3, wherein the guide slopes are formed on all four surfaces, and the inclination angle is 20 to 40 degrees. 제 3 항에 있어서, 상기 적재판과 보조판을 체결하는 체결볼트 대신에 체결나사를 사용하는 것을 특징으로 하는 반도체패키지 적재테이블장치.4. The semiconductor package loading table apparatus according to claim 3, wherein a fastening screw is used instead of a fastening bolt for fastening the mounting plate and the auxiliary plate.
KR10-2000-0079284A 2000-12-20 2000-12-20 Table Device For Loading The Semiconductor Package KR100396982B1 (en)

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Application Number Priority Date Filing Date Title
KR10-2000-0079284A KR100396982B1 (en) 2000-12-20 2000-12-20 Table Device For Loading The Semiconductor Package
GB0107260A GB2370411B (en) 2000-12-20 2001-03-22 Handler system for cutting a semiconductor package device
CNB011095148A CN1208824C (en) 2000-12-20 2001-03-29 Processing system for cutting semiconductor packing device
IT2001TO000347A ITTO20010347A1 (en) 2000-12-20 2001-04-11 MANIPULATOR SYSTEM TO CUT AN ENCLOSURE DEVICE FOR SEMICONDUCTORS.
US09/834,557 US6446354B1 (en) 2000-12-20 2001-04-13 Handler system for cutting a semiconductor package device
SG200503722A SG129308A1 (en) 2000-12-20 2001-04-20 Handler system for cutting a semiconductor packagedevice
SG200102266A SG98444A1 (en) 2000-12-20 2001-04-20 Handler system for cutting a semiconductor package device
JP2001129146A JP3699661B2 (en) 2000-12-20 2001-04-26 Handler system for cutting semiconductor package equipment
TW090112356A TW495866B (en) 2000-12-20 2001-05-23 Handler system for cutting a semiconductor package device
HK03100353.8A HK1048196B (en) 2000-12-20 2003-01-15 Handler system for cutting a semiconductor package device
HK06112371A HK1091947A1 (en) 2000-12-20 2006-11-10 Semiconductor package-loading table and semiconductor package handler comprising the same

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761310B1 (en) * 2006-02-01 2007-09-27 (주)테크윙 Sorting table apparatus for test handler
KR100814448B1 (en) * 2003-12-12 2008-03-17 한미반도체 주식회사 dry system of semiconductor package
KR100920934B1 (en) * 2007-07-10 2009-10-12 한미반도체 주식회사 Table for Seating Semiconductor Packages
KR102193675B1 (en) * 2019-07-10 2020-12-21 ㈜토니텍 Turntable for transporting semiconductor packages
KR102257072B1 (en) * 2020-01-31 2021-05-27 주식회사 포스텔 Processing method of stack board and stack board for semiconductor package settling

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101578599B1 (en) 2014-03-19 2015-12-17 세메스 주식회사 Table for receiving semiconductor devices

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0964067A (en) * 1995-08-29 1997-03-07 Rohm Co Ltd Supplying apparatus for semiconductor chip to work
KR100245552B1 (en) * 1997-06-09 2000-02-15 곽노권 A equipment for manufacturing a semiconductor of an off-loader
JPH11274202A (en) * 1998-03-24 1999-10-08 Fuji Xerox Co Ltd Bump forming device and chip tray used in bump formation
KR20000047308A (en) * 1998-12-31 2000-07-25 곽노권 Singularization of semiconductor package and loading system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100814448B1 (en) * 2003-12-12 2008-03-17 한미반도체 주식회사 dry system of semiconductor package
KR100761310B1 (en) * 2006-02-01 2007-09-27 (주)테크윙 Sorting table apparatus for test handler
KR100920934B1 (en) * 2007-07-10 2009-10-12 한미반도체 주식회사 Table for Seating Semiconductor Packages
KR102193675B1 (en) * 2019-07-10 2020-12-21 ㈜토니텍 Turntable for transporting semiconductor packages
KR102257072B1 (en) * 2020-01-31 2021-05-27 주식회사 포스텔 Processing method of stack board and stack board for semiconductor package settling

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