KR20020018610A - 집적 디바이스를 위한 이중 상감 콘택트 - Google Patents
집적 디바이스를 위한 이중 상감 콘택트 Download PDFInfo
- Publication number
- KR20020018610A KR20020018610A KR1020010053317A KR20010053317A KR20020018610A KR 20020018610 A KR20020018610 A KR 20020018610A KR 1020010053317 A KR1020010053317 A KR 1020010053317A KR 20010053317 A KR20010053317 A KR 20010053317A KR 20020018610 A KR20020018610 A KR 20020018610A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- conductive member
- semiconductor
- conductive
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US65244900A | 2000-08-31 | 2000-08-31 | |
| US09/652,449 | 2000-08-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20020018610A true KR20020018610A (ko) | 2002-03-08 |
Family
ID=24616872
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020010053317A Withdrawn KR20020018610A (ko) | 2000-08-31 | 2001-08-31 | 집적 디바이스를 위한 이중 상감 콘택트 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2002164430A (enExample) |
| KR (1) | KR20020018610A (enExample) |
| GB (1) | GB2371146A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100505682B1 (ko) * | 2003-04-03 | 2005-08-03 | 삼성전자주식회사 | 금속-절연체-금속 커패시터를 포함하는 이중 다마신 배선구조 및 그 제조방법 |
| KR101373918B1 (ko) * | 2006-01-13 | 2014-03-12 | 마이크론 테크놀로지, 인크. | 반도체 디바이스에서 추가의 금속 라우팅을 형성하기 위한 시스템 및 방법 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5693563A (en) * | 1996-07-15 | 1997-12-02 | Chartered Semiconductor Manufacturing Pte Ltd. | Etch stop for copper damascene process |
| FR2754391B1 (fr) * | 1996-10-08 | 1999-04-16 | Sgs Thomson Microelectronics | Structure de contact a facteur de forme eleve pour circuits integres |
| JP3228181B2 (ja) * | 1997-05-12 | 2001-11-12 | ヤマハ株式会社 | 平坦配線形成法 |
| US6100190A (en) * | 1998-02-19 | 2000-08-08 | Rohm Co., Ltd. | Method of fabricating semiconductor device, and semiconductor device |
| JP3293792B2 (ja) * | 1999-01-12 | 2002-06-17 | 日本電気株式会社 | 半導体装置及びその製造方法 |
-
2001
- 2001-08-31 GB GB0121198A patent/GB2371146A/en not_active Withdrawn
- 2001-08-31 JP JP2001262581A patent/JP2002164430A/ja not_active Withdrawn
- 2001-08-31 KR KR1020010053317A patent/KR20020018610A/ko not_active Withdrawn
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100505682B1 (ko) * | 2003-04-03 | 2005-08-03 | 삼성전자주식회사 | 금속-절연체-금속 커패시터를 포함하는 이중 다마신 배선구조 및 그 제조방법 |
| US7399700B2 (en) | 2003-04-03 | 2008-07-15 | Samsung Electronics Co., Ltd. | Dual damascene interconnection with metal-insulator-metal capacitor and method of fabricating |
| KR101373918B1 (ko) * | 2006-01-13 | 2014-03-12 | 마이크론 테크놀로지, 인크. | 반도체 디바이스에서 추가의 금속 라우팅을 형성하기 위한 시스템 및 방법 |
| US8674404B2 (en) | 2006-01-13 | 2014-03-18 | Micron Technology, Inc. | Additional metal routing in semiconductor devices |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2371146A (en) | 2002-07-17 |
| GB0121198D0 (en) | 2001-10-24 |
| JP2002164430A (ja) | 2002-06-07 |
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| KR20020018610A (ko) | 집적 디바이스를 위한 이중 상감 콘택트 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 20010831 |
|
| PG1501 | Laying open of application | ||
| PC1203 | Withdrawal of no request for examination | ||
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |