FR2754391B1 - Structure de contact a facteur de forme eleve pour circuits integres - Google Patents

Structure de contact a facteur de forme eleve pour circuits integres

Info

Publication number
FR2754391B1
FR2754391B1 FR9612413A FR9612413A FR2754391B1 FR 2754391 B1 FR2754391 B1 FR 2754391B1 FR 9612413 A FR9612413 A FR 9612413A FR 9612413 A FR9612413 A FR 9612413A FR 2754391 B1 FR2754391 B1 FR 2754391B1
Authority
FR
France
Prior art keywords
integrated circuits
contact structure
shape factor
high shape
factor contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9612413A
Other languages
English (en)
Other versions
FR2754391A1 (fr
Inventor
Gordon Bease
Philippe Gayet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9612413A priority Critical patent/FR2754391B1/fr
Priority to US08/947,126 priority patent/US6239025B1/en
Publication of FR2754391A1 publication Critical patent/FR2754391A1/fr
Application granted granted Critical
Publication of FR2754391B1 publication Critical patent/FR2754391B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
FR9612413A 1996-10-08 1996-10-08 Structure de contact a facteur de forme eleve pour circuits integres Expired - Fee Related FR2754391B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9612413A FR2754391B1 (fr) 1996-10-08 1996-10-08 Structure de contact a facteur de forme eleve pour circuits integres
US08/947,126 US6239025B1 (en) 1996-10-08 1997-10-08 High aspect ratio contact structure for use in integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9612413A FR2754391B1 (fr) 1996-10-08 1996-10-08 Structure de contact a facteur de forme eleve pour circuits integres

Publications (2)

Publication Number Publication Date
FR2754391A1 FR2754391A1 (fr) 1998-04-10
FR2754391B1 true FR2754391B1 (fr) 1999-04-16

Family

ID=9496570

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9612413A Expired - Fee Related FR2754391B1 (fr) 1996-10-08 1996-10-08 Structure de contact a facteur de forme eleve pour circuits integres

Country Status (2)

Country Link
US (1) US6239025B1 (fr)
FR (1) FR2754391B1 (fr)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1197525A (ja) * 1997-09-19 1999-04-09 Hitachi Ltd 半導体装置およびその製造方法
US6727170B2 (en) * 1998-02-16 2004-04-27 Renesas Technology Corp. Semiconductor device having an improved interlayer conductor connections and a manufacturing method thereof
DE69828968D1 (de) 1998-09-25 2005-03-17 St Microelectronics Srl Verbindungsstruktur in mehreren Ebenen
GB2371146A (en) * 2000-08-31 2002-07-17 Agere Syst Guardian Corp Dual damascene interconnect between conducting layers of integrated circuit
JP3418615B2 (ja) * 2001-06-12 2003-06-23 沖電気工業株式会社 半導体素子およびその製造方法
JP3977246B2 (ja) * 2002-12-27 2007-09-19 富士通株式会社 半導体装置及びその製造方法
US7018917B2 (en) * 2003-11-20 2006-03-28 Asm International N.V. Multilayer metallization
US7262495B2 (en) * 2004-10-07 2007-08-28 Hewlett-Packard Development Company, L.P. 3D interconnect with protruding contacts
US8405216B2 (en) * 2005-06-29 2013-03-26 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for integrated circuits
US20070020794A1 (en) * 2005-07-22 2007-01-25 Debar Michael J Method of strengthening a microscale chamber formed over a sacrificial layer
US7323410B2 (en) * 2005-08-08 2008-01-29 International Business Machines Corporation Dry etchback of interconnect contacts
US7709367B2 (en) * 2006-06-30 2010-05-04 Hynix Semiconductor Inc. Method for fabricating storage node contact in semiconductor device
US7737554B2 (en) * 2007-06-25 2010-06-15 Taiwan Semiconductor Manufacturing Company, Ltd. Pitch by splitting bottom metallization layer
CN102903698B (zh) * 2012-10-25 2017-02-08 上海华虹宏力半导体制造有限公司 半导体器件及集成电路
US9012278B2 (en) 2013-10-03 2015-04-21 Asm Ip Holding B.V. Method of making a wire-based semiconductor device
KR20210133524A (ko) * 2020-04-29 2021-11-08 삼성전자주식회사 배선 구조체 및 이를 포함하는 반도체 패키지

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2623812B2 (ja) * 1989-01-25 1997-06-25 日本電気株式会社 半導体装置の製造方法
KR920010620A (ko) * 1990-11-30 1992-06-26 원본미기재 다층 상호접속선을 위한 알루미늄 적층 접점/통로 형성방법
US5635423A (en) 1994-10-11 1997-06-03 Advanced Micro Devices, Inc. Simplified dual damascene process for multi-level metallization and interconnection structure
DE69533823D1 (de) * 1994-12-29 2005-01-05 St Microelectronics Inc Elektrische Verbindungsstruktur auf einer integrierten Schaltungsanordnung mit einem Zapfen mit vergrössertem Kopf
KR0168338B1 (ko) * 1995-05-31 1998-12-15 김광호 랜딩 패드를 갖는 반도체 메모리 장치의 제조방법

Also Published As

Publication number Publication date
FR2754391A1 (fr) 1998-04-10
US6239025B1 (en) 2001-05-29

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090630